1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateway 7001 AP based on IXP422
4 * Derived from boardfiles written by Imre Kaloz
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
13 model = "Gateway 7001 AP";
14 compatible = "gateway,7001", "intel,ixp42x";
20 device_type = "memory";
21 reg = <0x00000000 0x2000000>;
25 bootargs = "console=ttyS0,115200n8";
26 stdout-path = "uart1:115200n8";
30 /* second UART is the primary console */
37 compatible = "intel,ixp4xx-flash", "cfi-flash";
42 reg = <0 0x00000000 0x800000>;
44 /* Configure expansion bus to allow writes */
45 intel,ixp4xx-eb-write-enable = <1>;
48 compatible = "redboot-fis";
49 /* Eraseblock at 0x7e0000 */
50 fis-index-block = <0x3f>;
59 * Taken from Gateway 7001 PCI boardfile (gateway7001-pci.c)
60 * We have slots (IDSEL) 1 and 2 with one assigned IRQ
61 * each handling all IRQs.
63 #interrupt-cells = <1>;
64 interrupt-map-mask = <0xf800 0 0 7>;
67 <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
68 <0x0800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 11 */
69 <0x0800 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 11 */
70 <0x0800 0 0 4 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 11 */
72 <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
73 <0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */
74 <0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */
75 <0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */
81 queue-txready = <&qmgr 20>;
89 phy1: ethernet-phy@1 {
98 queue-txready = <&qmgr 21>;
100 phy-handle = <&phy2>;
103 #address-cells = <1>;
106 phy2: ethernet-phy@2 {