1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
5 * Copyright (C) 2015 Russell King
9 #include "armada-388-clearfog.dtsi"
12 model = "SolidRun Clearfog A1";
13 compatible = "solidrun,clearfog-a1", "marvell,armada388",
14 "marvell,armada385", "marvell,armada380";
19 /* CON2, nearest CPU, USB2 only. */
26 /* Port 2, Lane 0. CON2, nearest CPU. */
27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
34 compatible = "gpio-keys";
35 pinctrl-0 = <&rear_button_pins>;
36 pinctrl-names = "default";
39 /* The rear SW3 button */
40 label = "Rear Button";
41 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
50 phy-mode = "1000base-x";
60 * PCA9655 GPIO expander:
80 gpios = <4 GPIO_ACTIVE_LOW>;
82 line-name = "pcie2.0-clkreq";
84 pcie2-0-w-disable-hog {
86 gpios = <7 GPIO_ACTIVE_LOW>;
88 line-name = "pcie2.0-w-disable";
96 compatible = "marvell,mv88e6085";
100 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
101 pinctrl-names = "default";
104 #address-cells = <1>;
135 phy-mode = "1000base-x";
144 /* 88E1512 external phy */
147 phy-mode = "rgmii-id";
159 clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
160 marvell,pins = "mpp46";
161 marvell,function = "ref";
163 clearfog_dsa0_pins: clearfog-dsa0-pins {
164 marvell,pins = "mpp23", "mpp41";
165 marvell,function = "gpio";
167 clearfog_spi1_cs_pins: spi1-cs-pins {
168 marvell,pins = "mpp55";
169 marvell,function = "spi1";
171 rear_button_pins: rear-button-pins {
172 marvell,pins = "mpp34";
173 marvell,function = "gpio";
179 * Add SPI CS pins for clearfog:
184 pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;