1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
5 * Copyright (c) 2017, Microchip Technology Inc.
6 * 2017 Cristian Birsan <cristian.birsan@microchip.com>
7 * 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
9 #include "sama5d2.dtsi"
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/gpio/gpio.h>
14 model = "Atmel SAMA5D27 SoM1";
15 compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
23 clock-frequency = <32768>;
27 clock-frequency = <24000000>;
32 sdmmc0: sdio-host@a0000000 {
33 microchip,sdcal-inverted;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_qspi1_default>;
44 compatible = "jedec,spi-nor";
46 spi-max-frequency = <104000000>;
47 spi-cs-setup-ns = <7>;
48 spi-tx-bus-width = <4>;
49 spi-rx-bus-width = <4>;
53 label = "at91bootstrap";
54 reg = <0x00000000 0x00040000>;
59 reg = <0x00040000 0x000c0000>;
62 bootloaderenvred@100000 {
63 label = "bootloader env redundant";
64 reg = <0x00100000 0x00040000>;
67 bootloaderenv@140000 {
68 label = "bootloader env";
69 reg = <0x00140000 0x00040000>;
73 label = "device tree";
74 reg = <0x00180000 0x00080000>;
79 reg = <0x00200000 0x00600000>;
84 macb0: ethernet@f8008000 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&pinctrl_macb0_default>;
93 interrupt-parent = <&pioA>;
94 interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
102 pinctrl-names = "default", "gpio";
103 pinctrl-0 = <&pinctrl_i2c0_default>;
104 pinctrl-1 = <&pinctrl_i2c0_gpio>;
105 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
106 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
110 compatible = "atmel,24c02";
117 pinctrl_i2c0_default: i2c0_default {
118 pinmux = <PIN_PD21__TWD0>,
123 pinctrl_i2c0_gpio: i2c0_gpio {
124 pinmux = <PIN_PD21__GPIO>,
129 pinctrl_qspi1_default: qspi1_default {
131 pinmux = <PIN_PB5__QSPI1_SCK>,
137 pinmux = <PIN_PB7__QSPI1_IO0>,
138 <PIN_PB8__QSPI1_IO1>,
139 <PIN_PB9__QSPI1_IO2>,
140 <PIN_PB10__QSPI1_IO3>;
145 pinctrl_macb0_default: macb0_default {
146 pinmux = <PIN_PD9__GTXCK>,
159 pinctrl_macb0_phy_irq: macb0_phy_irq {
160 pinmux = <PIN_PD31__GPIO>;