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[thirdparty/u-boot.git] / src / arm / microchip / lan966x-kontron-kswitch-d10-mmt.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Common part of the device tree for the Kontron KSwitch D10 MMT
4 */
5
6 /dts-v1/;
7 #include "lan966x.dtsi"
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
9
10 / {
11 aliases {
12 serial0 = &usart0;
13 };
14
15 chosen {
16 stdout-path = "serial0:115200n8";
17 };
18
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
24 priority = <200>;
25 };
26 };
27
28 &flx0 {
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
30 status = "okay";
31
32 usart0: serial@200 {
33 pinctrl-0 = <&usart0_pins>;
34 pinctrl-names = "default";
35 status = "okay";
36 };
37 };
38
39 &flx3 {
40 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
41 status = "okay";
42
43 spi3: spi@400 {
44 pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
45 pinctrl-names = "default";
46 status = "okay";
47 cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
48 };
49 };
50
51 &gpio {
52 pinctrl-0 = <&phy_int_pins>;
53 pinctrl-names = "default";
54
55 fc3_b_pins: fc3-b-pins {
56 /* SCK, MISO, MOSI */
57 pins = "GPIO_51", "GPIO_52", "GPIO_53";
58 function = "fc3_b";
59 };
60
61 miim_c_pins: miim-c-pins {
62 /* MDC, MDIO */
63 pins = "GPIO_59", "GPIO_60";
64 function = "miim_c";
65 };
66
67 phy_int_pins: phy-int-pins {
68 /* PHY_INT# */
69 pins = "GPIO_24";
70 function = "gpio";
71 };
72
73 reset_pins: reset-pins {
74 /* SYS_RST# */
75 pins = "GPIO_56";
76 function = "gpio";
77 };
78
79 sgpio_a_pins: sgpio-a-pins {
80 /* SCK, D0, D1 */
81 pins = "GPIO_32", "GPIO_33", "GPIO_34";
82 function = "sgpio_a";
83 };
84
85 sgpio_b_pins: sgpio-b-pins {
86 /* LD */
87 pins = "GPIO_64";
88 function = "sgpio_b";
89 };
90
91 spi3_cs_pins: spi3-cs-pins {
92 /* CS# */
93 pins = "GPIO_46";
94 function = "gpio";
95 };
96
97 usart0_pins: usart0-pins {
98 /* RXD, TXD */
99 pins = "GPIO_25", "GPIO_26";
100 function = "fc0_b";
101 };
102
103 usbs_a_pins: usbs-a-pins {
104 /* VBUS_DET */
105 pins = "GPIO_66";
106 function = "gpio";
107 };
108 };
109
110 &mdio0 {
111 pinctrl-0 = <&miim_c_pins>;
112 pinctrl-names = "default";
113 reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
114 clock-frequency = <2500000>;
115 status = "okay";
116
117 phy4: ethernet-phy@5 {
118 reg = <5>;
119 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
120 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
121 };
122
123 phy5: ethernet-phy@6 {
124 reg = <6>;
125 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
126 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
127 };
128
129 phy6: ethernet-phy@7 {
130 reg = <7>;
131 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
132 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
133 };
134
135 phy7: ethernet-phy@8 {
136 reg = <8>;
137 interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
138 coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
139 };
140 };
141
142 &mdio1 {
143 status = "okay";
144 };
145
146 &phy0 {
147 status = "okay";
148 };
149
150 &phy1 {
151 status = "okay";
152 };
153
154 &port0 {
155 phys = <&serdes 0 CU(0)>;
156 phy-handle = <&phy0>;
157 phy-mode = "gmii";
158 status = "okay";
159 };
160
161 &port1 {
162 phys = <&serdes 1 CU(1)>;
163 phy-handle = <&phy1>;
164 phy-mode = "gmii";
165 status = "okay";
166 };
167
168 &port4 {
169 phys = <&serdes 4 SERDES6G(2)>;
170 phy-handle = <&phy4>;
171 phy-mode = "qsgmii";
172 status = "okay";
173 };
174
175 &port5 {
176 phys = <&serdes 5 SERDES6G(2)>;
177 phy-handle = <&phy5>;
178 phy-mode = "qsgmii";
179 status = "okay";
180 };
181
182 &port6 {
183 phys = <&serdes 6 SERDES6G(2)>;
184 phy-handle = <&phy6>;
185 phy-mode = "qsgmii";
186 status = "okay";
187 };
188
189 &port7 {
190 phys = <&serdes 7 SERDES6G(2)>;
191 phy-handle = <&phy7>;
192 phy-mode = "qsgmii";
193 status = "okay";
194 };
195
196 &serdes {
197 status = "okay";
198 };
199
200 &sgpio {
201 pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
202 pinctrl-names = "default";
203 bus-frequency = <8000000>;
204 /* arbitrary range because all GPIOs are in software mode */
205 microchip,sgpio-port-ranges = <0 11>;
206 status = "okay";
207
208 sgpio_in: gpio@0 {
209 ngpios = <128>;
210 };
211
212 sgpio_out: gpio@1 {
213 ngpios = <128>;
214 };
215 };
216
217 &switch {
218 status = "okay";
219 };
220
221 &udc {
222 pinctrl-0 = <&usbs_a_pins>;
223 pinctrl-names = "default";
224 atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;
225 status = "okay";
226 };
227
228 &watchdog {
229 status = "okay";
230 };