2 * Copyright 2015 Timesys Corporation.
3 * Copyright 2015 General Electric Company
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include "imx6q-ba16.dtsi"
47 compatible = "fixed-clock";
49 clock-frequency = <22000000>;
53 compatible = "gpio-poweroff";
54 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
58 reg_wl18xx_vmmc: regulator-wl18xx {
59 compatible = "regulator-fixed";
60 regulator-name = "vwl1807";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
63 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
64 startup-delay-us = <70000>;
68 reg_wlan: regulator-wlan {
69 compatible = "regulator-fixed";
70 regulator-name = "3P3V_wlan";
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
75 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
79 compatible = "fsl,imx6q-ba16-sgtl5000",
80 "fsl,imx-audio-sgtl5000";
81 model = "imx6q-ba16-sgtl5000";
82 ssi-controller = <&ssi1>;
83 audio-codec = <&sgtl5000>;
86 "Mic Jack", "Mic Bias",
87 "LINE_IN", "Line In Jack",
88 "Headphone Jack", "HP_OUT";
98 compatible = "virtual,mdio-gpio";
99 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
100 <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
102 #address-cells = <1>;
106 compatible = "marvell,mv88e6085"; /* 88e6240*/
109 interrupt-parent = <&gpio2>;
110 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
111 interrupt-controller;
112 #interrupt-cells = <2>;
114 switch_ports: ports {
115 #address-cells = <1>;
120 #address-cells = <1>;
123 switchphy0: switchphy@0 {
125 interrupt-parent = <&switch>;
126 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
129 switchphy1: switchphy@1 {
131 interrupt-parent = <&switch>;
132 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
135 switchphy2: switchphy@2 {
137 interrupt-parent = <&switch>;
138 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
141 switchphy3: switchphy@3 {
143 interrupt-parent = <&switch>;
144 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
147 switchphy4: switchphy@4 {
149 interrupt-parent = <&switch>;
150 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
158 cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_ecspi5>;
163 m25_eeprom: flash@0 {
164 compatible = "atmel,at25";
165 spi-max-frequency = <10000000>;
169 address-width = <16>;
174 pinctrl-names = "default", "gpio";
175 pinctrl-1 = <&pinctrl_i2c1_gpio>;
176 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
177 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
180 compatible = "nxp,pca9547";
182 #address-cells = <1>;
186 #address-cells = <1>;
190 ads7830: ads7830@48 {
191 compatible = "ti,ads7830";
195 mma8453: mma8453@1c {
196 compatible = "fsl,mma8453";
202 #address-cells = <1>;
207 compatible = "atmel,24c08";
211 mpl3115: mpl3115@60 {
212 compatible = "fsl,mpl3115";
218 #address-cells = <1>;
224 #address-cells = <1>;
229 compatible = "fsl,sgtl5000";
231 #sound-dai-cells = <0>;
233 VDDA-supply = <®_1p8v>;
234 VDDIO-supply = <®_3p3v>;
239 #address-cells = <1>;
243 pca9539: pca9539@74 {
244 compatible = "nxp,pca9539";
248 #interrupt-cells = <2>;
249 interrupt-controller;
250 interrupt-parent = <&gpio2>;
251 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
257 line-name = "PCA9539-P12";
264 line-name = "PCA9539-P13";
271 line-name = "PCA9539-P14";
278 line-name = "PCA9539-P15";
285 line-name = "PCA9539-P16";
292 line-name = "PCA9539-P17";
298 #address-cells = <1>;
304 #address-cells = <1>;
310 #address-cells = <1>;
318 pinctrl-names = "default", "gpio";
319 pinctrl-1 = <&pinctrl_i2c2_gpio>;
320 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
321 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
325 pinctrl-names = "default", "gpio";
326 pinctrl-1 = <&pinctrl_i2c3_gpio>;
327 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
328 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
332 pinctrl_i2c1_gpio: i2c1gpiogrp {
334 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
335 MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
339 pinctrl_i2c2_gpio: i2c2gpiogrp {
341 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
342 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
346 pinctrl_i2c3_gpio: i2c3gpiogrp {
348 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
349 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_usdhc4>;
366 vmmc-supply = <®_wl18xx_vmmc>;
370 keep-power-in-suspend;
372 max-frequency = <25000000>;
373 #address-cells = <1>;
378 compatible = "ti,wl1837";
380 interrupt-parent = <&gpio2>;
381 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
382 tcxo-clock-frequency = <26000000>;
387 /* Synopsys, Inc. Device */
389 compatible = "pci16c3,abcd";
390 reg = <0x00000000 0 0 0 0>;
392 #address-cells = <3>;
398 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
399 <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
400 <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
401 <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
402 <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
403 <&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
404 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
405 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
406 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
407 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
408 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
409 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;