src/arm/renesas/r8a7742-iwg21d-q7-dbcm-ca.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the iWave-RZ/G1H Qseven board development
   4  * platform with camera daughter board
   5  *
   6  * Copyright (C) 2020 Renesas Electronics Corp.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/media/video-interfaces.h>
  12
  13 #include "r8a7742-iwg21d-q7.dts"
  14
  15 / {
  16         model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
  17         compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
  18
  19         aliases {
  20                 serial0 = &scif0;
  21                 serial1 = &scif1;
  22                 serial3 = &scifb1;
  23                 serial5 = &hscif0;
  24                 ethernet1 = &ether;
  25         };
  26
  27         mclk_cam1: mclk-cam1 {
  28                 compatible = "fixed-clock";
  29                 #clock-cells = <0>;
  30                 clock-frequency = <26000000>;
  31         };
  32
  33         mclk_cam2: mclk-cam2 {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <26000000>;
  37         };
  38
  39         mclk_cam3: mclk-cam3 {
  40                 compatible = "fixed-clock";
  41                 #clock-cells = <0>;
  42                 clock-frequency = <26000000>;
  43         };
  44
  45         mclk_cam4: mclk-cam4 {
  46                 compatible = "fixed-clock";
  47                 #clock-cells = <0>;
  48                 clock-frequency = <26000000>;
  49         };
  50
  51         reg_1p8v: 1p8v {
  52                 compatible = "regulator-fixed";
  53                 regulator-name = "1P8V";
  54                 regulator-min-microvolt = <1800000>;
  55                 regulator-max-microvolt = <1800000>;
  56                 regulator-always-on;
  57         };
  58
  59         reg_2p8v: 2p8v {
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "2P8V";
  62                 regulator-min-microvolt = <2800000>;
  63                 regulator-max-microvolt = <2800000>;
  64                 regulator-always-on;
  65         };
  66 };
  67
  68 &avb {
  69         /* Pins shared with VIN0, keep status disabled */
  70         status = "disabled";
  71 };
  72
  73 &can0 {
  74         pinctrl-0 = <&can0_pins>;
  75         pinctrl-names = "default";
  76         status = "okay";
  77 };
  78
  79 &ether {
  80         pinctrl-0 = <&ether_pins>;
  81         pinctrl-names = "default";
  82
  83         phy-handle = <&phy1>;
  84         renesas,ether-link-active-low;
  85         status = "okay";
  86
  87         phy1: ethernet-phy@1 {
  88                 compatible = "ethernet-phy-id0022.1560",
  89                              "ethernet-phy-ieee802.3-c22";
  90                 reg = <1>;
  91                 micrel,led-mode = <1>;
  92         };
  93 };
  94
  95 &gpio0 {
  96         /* Disable hogging GP0_18 to output LOW */
  97         /delete-node/ qspi-en-hog;
  98
  99         /* Hog GP0_18 to output HIGH to enable VIN2 */
 100         vin2-en-hog {
 101                 gpio-hog;
 102                 gpios = <18 GPIO_ACTIVE_HIGH>;
 103                 output-high;
 104                 line-name = "VIN2_EN";
 105         };
 106 };
 107
 108 &hscif0 {
 109         pinctrl-0 = <&hscif0_pins>;
 110         pinctrl-names = "default";
 111         uart-has-rtscts;
 112         status = "okay";
 113 };
 114
 115 &i2c1 {
 116         pinctrl-0 = <&i2c1_pins>;
 117         pinctrl-names = "default";
 118
 119         /* status set to "okay" when needed by camera configuration below */
 120         clock-frequency = <400000>;
 121 };
 122
 123 &i2c3 {
 124         pinctrl-0 = <&i2c3_pins>;
 125         pinctrl-names = "default";
 126
 127         /* status set to "okay" when needed by camera configuration below */
 128         clock-frequency = <400000>;
 129 };
 130
 131 &pfc {
 132         can0_pins: can0 {
 133                 groups = "can0_data_d";
 134                 function = "can0";
 135         };
 136
 137         ether_pins: ether {
 138                 groups = "eth_mdio", "eth_rmii";
 139                 function = "eth";
 140         };
 141
 142         hscif0_pins: hscif0 {
 143                 groups = "hscif0_data", "hscif0_ctrl";
 144                 function = "hscif0";
 145         };
 146
 147         i2c1_pins: i2c1 {
 148                 groups = "i2c1_c";
 149                 function = "i2c1";
 150         };
 151
 152         i2c3_pins: i2c3 {
 153                 groups = "i2c3";
 154                 function = "i2c3";
 155         };
 156
 157         scif0_pins: scif0 {
 158                 groups = "scif0_data";
 159                 function = "scif0";
 160         };
 161
 162         scif1_pins: scif1 {
 163                 groups = "scif1_data";
 164                 function = "scif1";
 165         };
 166
 167         scifb1_pins: scifb1 {
 168                 groups = "scifb1_data";
 169                 function = "scifb1";
 170         };
 171
 172         vin0_8bit_pins: vin0 {
 173                 groups = "vin0_data8", "vin0_clk", "vin0_sync";
 174                 function = "vin0";
 175         };
 176
 177         vin1_8bit_pins: vin1 {
 178                 groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
 179                 function = "vin1";
 180         };
 181
 182         vin2_pins: vin2 {
 183                 groups = "vin2_g8", "vin2_clk";
 184                 function = "vin2";
 185         };
 186
 187         vin3_pins: vin3 {
 188                 groups = "vin3_data8", "vin3_clk", "vin3_sync";
 189                 function = "vin3";
 190         };
 191 };
 192
 193 &qspi {
 194         /* Pins shared with VIN2, keep status disabled */
 195         status = "disabled";
 196 };
 197
 198 &scif0 {
 199         pinctrl-0 = <&scif0_pins>;
 200         pinctrl-names = "default";
 201         status = "okay";
 202 };
 203
 204 &scif1 {
 205         pinctrl-0 = <&scif1_pins>;
 206         pinctrl-names = "default";
 207         status = "okay";
 208 };
 209
 210 &scifb1 {
 211         pinctrl-0 = <&scifb1_pins>;
 212         pinctrl-names = "default";
 213         status = "okay";
 214
 215         rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
 216         cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
 217 };
 218
 219 /*
 220  * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
 221  *
 222  * (un)comment the #include statements to change configuration
 223  */
 224
 225 /* 8bit CMOS Camera 1 (J13) */
 226 #define CAM_PARENT_I2C          i2c0
 227 #define MCLK_CAM                mclk_cam1
 228 #define CAM_EP                  cam0ep
 229 #define VIN_EP                  vin0ep
 230 #undef CAM_ENABLED
 231 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
 232 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
 233
 234 #ifdef CAM_ENABLED
 235 &vin0 {
 236         /*
 237          * Set SW2 switch on the SOM to 'ON'
 238          * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
 239          */
 240         status = "okay";
 241         pinctrl-0 = <&vin0_8bit_pins>;
 242         pinctrl-names = "default";
 243
 244         port {
 245                 vin0ep: endpoint {
 246                         remote-endpoint = <&cam0ep>;
 247                         bus-width = <8>;
 248                         bus-type = <MEDIA_BUS_TYPE_BT656>;
 249                 };
 250         };
 251 };
 252 #endif /* CAM_ENABLED */
 253
 254 #undef CAM_PARENT_I2C
 255 #undef MCLK_CAM
 256 #undef CAM_EP
 257 #undef VIN_EP
 258
 259 /* 8bit CMOS Camera 2 (J14) */
 260 #define CAM_PARENT_I2C          i2c1
 261 #define MCLK_CAM                mclk_cam2
 262 #define CAM_EP                  cam1ep
 263 #define VIN_EP                  vin1ep
 264 #undef CAM_ENABLED
 265 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
 266 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
 267
 268 #ifdef CAM_ENABLED
 269 &vin1 {
 270         /* Set SW1 switch on the SOM to 'ON' */
 271         status = "okay";
 272         pinctrl-0 = <&vin1_8bit_pins>;
 273         pinctrl-names = "default";
 274
 275         port {
 276                 vin1ep: endpoint {
 277                         remote-endpoint = <&cam1ep>;
 278                         bus-width = <8>;
 279                         bus-type = <MEDIA_BUS_TYPE_BT656>;
 280                 };
 281         };
 282 };
 283
 284 #endif /* CAM_ENABLED */
 285
 286 #undef CAM_PARENT_I2C
 287 #undef MCLK_CAM
 288 #undef CAM_EP
 289 #undef VIN_EP
 290
 291 /* 8bit CMOS Camera 3 (J12) */
 292 #define CAM_PARENT_I2C          i2c2
 293 #define MCLK_CAM                mclk_cam3
 294 #define CAM_EP                  cam2ep
 295 #define VIN_EP                  vin2ep
 296 #undef CAM_ENABLED
 297 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
 298 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
 299
 300 #ifdef CAM_ENABLED
 301 &vin2 {
 302         status = "okay";
 303         pinctrl-0 = <&vin2_pins>;
 304         pinctrl-names = "default";
 305
 306         port {
 307                 vin2ep: endpoint {
 308                         remote-endpoint = <&cam2ep>;
 309                         bus-width = <8>;
 310                         data-shift = <8>;
 311                         bus-type = <MEDIA_BUS_TYPE_BT656>;
 312                 };
 313         };
 314 };
 315 #endif /* CAM_ENABLED */
 316
 317 #undef CAM_PARENT_I2C
 318 #undef MCLK_CAM
 319 #undef CAM_EP
 320 #undef VIN_EP
 321
 322 /* 8bit CMOS Camera 4 (J11) */
 323 #define CAM_PARENT_I2C          i2c3
 324 #define MCLK_CAM                mclk_cam4
 325 #define CAM_EP                  cam3ep
 326 #define VIN_EP                  vin3ep
 327 #undef CAM_ENABLED
 328 #include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
 329 //#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
 330
 331 #ifdef CAM_ENABLED
 332 &vin3 {
 333         status = "okay";
 334         pinctrl-0 = <&vin3_pins>;
 335         pinctrl-names = "default";
 336
 337         port {
 338                 vin3ep: endpoint {
 339                         remote-endpoint = <&cam3ep>;
 340                         bus-width = <8>;
 341                         bus-type = <MEDIA_BUS_TYPE_BT656>;
 342                 };
 343         };
 344 };
 345 #endif /* CAM_ENABLED */
 346
 347 #undef CAM_PARENT_I2C
 348 #undef MCLK_CAM
 349 #undef CAM_EP
 350 #undef VIN_EP