src/arm/st/stih418.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014 STMicroelectronics Limited.
   4  * Author: Peter Griffin <peter.griffin@linaro.org>
   5  */
   6 #include "stih418-clock.dtsi"
   7 #include "stih407-family.dtsi"
   8 #include "stih410-pinctrl.dtsi"
   9 / {
  10         cpus {
  11                 #address-cells = <1>;
  12                 #size-cells = <0>;
  13                 cpu@2 {
  14                         device_type = "cpu";
  15                         compatible = "arm,cortex-a9";
  16                         reg = <2>;
  17                         /* u-boot puts hpen in SBC dmem at 0xa4 offset */
  18                         cpu-release-addr = <0x94100A4>;
  19                 };
  20                 cpu@3 {
  21                         device_type = "cpu";
  22                         compatible = "arm,cortex-a9";
  23                         reg = <3>;
  24                         /* u-boot puts hpen in SBC dmem at 0xa4 offset */
  25                         cpu-release-addr = <0x94100A4>;
  26                 };
  27         };
  28
  29         usb2_picophy1: phy2 {
  30                 compatible = "st,stih407-usb2-phy";
  31                 #phy-cells = <0>;
  32                 st,syscfg = <&syscfg_core 0xf8 0xf4>;
  33                 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
  34                          <&picophyreset STIH407_PICOPHY0_RESET>;
  35                 reset-names = "global", "port";
  36         };
  37
  38         usb2_picophy2: phy3 {
  39                 compatible = "st,stih407-usb2-phy";
  40                 #phy-cells = <0>;
  41                 st,syscfg = <&syscfg_core 0xfc 0xf4>;
  42                 resets = <&softreset STIH407_PICOPHY_SOFTRESET>,
  43                          <&picophyreset STIH407_PICOPHY1_RESET>;
  44                 reset-names = "global", "port";
  45         };
  46
  47         soc {
  48                 rng11: rng@8a8a000 {
  49                         status = "disabled";
  50                 };
  51
  52                 ohci0: usb@9a03c00 {
  53                         compatible = "st,st-ohci-300x";
  54                         reg = <0x9a03c00 0x100>;
  55                         interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
  56                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  57                         resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
  58                                  <&softreset STIH407_USB2_PORT0_SOFTRESET>;
  59                         reset-names = "power", "softreset";
  60                         phys = <&usb2_picophy1>;
  61                         phy-names = "usb";
  62                 };
  63
  64                 ehci0: usb@9a03e00 {
  65                         compatible = "st,st-ehci-300x";
  66                         reg = <0x9a03e00 0x100>;
  67                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
  68                         pinctrl-names = "default";
  69                         pinctrl-0 = <&pinctrl_usb0>;
  70                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  71                         resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>,
  72                                  <&softreset STIH407_USB2_PORT0_SOFTRESET>;
  73                         reset-names = "power", "softreset";
  74                         phys = <&usb2_picophy1>;
  75                         phy-names = "usb";
  76                 };
  77
  78                 ohci1: usb@9a83c00 {
  79                         compatible = "st,st-ohci-300x";
  80                         reg = <0x9a83c00 0x100>;
  81                         interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
  82                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  83                         resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
  84                                  <&softreset STIH407_USB2_PORT1_SOFTRESET>;
  85                         reset-names = "power", "softreset";
  86                         phys = <&usb2_picophy2>;
  87                         phy-names = "usb";
  88                 };
  89
  90                 ehci1: usb@9a83e00 {
  91                         compatible = "st,st-ehci-300x";
  92                         reg = <0x9a83e00 0x100>;
  93                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
  94                         pinctrl-names = "default";
  95                         pinctrl-0 = <&pinctrl_usb1>;
  96                         clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>;
  97                         resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>,
  98                                  <&softreset STIH407_USB2_PORT1_SOFTRESET>;
  99                         reset-names = "power", "softreset";
 100                         phys = <&usb2_picophy2>;
 101                         phy-names = "usb";
 102                 };
 103
 104                 mmc0: sdhci@9060000 {
 105                         assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
 106                         assigned-clock-parents = <&clk_s_c0_pll1 0>;
 107                         assigned-clock-rates = <200000000>;
 108                 };
 109
 110                 thermal@91a0000 {
 111                         compatible = "st,stih407-thermal";
 112                         reg = <0x91a0000 0x28>;
 113                         clock-names = "thermal";
 114                         clocks = <&clk_sysin>;
 115                         interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>;
 116                 };
 117         };
 118 };