1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
13 #include "am335x-baltos.dtsi"
16 model = "NetCom Plus";
20 pinctrl-names = "default";
21 pinctrl-0 = <&dip_switches>;
23 dip_switches: dip-switches-pins {
24 pinctrl-single,pins = <
25 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7)
26 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)
27 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)
28 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)
32 tca6416_pins: tca6416-pins {
33 pinctrl-single,pins = <
34 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)
38 i2c2_pins: i2c2-pins {
39 pinctrl-single,pins = <
40 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
41 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3)
66 compatible = "ti,tca6416";
70 interrupt-parent = <&gpio0>;
71 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&tca6416_pins>;
74 gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
75 "GP_IN4", "GP_IN5", "GP_IN6", "GP_IN7",
76 "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
77 "GP_OUT4", "GP_OUT5", "GP_OUT6", "GP_OUT7";
82 pinctrl-names = "default";
83 pinctrl-0 = <&i2c2_pins>;
86 clock-frequency = <400000>;
89 compatible = "ti,tca6416";
93 gpio-line-names = "CH1_M0", "CH1_M1", "CH1_M2", "CH1_M3",
94 "CH2_M0", "CH2_M1", "CH2_M2", "CH2_M3",
95 "CH3_M0", "CH3_M1", "CH3_M2", "CH3_M3",
96 "CH4_M0", "CH4_M1", "CH4_M2", "CH4_M3";
100 compatible = "ti,tca6416";
104 gpio-line-names = "CH5_M0", "CH5_M1", "CH5_M2", "CH5_M3",
105 "CH6_M0", "CH6_M1", "CH6_M2", "CH6_M3",
106 "CH7_M0", "CH7_M1", "CH7_M2", "CH7_M3",
107 "CH8_M0", "CH8_M1", "CH8_M2", "CH8_M3";
112 phy0: ethernet-phy@0 {
119 ti,dual-emac-pvid = <1>;
120 phy-handle = <&phy0>;
124 phy-mode = "rgmii-id";
125 ti,dual-emac-pvid = <2>;
126 phy-handle = <&phy1>;