src/arm/ti/omap/dm8168-evm.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /dts-v1/;
   3
   4 #include "dm816x.dtsi"
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 / {
   8         model = "DM8168 EVM";
   9         compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816";
  10
  11         memory@80000000 {
  12                 device_type = "memory";
  13                 reg = <0x80000000 0x40000000    /* 1 GB */
  14                        0xc0000000 0x40000000>;  /* 1 GB */
  15         };
  16
  17         /* FDC6331L controlled by SD_POW pin */
  18         vmmcsd_fixed: fixedregulator0 {
  19                 compatible = "regulator-fixed";
  20                 regulator-name = "vmmcsd_fixed";
  21                 regulator-min-microvolt = <3300000>;
  22                 regulator-max-microvolt = <3300000>;
  23         };
  24
  25         sata_refclk: fixedclock0 {
  26                 compatible = "fixed-clock";
  27                 #clock-cells = <0>;
  28                 clock-frequency = <100000000>;
  29         };
  30 };
  31
  32 &dm816x_pinmux {
  33         mcspi1_pins: mcspi1-pins {
  34                 pinctrl-single,pins = <
  35                         DM816X_IOPAD(0x0a94, MUX_MODE0)                 /* SPI_SCLK */
  36                         DM816X_IOPAD(0x0a98, MUX_MODE0)                 /* SPI_SCS0 */
  37                         DM816X_IOPAD(0x0aa8, MUX_MODE0)                 /* SPI_D0 */
  38                         DM816X_IOPAD(0x0aac, MUX_MODE0)                 /* SPI_D1 */
  39                 >;
  40         };
  41
  42         mmc_pins: mmc-pins {
  43                 pinctrl-single,pins = <
  44                         DM816X_IOPAD(0x0a70, MUX_MODE0)                 /* SD_POW */
  45                         DM816X_IOPAD(0x0a74, MUX_MODE0)                 /* SD_CLK */
  46                         DM816X_IOPAD(0x0a78, MUX_MODE0)                 /* SD_CMD */
  47                         DM816X_IOPAD(0x0a7C, MUX_MODE0)                 /* SD_DAT0 */
  48                         DM816X_IOPAD(0x0a80, MUX_MODE0)                 /* SD_DAT1 */
  49                         DM816X_IOPAD(0x0a84, MUX_MODE0)                 /* SD_DAT2 */
  50                         DM816X_IOPAD(0x0a88, MUX_MODE0)                 /* SD_DAT2 */
  51                         DM816X_IOPAD(0x0a8c, MUX_MODE2)                 /* GP1[7] */
  52                         DM816X_IOPAD(0x0a90, MUX_MODE2)                 /* GP1[8] */
  53                 >;
  54         };
  55
  56         usb0_pins: usb0-pins {
  57                 pinctrl-single,pins = <
  58                         DM816X_IOPAD(0x0d04, MUX_MODE0)                 /* USB0_DRVVBUS */
  59                 >;
  60         };
  61
  62         usb1_pins: usb1-pins {
  63                 pinctrl-single,pins = <
  64                         DM816X_IOPAD(0x0d08, MUX_MODE0)                 /* USB1_DRVVBUS */
  65                 >;
  66         };
  67
  68         nandflash_pins: nandflash-pins {
  69                 pinctrl-single,pins = <
  70                         DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0)               /* PINCTRL207 GPMC_CS0*/
  71                         DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0)              /* PINCTRL217 GPMC_ADV_ALE */
  72                         DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0)    /* PINCTRL214 GPMC_OE_RE */
  73                         DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0)              /* PINCTRL215 GPMC_BE0_CLE */
  74                         DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0)               /* PINCTRL213 GPMC_WE */
  75                         DM816X_IOPAD(0x0b6c, MUX_MODE0)                         /* PINCTRL220 GPMC_WAIT */
  76                         DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0)              /* PINCTRL250 GPMC_CLK */
  77                         DM816X_IOPAD(0x0ba4, MUX_MODE0)                         /* PINCTRL234 GPMC_D0 */
  78                         DM816X_IOPAD(0x0ba8, MUX_MODE0)                         /* PINCTRL234 GPMC_D1 */
  79                         DM816X_IOPAD(0x0bac, MUX_MODE0)                         /* PINCTRL234 GPMC_D2 */
  80                         DM816X_IOPAD(0x0bb0, MUX_MODE0)                         /* PINCTRL234 GPMC_D3 */
  81                         DM816X_IOPAD(0x0bb4, MUX_MODE0)                         /* PINCTRL234 GPMC_D4 */
  82                         DM816X_IOPAD(0x0bb8, MUX_MODE0)                         /* PINCTRL234 GPMC_D5 */
  83                         DM816X_IOPAD(0x0bbc, MUX_MODE0)                         /* PINCTRL234 GPMC_D6 */
  84                         DM816X_IOPAD(0x0bc0, MUX_MODE0)                         /* PINCTRL234 GPMC_D7 */
  85                         DM816X_IOPAD(0x0bc4, MUX_MODE0)                         /* PINCTRL234 GPMC_D8 */
  86                         DM816X_IOPAD(0x0bc8, MUX_MODE0)                         /* PINCTRL234 GPMC_D9 */
  87                         DM816X_IOPAD(0x0bcc, MUX_MODE0)                         /* PINCTRL234 GPMC_D10 */
  88                         DM816X_IOPAD(0x0bd0, MUX_MODE0)                         /* PINCTRL234 GPMC_D11 */
  89                         DM816X_IOPAD(0x0bd4, MUX_MODE0)                         /* PINCTRL234 GPMC_D12 */
  90                         DM816X_IOPAD(0x0bd8, MUX_MODE0)                         /* PINCTRL234 GPMC_D13 */
  91                         DM816X_IOPAD(0x0bdc, MUX_MODE0)                         /* PINCTRL234 GPMC_D14 */
  92                         DM816X_IOPAD(0x0be0, MUX_MODE0)                         /* PINCTRL234 GPMC_D15 */
  93                 >;
  94         };
  95 };
  96
  97 &i2c1 {
  98         extgpio0: pcf8575@20 {
  99                 compatible = "nxp,pcf8575";
 100                 reg = <0x20>;
 101                 gpio-controller;
 102                 #gpio-cells = <2>;
 103         };
 104 };
 105
 106 &i2c2 {
 107         extgpio1: pcf8575@20 {
 108                 compatible = "nxp,pcf8575";
 109                 reg = <0x20>;
 110                 gpio-controller;
 111                 #gpio-cells = <2>;
 112         };
 113 };
 114
 115 &gpmc {
 116         ranges = <0 0 0x04000000 0x01000000>;   /* CS0: 16MB for NAND */
 117         pinctrl-names = "default";
 118         pinctrl-0 = <&nandflash_pins>;
 119
 120         nand@0,0 {
 121                 compatible = "ti,omap2-nand";
 122                 linux,mtd-name = "micron,mt29f2g16aadwp";
 123                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 124                 interrupt-parent = <&gpmc>;
 125                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 126                              <1 IRQ_TYPE_NONE>; /* termcount */
 127                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 128                 #address-cells = <1>;
 129                 #size-cells = <1>;
 130                 ti,nand-ecc-opt = "bch8";
 131                 ti,elm-id = <&elm>;
 132                 nand-bus-width = <16>;
 133                 gpmc,device-width = <2>;
 134                 gpmc,sync-clk-ps = <0>;
 135                 gpmc,cs-on-ns = <0>;
 136                 gpmc,cs-rd-off-ns = <44>;
 137                 gpmc,cs-wr-off-ns = <44>;
 138                 gpmc,adv-on-ns = <6>;
 139                 gpmc,adv-rd-off-ns = <34>;
 140                 gpmc,adv-wr-off-ns = <44>;
 141                 gpmc,we-on-ns = <0>;
 142                 gpmc,we-off-ns = <40>;
 143                 gpmc,oe-on-ns = <0>;
 144                 gpmc,oe-off-ns = <54>;
 145                 gpmc,access-ns = <64>;
 146                 gpmc,rd-cycle-ns = <82>;
 147                 gpmc,wr-cycle-ns = <82>;
 148                 gpmc,bus-turnaround-ns = <0>;
 149                 gpmc,cycle2cycle-delay-ns = <0>;
 150                 gpmc,clk-activation-ns = <0>;
 151                 gpmc,wr-access-ns = <40>;
 152                 gpmc,wr-data-mux-bus-ns = <0>;
 153                 partition@0 {
 154                         label = "X-Loader";
 155                         reg = <0 0x80000>;
 156                 };
 157                 partition@80000 {
 158                         label = "U-Boot";
 159                         reg = <0x80000 0x1c0000>;
 160                 };
 161                 partition@1c0000 {
 162                         label = "Environment";
 163                         reg = <0x240000 0x40000>;
 164                 };
 165                 partition@280000 {
 166                         label = "Kernel";
 167                         reg = <0x280000 0x500000>;
 168                 };
 169                 partition@780000 {
 170                         label = "Filesystem";
 171                         reg = <0x780000 0xf880000>;
 172                 };
 173         };
 174 };
 175
 176 &mcspi1 {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&mcspi1_pins>;
 179
 180         flash@0 {
 181                 compatible = "w25x32";
 182                 spi-max-frequency = <48000000>;
 183                 reg = <0>;
 184                 #address-cells = <1>;
 185                 #size-cells = <1>;
 186         };
 187 };
 188
 189 &mmc1 {
 190         pinctrl-names = "default";
 191         pinctrl-0 = <&mmc_pins>;
 192         vmmc-supply = <&vmmcsd_fixed>;
 193         bus-width = <4>;
 194         cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
 195         wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
 196 };
 197
 198 /* At least dm8168-evm rev c won't support multipoint, later may */
 199 &usb0 {
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&usb0_pins>;
 202         mentor,multipoint = <0>;
 203 };
 204
 205 &usb1 {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&usb1_pins>;
 208         mentor,multipoint = <0>;
 209 };
 210
 211 &sata {
 212         clocks = <&sysclk5_ck>, <&sata_refclk>;
 213 };