1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for OMAP3 clock data
5 * Copyright (C) 2013 Texas Instruments, Inc.
8 virt_16_8m_ck: virt_16_8m_ck {
10 compatible = "fixed-clock";
11 clock-frequency = <16800000>;
14 osc_sys_ck: osc_sys_ck@d40 {
16 compatible = "ti,mux-clock";
17 clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck>, <&virt_16_8m_ck>;
23 compatible = "ti,divider-clock";
24 clocks = <&osc_sys_ck>;
28 ti,index-starts-at-one;
31 sys_clkout1: sys_clkout1@d70 {
33 compatible = "ti,gate-clock";
34 clocks = <&osc_sys_ck>;
39 dpll3_x2_ck: dpll3_x2_ck {
41 compatible = "fixed-factor-clock";
47 dpll3_m2x2_ck: dpll3_m2x2_ck {
49 compatible = "fixed-factor-clock";
50 clocks = <&dpll3_m2_ck>;
55 dpll4_x2_ck: dpll4_x2_ck {
57 compatible = "fixed-factor-clock";
63 corex2_fck: corex2_fck {
65 compatible = "fixed-factor-clock";
66 clocks = <&dpll3_m2x2_ck>;
71 wkup_l4_ick: wkup_l4_ick {
73 compatible = "fixed-factor-clock";
81 /* CONTROL_DEVCONF1 */
83 compatible = "ti,clksel";
88 mcbsp5_mux_fck: clock-mcbsp5-mux-fck {
90 compatible = "ti,composite-mux-clock";
91 clock-output-names = "mcbsp5_mux_fck";
92 clocks = <&core_96m_fck>, <&mcbsp_clks>;
96 mcbsp3_mux_fck: clock-mcbsp3-mux-fck {
98 compatible = "ti,composite-mux-clock";
99 clock-output-names = "mcbsp3_mux_fck";
100 clocks = <&per_96m_fck>, <&mcbsp_clks>;
103 mcbsp4_mux_fck: clock-mcbsp4-mux-fck {
105 compatible = "ti,composite-mux-clock";
106 clock-output-names = "mcbsp4_mux_fck";
107 clocks = <&per_96m_fck>, <&mcbsp_clks>;
112 mcbsp5_fck: mcbsp5_fck {
114 compatible = "ti,composite-clock";
115 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
118 /* CONTROL_DEVCONF0 */
120 compatible = "ti,clksel";
123 #address-cells = <0>;
125 mcbsp1_mux_fck: clock-mcbsp1-mux-fck {
127 compatible = "ti,composite-mux-clock";
128 clock-output-names = "mcbsp1_mux_fck";
129 clocks = <&core_96m_fck>, <&mcbsp_clks>;
133 mcbsp2_mux_fck: clock-mcbsp2-mux-fck {
135 compatible = "ti,composite-mux-clock";
136 clock-output-names = "mcbsp2_mux_fck";
137 clocks = <&per_96m_fck>, <&mcbsp_clks>;
142 mcbsp1_fck: mcbsp1_fck {
144 compatible = "ti,composite-clock";
145 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>;
148 mcbsp2_fck: mcbsp2_fck {
150 compatible = "ti,composite-clock";
151 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>;
154 mcbsp3_fck: mcbsp3_fck {
156 compatible = "ti,composite-clock";
157 clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>;
160 mcbsp4_fck: mcbsp4_fck {
162 compatible = "ti,composite-clock";
163 clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>;
167 dummy_apb_pclk: dummy_apb_pclk {
169 compatible = "fixed-clock";
170 clock-frequency = <0x0>;
173 omap_32k_fck: omap_32k_fck {
175 compatible = "fixed-clock";
176 clock-frequency = <32768>;
179 virt_12m_ck: virt_12m_ck {
181 compatible = "fixed-clock";
182 clock-frequency = <12000000>;
185 virt_13m_ck: virt_13m_ck {
187 compatible = "fixed-clock";
188 clock-frequency = <13000000>;
191 virt_19200000_ck: virt_19200000_ck {
193 compatible = "fixed-clock";
194 clock-frequency = <19200000>;
197 virt_26000000_ck: virt_26000000_ck {
199 compatible = "fixed-clock";
200 clock-frequency = <26000000>;
203 virt_38_4m_ck: virt_38_4m_ck {
205 compatible = "fixed-clock";
206 clock-frequency = <38400000>;
209 dpll4_ck: dpll4_ck@d00 {
211 compatible = "ti,omap3-dpll-per-clock";
212 clocks = <&sys_ck>, <&sys_ck>;
213 reg = <0x0d00>, <0x0d20>, <0x0d44>, <0x0d30>;
216 dpll4_m2_ck: dpll4_m2_ck@d48 {
218 compatible = "ti,divider-clock";
219 clocks = <&dpll4_ck>;
222 ti,index-starts-at-one;
225 dpll4_m2x2_mul_ck: dpll4_m2x2_mul_ck {
227 compatible = "fixed-factor-clock";
228 clocks = <&dpll4_m2_ck>;
233 dpll4_m2x2_ck: dpll4_m2x2_ck@d00 {
235 compatible = "ti,gate-clock";
236 clocks = <&dpll4_m2x2_mul_ck>;
237 ti,bit-shift = <0x1b>;
239 ti,set-bit-to-disable;
242 omap_96m_alwon_fck: omap_96m_alwon_fck {
244 compatible = "fixed-factor-clock";
245 clocks = <&dpll4_m2x2_ck>;
250 dpll3_ck: dpll3_ck@d00 {
252 compatible = "ti,omap3-dpll-core-clock";
253 clocks = <&sys_ck>, <&sys_ck>;
254 reg = <0x0d00>, <0x0d20>, <0x0d40>, <0x0d30>;
259 compatible = "ti,clksel";
262 #address-cells = <0>;
264 dpll3_m3_ck: clock-dpll3-m3 {
266 compatible = "ti,divider-clock";
267 clock-output-names = "dpll3_m3_ck";
268 clocks = <&dpll3_ck>;
271 ti,index-starts-at-one;
274 dpll4_m6_ck: clock-dpll4-m6 {
276 compatible = "ti,divider-clock";
277 clock-output-names = "dpll4_m6_ck";
278 clocks = <&dpll4_ck>;
281 ti,index-starts-at-one;
284 emu_src_mux_ck: clock-emu-src-mux {
286 compatible = "ti,mux-clock";
287 clock-output-names = "emu_src_mux_ck";
288 clocks = <&sys_ck>, <&emu_core_alwon_ck>, <&emu_per_alwon_ck>, <&emu_mpu_alwon_ck>;
291 pclk_fck: clock-pclk-fck {
293 compatible = "ti,divider-clock";
294 clock-output-names = "pclk_fck";
295 clocks = <&emu_src_ck>;
298 ti,index-starts-at-one;
301 pclkx2_fck: clock-pclkx2-fck {
303 compatible = "ti,divider-clock";
304 clock-output-names = "pclkx2_fck";
305 clocks = <&emu_src_ck>;
308 ti,index-starts-at-one;
311 atclk_fck: clock-atclk-fck {
313 compatible = "ti,divider-clock";
314 clock-output-names = "atclk_fck";
315 clocks = <&emu_src_ck>;
318 ti,index-starts-at-one;
321 traceclk_src_fck: clock-traceclk-src-fck {
323 compatible = "ti,mux-clock";
324 clock-output-names = "traceclk_src_fck";
325 clocks = <&sys_ck>, <&emu_core_alwon_ck>, <&emu_per_alwon_ck>, <&emu_mpu_alwon_ck>;
329 traceclk_fck: clock-traceclk-fck {
331 compatible = "ti,divider-clock";
332 clock-output-names = "traceclk_fck";
333 clocks = <&traceclk_src_fck>;
336 ti,index-starts-at-one;
340 dpll3_m3x2_mul_ck: dpll3_m3x2_mul_ck {
342 compatible = "fixed-factor-clock";
343 clocks = <&dpll3_m3_ck>;
348 dpll3_m3x2_ck: dpll3_m3x2_ck@d00 {
350 compatible = "ti,gate-clock";
351 clocks = <&dpll3_m3x2_mul_ck>;
352 ti,bit-shift = <0xc>;
354 ti,set-bit-to-disable;
357 emu_core_alwon_ck: emu_core_alwon_ck {
359 compatible = "fixed-factor-clock";
360 clocks = <&dpll3_m3x2_ck>;
365 sys_altclk: sys_altclk {
367 compatible = "fixed-clock";
368 clock-frequency = <0x0>;
371 mcbsp_clks: mcbsp_clks {
373 compatible = "fixed-clock";
374 clock-frequency = <0x0>;
379 compatible = "fixed-factor-clock";
380 clocks = <&dpll3_m2_ck>;
385 dpll1_fck: dpll1_fck@940 {
387 compatible = "ti,divider-clock";
392 ti,index-starts-at-one;
395 dpll1_ck: dpll1_ck@904 {
397 compatible = "ti,omap3-dpll-clock";
398 clocks = <&sys_ck>, <&dpll1_fck>;
399 reg = <0x0904>, <0x0924>, <0x0940>, <0x0934>;
402 dpll1_x2_ck: dpll1_x2_ck {
404 compatible = "fixed-factor-clock";
405 clocks = <&dpll1_ck>;
410 dpll1_x2m2_ck: dpll1_x2m2_ck@944 {
412 compatible = "ti,divider-clock";
413 clocks = <&dpll1_x2_ck>;
416 ti,index-starts-at-one;
419 cm_96m_fck: cm_96m_fck {
421 compatible = "fixed-factor-clock";
422 clocks = <&omap_96m_alwon_fck>;
429 compatible = "ti,clksel";
432 #address-cells = <0>;
434 dpll3_m2_ck: clock-dpll3-m2 {
436 compatible = "ti,divider-clock";
437 clock-output-names = "dpll3_m2_ck";
438 clocks = <&dpll3_ck>;
441 ti,index-starts-at-one;
444 omap_96m_fck: clock-omap-96m-fck {
446 compatible = "ti,mux-clock";
447 clock-output-names = "omap_96m_fck";
448 clocks = <&cm_96m_fck>, <&sys_ck>;
452 omap_54m_fck: clock-omap-54m-fck {
454 compatible = "ti,mux-clock";
455 clock-output-names = "omap_54m_fck";
456 clocks = <&dpll4_m3x2_ck>, <&sys_altclk>;
460 omap_48m_fck: clock-omap-48m-fck {
462 compatible = "ti,mux-clock";
463 clock-output-names = "omap_48m_fck";
464 clocks = <&cm_96m_d2_fck>, <&sys_altclk>;
471 compatible = "ti,clksel";
474 #address-cells = <0>;
476 dpll4_m3_ck: clock-dpll4-m3 {
478 compatible = "ti,divider-clock";
479 clock-output-names = "dpll4_m3_ck";
480 clocks = <&dpll4_ck>;
483 ti,index-starts-at-one;
486 dpll4_m4_ck: clock-dpll4-m4 {
488 compatible = "ti,divider-clock";
489 clock-output-names = "dpll4_m4_ck";
490 clocks = <&dpll4_ck>;
492 ti,index-starts-at-one;
496 dpll4_m3x2_mul_ck: dpll4_m3x2_mul_ck {
498 compatible = "fixed-factor-clock";
499 clocks = <&dpll4_m3_ck>;
504 dpll4_m3x2_ck: dpll4_m3x2_ck@d00 {
506 compatible = "ti,gate-clock";
507 clocks = <&dpll4_m3x2_mul_ck>;
508 ti,bit-shift = <0x1c>;
510 ti,set-bit-to-disable;
513 cm_96m_d2_fck: cm_96m_d2_fck {
515 compatible = "fixed-factor-clock";
516 clocks = <&cm_96m_fck>;
521 omap_12m_fck: omap_12m_fck {
523 compatible = "fixed-factor-clock";
524 clocks = <&omap_48m_fck>;
529 dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck {
531 compatible = "ti,fixed-factor-clock";
532 clocks = <&dpll4_m4_ck>;
538 dpll4_m4x2_ck: dpll4_m4x2_ck@d00 {
540 compatible = "ti,gate-clock";
541 clocks = <&dpll4_m4x2_mul_ck>;
542 ti,bit-shift = <0x1d>;
544 ti,set-bit-to-disable;
548 dpll4_m5_ck: dpll4_m5_ck@f40 {
550 compatible = "ti,divider-clock";
551 clocks = <&dpll4_ck>;
554 ti,index-starts-at-one;
557 dpll4_m5x2_mul_ck: dpll4_m5x2_mul_ck {
559 compatible = "ti,fixed-factor-clock";
560 clocks = <&dpll4_m5_ck>;
566 dpll4_m5x2_ck: dpll4_m5x2_ck@d00 {
568 compatible = "ti,gate-clock";
569 clocks = <&dpll4_m5x2_mul_ck>;
570 ti,bit-shift = <0x1e>;
572 ti,set-bit-to-disable;
576 dpll4_m6x2_mul_ck: dpll4_m6x2_mul_ck {
578 compatible = "fixed-factor-clock";
579 clocks = <&dpll4_m6_ck>;
584 dpll4_m6x2_ck: dpll4_m6x2_ck@d00 {
586 compatible = "ti,gate-clock";
587 clocks = <&dpll4_m6x2_mul_ck>;
588 ti,bit-shift = <0x1f>;
590 ti,set-bit-to-disable;
593 emu_per_alwon_ck: emu_per_alwon_ck {
595 compatible = "fixed-factor-clock";
596 clocks = <&dpll4_m6x2_ck>;
603 compatible = "ti,clksel";
606 #address-cells = <0>;
608 clkout2_src_gate_ck: clock-clkout2-src-gate {
610 compatible = "ti,composite-no-wait-gate-clock";
611 clock-output-names = "clkout2_src_gate_ck";
616 clkout2_src_mux_ck: clock-clkout2-src-mux {
618 compatible = "ti,composite-mux-clock";
619 clock-output-names = "clkout2_src_mux_ck";
620 clocks = <&core_ck>, <&sys_ck>, <&cm_96m_fck>, <&omap_54m_fck>;
623 sys_clkout2: clock-sys-clkout2 {
625 compatible = "ti,divider-clock";
626 clock-output-names = "sys_clkout2";
627 clocks = <&clkout2_src_ck>;
630 ti,index-power-of-two;
634 clkout2_src_ck: clkout2_src_ck {
636 compatible = "ti,composite-clock";
637 clocks = <&clkout2_src_gate_ck>, <&clkout2_src_mux_ck>;
642 compatible = "fixed-factor-clock";
643 clocks = <&dpll1_x2m2_ck>;
648 arm_fck: arm_fck@924 {
650 compatible = "ti,divider-clock";
656 emu_mpu_alwon_ck: emu_mpu_alwon_ck {
658 compatible = "fixed-factor-clock";
666 compatible = "ti,clksel";
669 #address-cells = <0>;
671 l3_ick: clock-l3-ick {
673 compatible = "ti,divider-clock";
674 clock-output-names = "l3_ick";
677 ti,index-starts-at-one;
680 l4_ick: clock-l4-ick {
682 compatible = "ti,divider-clock";
683 clock-output-names = "l4_ick";
687 ti,index-starts-at-one;
690 gpt10_mux_fck: clock-gpt10-mux-fck {
692 compatible = "ti,composite-mux-clock";
693 clock-output-names = "gpt10_mux_fck";
694 clocks = <&omap_32k_fck>, <&sys_ck>;
698 gpt11_mux_fck: clock-gpt11-mux-fck {
700 compatible = "ti,composite-mux-clock";
701 clock-output-names = "gpt11_mux_fck";
702 clocks = <&omap_32k_fck>, <&sys_ck>;
709 compatible = "ti,clksel";
712 #address-cells = <0>;
714 rm_ick: clock-rm-ick {
716 compatible = "ti,divider-clock";
717 clock-output-names = "rm_ick";
721 ti,index-starts-at-one;
724 gpt1_mux_fck: clock-gpt1-mux-fck {
726 compatible = "ti,composite-mux-clock";
727 clock-output-names = "gpt1_mux_fck";
728 clocks = <&omap_32k_fck>, <&sys_ck>;
732 /* CM_FCLKEN1_CORE */
734 compatible = "ti,clksel";
737 #address-cells = <0>;
739 gpt10_gate_fck: clock-gpt10-gate-fck {
741 compatible = "ti,composite-gate-clock";
742 clock-output-names = "gpt10_gate_fck";
747 gpt11_gate_fck: clock-gpt11-gate-fck {
749 compatible = "ti,composite-gate-clock";
750 clock-output-names = "gpt11_gate_fck";
755 mmchs2_fck: clock-mmchs2-fck {
757 compatible = "ti,wait-gate-clock";
758 clock-output-names = "mmchs2_fck";
759 clocks = <&core_96m_fck>;
763 mmchs1_fck: clock-mmchs1-fck {
765 compatible = "ti,wait-gate-clock";
766 clock-output-names = "mmchs1_fck";
767 clocks = <&core_96m_fck>;
771 i2c3_fck: clock-i2c3-fck {
773 compatible = "ti,wait-gate-clock";
774 clock-output-names = "i2c3_fck";
775 clocks = <&core_96m_fck>;
779 i2c2_fck: clock-i2c2-fck {
781 compatible = "ti,wait-gate-clock";
782 clock-output-names = "i2c2_fck";
783 clocks = <&core_96m_fck>;
787 i2c1_fck: clock-i2c1-fck {
789 compatible = "ti,wait-gate-clock";
790 clock-output-names = "i2c1_fck";
791 clocks = <&core_96m_fck>;
795 mcbsp5_gate_fck: clock-mcbsp5-gate-fck {
797 compatible = "ti,composite-gate-clock";
798 clock-output-names = "mcbsp5_gate_fck";
799 clocks = <&mcbsp_clks>;
803 mcbsp1_gate_fck: clock-mcbsp1-gate-fck {
805 compatible = "ti,composite-gate-clock";
806 clock-output-names = "mcbsp1_gate_fck";
807 clocks = <&mcbsp_clks>;
811 mcspi4_fck: clock-mcspi4-fck {
813 compatible = "ti,wait-gate-clock";
814 clock-output-names = "mcspi4_fck";
815 clocks = <&core_48m_fck>;
819 mcspi3_fck: clock-mcspi3-fck {
821 compatible = "ti,wait-gate-clock";
822 clock-output-names = "mcspi3_fck";
823 clocks = <&core_48m_fck>;
827 mcspi2_fck: clock-mcspi2-fck {
829 compatible = "ti,wait-gate-clock";
830 clock-output-names = "mcspi2_fck";
831 clocks = <&core_48m_fck>;
835 mcspi1_fck: clock-mcspi1-fck {
837 compatible = "ti,wait-gate-clock";
838 clock-output-names = "mcspi1_fck";
839 clocks = <&core_48m_fck>;
843 uart2_fck: clock-uart2-fck {
845 compatible = "ti,wait-gate-clock";
846 clock-output-names = "uart2_fck";
847 clocks = <&core_48m_fck>;
851 uart1_fck: clock-uart1-fck {
853 compatible = "ti,wait-gate-clock";
854 clock-output-names = "uart1_fck";
855 clocks = <&core_48m_fck>;
859 hdq_fck: clock-hdq-fck {
861 compatible = "ti,wait-gate-clock";
862 clock-output-names = "hdq_fck";
863 clocks = <&core_12m_fck>;
868 gpt10_fck: gpt10_fck {
870 compatible = "ti,composite-clock";
871 clocks = <&gpt10_gate_fck>, <&gpt10_mux_fck>;
874 gpt11_fck: gpt11_fck {
876 compatible = "ti,composite-clock";
877 clocks = <&gpt11_gate_fck>, <&gpt11_mux_fck>;
880 core_96m_fck: core_96m_fck {
882 compatible = "fixed-factor-clock";
883 clocks = <&omap_96m_fck>;
888 core_48m_fck: core_48m_fck {
890 compatible = "fixed-factor-clock";
891 clocks = <&omap_48m_fck>;
896 core_12m_fck: core_12m_fck {
898 compatible = "fixed-factor-clock";
899 clocks = <&omap_12m_fck>;
904 core_l3_ick: core_l3_ick {
906 compatible = "fixed-factor-clock";
912 /* CM_ICLKEN1_CORE */
914 compatible = "ti,clksel";
917 #address-cells = <0>;
919 sdrc_ick: clock-sdrc-ick {
921 compatible = "ti,wait-gate-clock";
922 clock-output-names = "sdrc_ick";
923 clocks = <&core_l3_ick>;
927 mmchs2_ick: clock-mmchs2-ick {
929 compatible = "ti,omap3-interface-clock";
930 clock-output-names = "mmchs2_ick";
931 clocks = <&core_l4_ick>;
935 mmchs1_ick: clock-mmchs1-ick {
937 compatible = "ti,omap3-interface-clock";
938 clock-output-names = "mmchs1_ick";
939 clocks = <&core_l4_ick>;
943 hdq_ick: clock-hdq-ick {
945 compatible = "ti,omap3-interface-clock";
946 clock-output-names = "hdq_ick";
947 clocks = <&core_l4_ick>;
951 mcspi4_ick: clock-mcspi4-ick {
953 compatible = "ti,omap3-interface-clock";
954 clock-output-names = "mcspi4_ick";
955 clocks = <&core_l4_ick>;
959 mcspi3_ick: clock-mcspi3-ick {
961 compatible = "ti,omap3-interface-clock";
962 clock-output-names = "mcspi3_ick";
963 clocks = <&core_l4_ick>;
967 mcspi2_ick: clock-mcspi2-ick {
969 compatible = "ti,omap3-interface-clock";
970 clock-output-names = "mcspi2_ick";
971 clocks = <&core_l4_ick>;
975 mcspi1_ick: clock-mcspi1-ick {
977 compatible = "ti,omap3-interface-clock";
978 clock-output-names = "mcspi1_ick";
979 clocks = <&core_l4_ick>;
983 i2c3_ick: clock-i2c3-ick {
985 compatible = "ti,omap3-interface-clock";
986 clock-output-names = "i2c3_ick";
987 clocks = <&core_l4_ick>;
991 i2c2_ick: clock-i2c2-ick {
993 compatible = "ti,omap3-interface-clock";
994 clock-output-names = "i2c2_ick";
995 clocks = <&core_l4_ick>;
999 i2c1_ick: clock-i2c1-ick {
1001 compatible = "ti,omap3-interface-clock";
1002 clock-output-names = "i2c1_ick";
1003 clocks = <&core_l4_ick>;
1004 ti,bit-shift = <15>;
1007 uart2_ick: clock-uart2-ick {
1009 compatible = "ti,omap3-interface-clock";
1010 clock-output-names = "uart2_ick";
1011 clocks = <&core_l4_ick>;
1012 ti,bit-shift = <14>;
1015 uart1_ick: clock-uart1-ick {
1017 compatible = "ti,omap3-interface-clock";
1018 clock-output-names = "uart1_ick";
1019 clocks = <&core_l4_ick>;
1020 ti,bit-shift = <13>;
1023 gpt11_ick: clock-gpt11-ick {
1025 compatible = "ti,omap3-interface-clock";
1026 clock-output-names = "gpt11_ick";
1027 clocks = <&core_l4_ick>;
1028 ti,bit-shift = <12>;
1031 gpt10_ick: clock-gpt10-ick {
1033 compatible = "ti,omap3-interface-clock";
1034 clock-output-names = "gpt10_ick";
1035 clocks = <&core_l4_ick>;
1036 ti,bit-shift = <11>;
1039 mcbsp5_ick: clock-mcbsp5-ick {
1041 compatible = "ti,omap3-interface-clock";
1042 clock-output-names = "mcbsp5_ick";
1043 clocks = <&core_l4_ick>;
1044 ti,bit-shift = <10>;
1047 mcbsp1_ick: clock-mcbsp1-ick {
1049 compatible = "ti,omap3-interface-clock";
1050 clock-output-names = "mcbsp1_ick";
1051 clocks = <&core_l4_ick>;
1055 omapctrl_ick: clock-omapctrl-ick {
1057 compatible = "ti,omap3-interface-clock";
1058 clock-output-names = "omapctrl_ick";
1059 clocks = <&core_l4_ick>;
1063 aes2_ick: clock-aes2-ick {
1065 compatible = "ti,omap3-interface-clock";
1066 clock-output-names = "aes2_ick";
1067 clocks = <&core_l4_ick>;
1068 ti,bit-shift = <28>;
1071 sha12_ick: clock-sha12-ick {
1073 compatible = "ti,omap3-interface-clock";
1074 clock-output-names = "sha12_ick";
1075 clocks = <&core_l4_ick>;
1076 ti,bit-shift = <27>;
1080 gpmc_fck: gpmc_fck {
1082 compatible = "fixed-factor-clock";
1083 clocks = <&core_l3_ick>;
1088 core_l4_ick: core_l4_ick {
1090 compatible = "fixed-factor-clock";
1098 compatible = "ti,clksel";
1101 #address-cells = <0>;
1103 dss_tv_fck: clock-dss-tv-fck {
1105 compatible = "ti,gate-clock";
1106 clock-output-names = "dss_tv_fck";
1107 clocks = <&omap_54m_fck>;
1111 dss_96m_fck: clock-dss-96m-fck {
1113 compatible = "ti,gate-clock";
1114 clock-output-names = "dss_96m_fck";
1115 clocks = <&omap_96m_fck>;
1119 dss2_alwon_fck: clock-dss2-alwon-fck {
1121 compatible = "ti,gate-clock";
1122 clock-output-names = "dss2_alwon_fck";
1128 dummy_ck: dummy_ck {
1130 compatible = "fixed-clock";
1131 clock-frequency = <0>;
1134 /* CM_FCLKEN_WKUP */
1136 compatible = "ti,clksel";
1139 #address-cells = <0>;
1141 gpt1_gate_fck: clock-gpt1-gate-fck {
1143 compatible = "ti,composite-gate-clock";
1144 clock-output-names = "gpt1_gate_fck";
1149 gpio1_dbck: clock-gpio1-dbck {
1151 compatible = "ti,gate-clock";
1152 clock-output-names = "gpio1_dbck";
1153 clocks = <&wkup_32k_fck>;
1157 wdt2_fck: clock-wdt2-fck {
1159 compatible = "ti,wait-gate-clock";
1160 clock-output-names = "wdt2_fck";
1161 clocks = <&wkup_32k_fck>;
1166 gpt1_fck: gpt1_fck {
1168 compatible = "ti,composite-clock";
1169 clocks = <&gpt1_gate_fck>, <&gpt1_mux_fck>;
1172 wkup_32k_fck: wkup_32k_fck {
1174 compatible = "fixed-factor-clock";
1175 clocks = <&omap_32k_fck>;
1180 /* CM_ICLKEN_WKUP */
1182 compatible = "ti,clksel";
1185 #address-cells = <0>;
1187 wdt2_ick: clock-wdt2-ick {
1189 compatible = "ti,omap3-interface-clock";
1190 clock-output-names = "wdt2_ick";
1191 clocks = <&wkup_l4_ick>;
1195 wdt1_ick: clock-wdt1-ick {
1197 compatible = "ti,omap3-interface-clock";
1198 clock-output-names = "wdt1_ick";
1199 clocks = <&wkup_l4_ick>;
1203 gpio1_ick: clock-gpio1-ick {
1205 compatible = "ti,omap3-interface-clock";
1206 clock-output-names = "gpio1_ick";
1207 clocks = <&wkup_l4_ick>;
1211 omap_32ksync_ick: clock-omap-32ksync-ick {
1213 compatible = "ti,omap3-interface-clock";
1214 clock-output-names = "omap_32ksync_ick";
1215 clocks = <&wkup_l4_ick>;
1219 gpt12_ick: clock-gpt12-ick {
1221 compatible = "ti,omap3-interface-clock";
1222 clock-output-names = "gpt12_ick";
1223 clocks = <&wkup_l4_ick>;
1227 gpt1_ick: clock-gpt1-ick {
1229 compatible = "ti,omap3-interface-clock";
1230 clock-output-names = "gpt1_ick";
1231 clocks = <&wkup_l4_ick>;
1236 per_96m_fck: per_96m_fck {
1238 compatible = "fixed-factor-clock";
1239 clocks = <&omap_96m_alwon_fck>;
1244 per_48m_fck: per_48m_fck {
1246 compatible = "fixed-factor-clock";
1247 clocks = <&omap_48m_fck>;
1254 compatible = "ti,clksel";
1257 #address-cells = <0>;
1259 uart3_fck: clock-uart3-fck {
1261 compatible = "ti,wait-gate-clock";
1262 clock-output-names = "uart3_fck";
1263 clocks = <&per_48m_fck>;
1264 ti,bit-shift = <11>;
1267 gpt2_gate_fck: clock-gpt2-gate-fck {
1269 compatible = "ti,composite-gate-clock";
1270 clock-output-names = "gpt2_gate_fck";
1275 gpt3_gate_fck: clock-gpt3-gate-fck {
1277 compatible = "ti,composite-gate-clock";
1278 clock-output-names = "gpt3_gate_fck";
1283 gpt4_gate_fck: clock-gpt4-gate-fck {
1285 compatible = "ti,composite-gate-clock";
1286 clock-output-names = "gpt4_gate_fck";
1291 gpt5_gate_fck: clock-gpt5-gate-fck {
1293 compatible = "ti,composite-gate-clock";
1294 clock-output-names = "gpt5_gate_fck";
1299 gpt6_gate_fck: clock-gpt6-gate-fck {
1301 compatible = "ti,composite-gate-clock";
1302 clock-output-names = "gpt6_gate_fck";
1307 gpt7_gate_fck: clock-gpt7-gate-fck {
1309 compatible = "ti,composite-gate-clock";
1310 clock-output-names = "gpt7_gate_fck";
1315 gpt8_gate_fck: clock-gpt8-gate-fck {
1317 compatible = "ti,composite-gate-clock";
1318 clock-output-names = "gpt8_gate_fck";
1323 gpt9_gate_fck: clock-gpt9-gate-fck {
1325 compatible = "ti,composite-gate-clock";
1326 clock-output-names = "gpt9_gate_fck";
1328 ti,bit-shift = <10>;
1331 gpio6_dbck: clock-gpio6-dbck {
1333 compatible = "ti,gate-clock";
1334 clock-output-names = "gpio6_dbck";
1335 clocks = <&per_32k_alwon_fck>;
1336 ti,bit-shift = <17>;
1339 gpio5_dbck: clock-gpio5-dbck {
1341 compatible = "ti,gate-clock";
1342 clock-output-names = "gpio5_dbck";
1343 clocks = <&per_32k_alwon_fck>;
1344 ti,bit-shift = <16>;
1347 gpio4_dbck: clock-gpio4-dbck {
1349 compatible = "ti,gate-clock";
1350 clock-output-names = "gpio4_dbck";
1351 clocks = <&per_32k_alwon_fck>;
1352 ti,bit-shift = <15>;
1355 gpio3_dbck: clock-gpio3-dbck {
1357 compatible = "ti,gate-clock";
1358 clock-output-names = "gpio3_dbck";
1359 clocks = <&per_32k_alwon_fck>;
1360 ti,bit-shift = <14>;
1363 gpio2_dbck: clock-gpio2-dbck {
1365 compatible = "ti,gate-clock";
1366 clock-output-names = "gpio2_dbck";
1367 clocks = <&per_32k_alwon_fck>;
1368 ti,bit-shift = <13>;
1371 wdt3_fck: clock-wdt3-fck {
1373 compatible = "ti,wait-gate-clock";
1374 clock-output-names = "wdt3_fck";
1375 clocks = <&per_32k_alwon_fck>;
1376 ti,bit-shift = <12>;
1379 mcbsp2_gate_fck: clock-mcbsp2-gate-fck {
1381 compatible = "ti,composite-gate-clock";
1382 clock-output-names = "mcbsp2_gate_fck";
1383 clocks = <&mcbsp_clks>;
1387 mcbsp3_gate_fck: clock-mcbsp3-gate-fck {
1389 compatible = "ti,composite-gate-clock";
1390 clock-output-names = "mcbsp3_gate_fck";
1391 clocks = <&mcbsp_clks>;
1395 mcbsp4_gate_fck: clock-mcbsp4-gate-fck {
1397 compatible = "ti,composite-gate-clock";
1398 clock-output-names = "mcbsp4_gate_fck";
1399 clocks = <&mcbsp_clks>;
1406 compatible = "ti,clksel";
1409 #address-cells = <0>;
1411 gpt2_mux_fck: clock-gpt2-mux-fck {
1413 compatible = "ti,composite-mux-clock";
1414 clock-output-names = "gpt2_mux_fck";
1415 clocks = <&omap_32k_fck>, <&sys_ck>;
1418 gpt3_mux_fck: clock-gpt3-mux-fck {
1420 compatible = "ti,composite-mux-clock";
1421 clock-output-names = "gpt3_mux_fck";
1422 clocks = <&omap_32k_fck>, <&sys_ck>;
1426 gpt4_mux_fck: clock-gpt4-mux-fck {
1428 compatible = "ti,composite-mux-clock";
1429 clock-output-names = "gpt4_mux_fck";
1430 clocks = <&omap_32k_fck>, <&sys_ck>;
1434 gpt5_mux_fck: clock-gpt5-mux-fck {
1436 compatible = "ti,composite-mux-clock";
1437 clock-output-names = "gpt5_mux_fck";
1438 clocks = <&omap_32k_fck>, <&sys_ck>;
1442 gpt6_mux_fck: clock-gpt6-mux-fck {
1444 compatible = "ti,composite-mux-clock";
1445 clock-output-names = "gpt6_mux_fck";
1446 clocks = <&omap_32k_fck>, <&sys_ck>;
1450 gpt7_mux_fck: clock-gpt7-mux-fck {
1452 compatible = "ti,composite-mux-clock";
1453 clock-output-names = "gpt7_mux_fck";
1454 clocks = <&omap_32k_fck>, <&sys_ck>;
1458 gpt8_mux_fck: clock-gpt8-mux-fck {
1460 compatible = "ti,composite-mux-clock";
1461 clock-output-names = "gpt8_mux_fck";
1462 clocks = <&omap_32k_fck>, <&sys_ck>;
1466 gpt9_mux_fck: clock-gpt9-mux-fck {
1468 compatible = "ti,composite-mux-clock";
1469 clock-output-names = "gpt9_mux_fck";
1470 clocks = <&omap_32k_fck>, <&sys_ck>;
1475 gpt2_fck: gpt2_fck {
1477 compatible = "ti,composite-clock";
1478 clocks = <&gpt2_gate_fck>, <&gpt2_mux_fck>;
1481 gpt3_fck: gpt3_fck {
1483 compatible = "ti,composite-clock";
1484 clocks = <&gpt3_gate_fck>, <&gpt3_mux_fck>;
1487 gpt4_fck: gpt4_fck {
1489 compatible = "ti,composite-clock";
1490 clocks = <&gpt4_gate_fck>, <&gpt4_mux_fck>;
1493 gpt5_fck: gpt5_fck {
1495 compatible = "ti,composite-clock";
1496 clocks = <&gpt5_gate_fck>, <&gpt5_mux_fck>;
1499 gpt6_fck: gpt6_fck {
1501 compatible = "ti,composite-clock";
1502 clocks = <&gpt6_gate_fck>, <&gpt6_mux_fck>;
1505 gpt7_fck: gpt7_fck {
1507 compatible = "ti,composite-clock";
1508 clocks = <&gpt7_gate_fck>, <&gpt7_mux_fck>;
1511 gpt8_fck: gpt8_fck {
1513 compatible = "ti,composite-clock";
1514 clocks = <&gpt8_gate_fck>, <&gpt8_mux_fck>;
1517 gpt9_fck: gpt9_fck {
1519 compatible = "ti,composite-clock";
1520 clocks = <&gpt9_gate_fck>, <&gpt9_mux_fck>;
1523 per_32k_alwon_fck: per_32k_alwon_fck {
1525 compatible = "fixed-factor-clock";
1526 clocks = <&omap_32k_fck>;
1531 per_l4_ick: per_l4_ick {
1533 compatible = "fixed-factor-clock";
1541 compatible = "ti,clksel";
1544 #address-cells = <0>;
1546 gpio6_ick: clock-gpio6-ick {
1548 compatible = "ti,omap3-interface-clock";
1549 clock-output-names = "gpio6_ick";
1550 clocks = <&per_l4_ick>;
1551 ti,bit-shift = <17>;
1554 gpio5_ick: clock-gpio5-ick {
1556 compatible = "ti,omap3-interface-clock";
1557 clock-output-names = "gpio5_ick";
1558 clocks = <&per_l4_ick>;
1559 ti,bit-shift = <16>;
1562 gpio4_ick: clock-gpio4-ick {
1564 compatible = "ti,omap3-interface-clock";
1565 clock-output-names = "gpio4_ick";
1566 clocks = <&per_l4_ick>;
1567 ti,bit-shift = <15>;
1570 gpio3_ick: clock-gpio3-ick {
1572 compatible = "ti,omap3-interface-clock";
1573 clock-output-names = "gpio3_ick";
1574 clocks = <&per_l4_ick>;
1575 ti,bit-shift = <14>;
1578 gpio2_ick: clock-gpio2-ick {
1580 compatible = "ti,omap3-interface-clock";
1581 clock-output-names = "gpio2_ick";
1582 clocks = <&per_l4_ick>;
1583 ti,bit-shift = <13>;
1586 wdt3_ick: clock-wdt3-ick {
1588 compatible = "ti,omap3-interface-clock";
1589 clock-output-names = "wdt3_ick";
1590 clocks = <&per_l4_ick>;
1591 ti,bit-shift = <12>;
1594 uart3_ick: clock-uart3-ick {
1596 compatible = "ti,omap3-interface-clock";
1597 clock-output-names = "uart3_ick";
1598 clocks = <&per_l4_ick>;
1599 ti,bit-shift = <11>;
1602 uart4_ick: clock-uart4-ick {
1604 compatible = "ti,omap3-interface-clock";
1605 clock-output-names = "uart4_ick";
1606 clocks = <&per_l4_ick>;
1607 ti,bit-shift = <18>;
1610 gpt9_ick: clock-gpt9-ick {
1612 compatible = "ti,omap3-interface-clock";
1613 clock-output-names = "gpt9_ick";
1614 clocks = <&per_l4_ick>;
1615 ti,bit-shift = <10>;
1618 gpt8_ick: clock-gpt8-ick {
1620 compatible = "ti,omap3-interface-clock";
1621 clock-output-names = "gpt8_ick";
1622 clocks = <&per_l4_ick>;
1626 gpt7_ick: clock-gpt7-ick {
1628 compatible = "ti,omap3-interface-clock";
1629 clock-output-names = "gpt7_ick";
1630 clocks = <&per_l4_ick>;
1634 gpt6_ick: clock-gpt6-ick {
1636 compatible = "ti,omap3-interface-clock";
1637 clock-output-names = "gpt6_ick";
1638 clocks = <&per_l4_ick>;
1642 gpt5_ick: clock-gpt5-ick {
1644 compatible = "ti,omap3-interface-clock";
1645 clock-output-names = "gpt5_ick";
1646 clocks = <&per_l4_ick>;
1650 gpt4_ick: clock-gpt4-ick {
1652 compatible = "ti,omap3-interface-clock";
1653 clock-output-names = "gpt4_ick";
1654 clocks = <&per_l4_ick>;
1658 gpt3_ick: clock-gpt3-ick {
1660 compatible = "ti,omap3-interface-clock";
1661 clock-output-names = "gpt3_ick";
1662 clocks = <&per_l4_ick>;
1666 gpt2_ick: clock-gpt2-ick {
1668 compatible = "ti,omap3-interface-clock";
1669 clock-output-names = "gpt2_ick";
1670 clocks = <&per_l4_ick>;
1674 mcbsp2_ick: clock-mcbsp2-ick {
1676 compatible = "ti,omap3-interface-clock";
1677 clock-output-names = "mcbsp2_ick";
1678 clocks = <&per_l4_ick>;
1682 mcbsp3_ick: clock-mcbsp3-ick {
1684 compatible = "ti,omap3-interface-clock";
1685 clock-output-names = "mcbsp3_ick";
1686 clocks = <&per_l4_ick>;
1690 mcbsp4_ick: clock-mcbsp4-ick {
1692 compatible = "ti,omap3-interface-clock";
1693 clock-output-names = "mcbsp4_ick";
1694 clocks = <&per_l4_ick>;
1699 emu_src_ck: emu_src_ck {
1701 compatible = "ti,clkdm-gate-clock";
1702 clocks = <&emu_src_mux_ck>;
1705 secure_32k_fck: secure_32k_fck {
1707 compatible = "fixed-clock";
1708 clock-frequency = <32768>;
1711 gpt12_fck: gpt12_fck {
1713 compatible = "fixed-factor-clock";
1714 clocks = <&secure_32k_fck>;
1719 wdt1_fck: wdt1_fck {
1721 compatible = "fixed-factor-clock";
1722 clocks = <&secure_32k_fck>;
1729 core_l3_clkdm: core_l3_clkdm {
1730 compatible = "ti,clockdomain";
1731 clocks = <&sdrc_ick>;
1734 dpll3_clkdm: dpll3_clkdm {
1735 compatible = "ti,clockdomain";
1736 clocks = <&dpll3_ck>;
1739 dpll1_clkdm: dpll1_clkdm {
1740 compatible = "ti,clockdomain";
1741 clocks = <&dpll1_ck>;
1744 per_clkdm: per_clkdm {
1745 compatible = "ti,clockdomain";
1746 clocks = <&uart3_fck>, <&gpio6_dbck>, <&gpio5_dbck>,
1747 <&gpio4_dbck>, <&gpio3_dbck>, <&gpio2_dbck>,
1748 <&wdt3_fck>, <&gpio6_ick>, <&gpio5_ick>, <&gpio4_ick>,
1749 <&gpio3_ick>, <&gpio2_ick>, <&wdt3_ick>, <&uart3_ick>,
1750 <&uart4_ick>, <&gpt9_ick>, <&gpt8_ick>, <&gpt7_ick>,
1751 <&gpt6_ick>, <&gpt5_ick>, <&gpt4_ick>, <&gpt3_ick>,
1752 <&gpt2_ick>, <&mcbsp2_ick>, <&mcbsp3_ick>,
1756 emu_clkdm: emu_clkdm {
1757 compatible = "ti,clockdomain";
1758 clocks = <&emu_src_ck>;
1761 dpll4_clkdm: dpll4_clkdm {
1762 compatible = "ti,clockdomain";
1763 clocks = <&dpll4_ck>;
1766 wkup_clkdm: wkup_clkdm {
1767 compatible = "ti,clockdomain";
1768 clocks = <&gpio1_dbck>, <&wdt2_fck>, <&wdt2_ick>, <&wdt1_ick>,
1769 <&gpio1_ick>, <&omap_32ksync_ick>, <&gpt12_ick>,
1773 dss_clkdm: dss_clkdm {
1774 compatible = "ti,clockdomain";
1775 clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>;
1778 core_l4_clkdm: core_l4_clkdm {
1779 compatible = "ti,clockdomain";
1780 clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
1781 <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
1782 <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
1783 <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
1784 <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
1785 <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
1786 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
1787 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
1788 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>;