src/arm64/freescale/tqmls104xa-mbls10xxa-fman.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
   2 /*
   3  * Copyright (c) 2019,2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
   4  * D-82229 Seefeld, Germany.
   5  * Author: Gregor Herburger, Timo Herbrecher
   6  *
   7  * Device Tree Include file for MBLS10xxA from TQ (FMAN related sections)
   8  */
   9
  10 #include <dt-bindings/net/ti-dp83867.h>
  11
  12 &enet0 {
  13         status = "disabled";
  14 };
  15
  16 &enet1 {
  17         status = "disabled";
  18 };
  19
  20 &enet2 {
  21         phy-handle = <&rgmii_phy1>;
  22         phy-connection-type = "rgmii";
  23         phy-mode = "rgmii-id";
  24         status = "okay";
  25 };
  26
  27 &enet3 {
  28         phy-handle = <&rgmii_phy2>;
  29         phy-connection-type = "rgmii";
  30         phy-mode = "rgmii-id";
  31         status = "okay";
  32 };
  33
  34 &enet4 {
  35         status = "disabled";
  36 };
  37
  38 &enet5 {
  39         status = "disabled";
  40 };
  41
  42 &enet6 {
  43         status = "disabled";
  44 };
  45
  46 &mdio0 {
  47         status = "okay";
  48
  49         qsgmii2_phy1: ethernet-phy@0 {
  50                 compatible = "ethernet-phy-ieee802.3-c22";
  51                 reg = <0x00>;
  52         };
  53
  54         qsgmii2_phy2: ethernet-phy@1 {
  55                 compatible = "ethernet-phy-ieee802.3-c22";
  56                 reg = <0x01>;
  57         };
  58
  59         qsgmii2_phy3: ethernet-phy@2 {
  60                 compatible = "ethernet-phy-ieee802.3-c22";
  61                 reg = <0x02>;
  62         };
  63
  64         qsgmii2_phy4: ethernet-phy@3 {
  65                 compatible = "ethernet-phy-ieee802.3-c22";
  66                 reg = <0x03>;
  67         };
  68
  69         rgmii_phy2: ethernet-phy@c {
  70                 compatible = "ethernet-phy-ieee802.3-c22";
  71                 reg = <0x0c>;
  72                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
  73                 ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
  74                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  75         };
  76
  77         rgmii_phy1: ethernet-phy@e {
  78                 compatible = "ethernet-phy-ieee802.3-c22";
  79                 reg = <0x0e>;
  80                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
  81                 ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
  82                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
  83         };
  84
  85         qsgmii1_phy1: ethernet-phy@1c {
  86                 compatible = "ethernet-phy-ieee802.3-c22";
  87                 reg = <0x1c>;
  88         };
  89
  90         qsgmii1_phy2: ethernet-phy@1d {
  91                 compatible = "ethernet-phy-ieee802.3-c22";
  92                 reg = <0x1d>;
  93         };
  94
  95         qsgmii1_phy3: ethernet-phy@1e {
  96                 compatible = "ethernet-phy-ieee802.3-c22";
  97                 reg = <0x1e>;
  98         };
  99
 100         qsgmii1_phy4: ethernet-phy@1f {
 101                 compatible = "ethernet-phy-ieee802.3-c22";
 102                 reg = <0x1f>;
 103         };
 104 };