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Squashed 'dts/upstream/' content from commit aaba2d45dc2a
[thirdparty/u-boot.git] / src / arm64 / nvidia / tegra194-p3509-0000.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6
7 / {
8 bus@0 {
9 aconnect@2900000 {
10 status = "okay";
11
12 ahub@2900800 {
13 status = "okay";
14
15 i2s@2901200 {
16 status = "okay";
17
18 ports {
19 #address-cells = <1>;
20 #size-cells = <0>;
21
22 port@0 {
23 reg = <0>;
24
25 i2s3_cif_ep: endpoint {
26 remote-endpoint = <&xbar_i2s3_ep>;
27 };
28 };
29
30 i2s3_port: port@1 {
31 reg = <1>;
32
33 i2s3_dap_ep: endpoint {
34 dai-format = "i2s";
35 /* Place holder for external Codec */
36 };
37 };
38 };
39 };
40
41 i2s@2901400 {
42 status = "okay";
43
44 ports {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 port@0 {
49 reg = <0>;
50
51 i2s5_cif_ep: endpoint {
52 remote-endpoint = <&xbar_i2s5_ep>;
53 };
54 };
55
56 i2s5_port: port@1 {
57 reg = <1>;
58
59 i2s5_dap_ep: endpoint {
60 dai-format = "i2s";
61 /* Place holder for external Codec */
62 };
63 };
64 };
65 };
66
67 sfc@2902000 {
68 status = "okay";
69
70 ports {
71 #address-cells = <1>;
72 #size-cells = <0>;
73
74 port@0 {
75 reg = <0>;
76
77 sfc1_cif_in_ep: endpoint {
78 remote-endpoint = <&xbar_sfc1_in_ep>;
79 convert-rate = <44100>;
80 };
81 };
82
83 sfc1_out_port: port@1 {
84 reg = <1>;
85
86 sfc1_cif_out_ep: endpoint {
87 remote-endpoint = <&xbar_sfc1_out_ep>;
88 convert-rate = <48000>;
89 };
90 };
91 };
92 };
93
94 sfc@2902200 {
95 status = "okay";
96
97 ports {
98 #address-cells = <1>;
99 #size-cells = <0>;
100
101 port@0 {
102 reg = <0>;
103
104 sfc2_cif_in_ep: endpoint {
105 remote-endpoint = <&xbar_sfc2_in_ep>;
106 };
107 };
108
109 sfc2_out_port: port@1 {
110 reg = <1>;
111
112 sfc2_cif_out_ep: endpoint {
113 remote-endpoint = <&xbar_sfc2_out_ep>;
114 };
115 };
116 };
117 };
118
119 sfc@2902400 {
120 status = "okay";
121
122 ports {
123 #address-cells = <1>;
124 #size-cells = <0>;
125
126 port@0 {
127 reg = <0>;
128
129 sfc3_cif_in_ep: endpoint {
130 remote-endpoint = <&xbar_sfc3_in_ep>;
131 };
132 };
133
134 sfc3_out_port: port@1 {
135 reg = <1>;
136
137 sfc3_cif_out_ep: endpoint {
138 remote-endpoint = <&xbar_sfc3_out_ep>;
139 };
140 };
141 };
142 };
143
144 sfc@2902600 {
145 status = "okay";
146
147 ports {
148 #address-cells = <1>;
149 #size-cells = <0>;
150
151 port@0 {
152 reg = <0>;
153
154 sfc4_cif_in_ep: endpoint {
155 remote-endpoint = <&xbar_sfc4_in_ep>;
156 };
157 };
158
159 sfc4_out_port: port@1 {
160 reg = <1>;
161
162 sfc4_cif_out_ep: endpoint {
163 remote-endpoint = <&xbar_sfc4_out_ep>;
164 };
165 };
166 };
167 };
168
169 amx@2903000 {
170 status = "okay";
171
172 ports {
173 #address-cells = <1>;
174 #size-cells = <0>;
175
176 port@0 {
177 reg = <0>;
178
179 amx1_in1_ep: endpoint {
180 remote-endpoint = <&xbar_amx1_in1_ep>;
181 };
182 };
183
184 port@1 {
185 reg = <1>;
186
187 amx1_in2_ep: endpoint {
188 remote-endpoint = <&xbar_amx1_in2_ep>;
189 };
190 };
191
192 port@2 {
193 reg = <2>;
194
195 amx1_in3_ep: endpoint {
196 remote-endpoint = <&xbar_amx1_in3_ep>;
197 };
198 };
199
200 port@3 {
201 reg = <3>;
202
203 amx1_in4_ep: endpoint {
204 remote-endpoint = <&xbar_amx1_in4_ep>;
205 };
206 };
207
208 amx1_out_port: port@4 {
209 reg = <4>;
210
211 amx1_out_ep: endpoint {
212 remote-endpoint = <&xbar_amx1_out_ep>;
213 };
214 };
215 };
216 };
217
218 amx@2903100 {
219 status = "okay";
220
221 ports {
222 #address-cells = <1>;
223 #size-cells = <0>;
224
225 port@0 {
226 reg = <0>;
227
228 amx2_in1_ep: endpoint {
229 remote-endpoint = <&xbar_amx2_in1_ep>;
230 };
231 };
232
233 port@1 {
234 reg = <1>;
235
236 amx2_in2_ep: endpoint {
237 remote-endpoint = <&xbar_amx2_in2_ep>;
238 };
239 };
240
241 amx2_in3_port: port@2 {
242 reg = <2>;
243
244 amx2_in3_ep: endpoint {
245 remote-endpoint = <&xbar_amx2_in3_ep>;
246 };
247 };
248
249 amx2_in4_port: port@3 {
250 reg = <3>;
251
252 amx2_in4_ep: endpoint {
253 remote-endpoint = <&xbar_amx2_in4_ep>;
254 };
255 };
256
257 amx2_out_port: port@4 {
258 reg = <4>;
259
260 amx2_out_ep: endpoint {
261 remote-endpoint = <&xbar_amx2_out_ep>;
262 };
263 };
264 };
265 };
266
267 amx@2903200 {
268 status = "okay";
269
270 ports {
271 #address-cells = <1>;
272 #size-cells = <0>;
273
274 port@0 {
275 reg = <0>;
276
277 amx3_in1_ep: endpoint {
278 remote-endpoint = <&xbar_amx3_in1_ep>;
279 };
280 };
281
282 port@1 {
283 reg = <1>;
284
285 amx3_in2_ep: endpoint {
286 remote-endpoint = <&xbar_amx3_in2_ep>;
287 };
288 };
289
290 port@2 {
291 reg = <2>;
292
293 amx3_in3_ep: endpoint {
294 remote-endpoint = <&xbar_amx3_in3_ep>;
295 };
296 };
297
298 port@3 {
299 reg = <3>;
300
301 amx3_in4_ep: endpoint {
302 remote-endpoint = <&xbar_amx3_in4_ep>;
303 };
304 };
305
306 amx3_out_port: port@4 {
307 reg = <4>;
308
309 amx3_out_ep: endpoint {
310 remote-endpoint = <&xbar_amx3_out_ep>;
311 };
312 };
313 };
314 };
315
316 amx@2903300 {
317 status = "okay";
318
319 ports {
320 #address-cells = <1>;
321 #size-cells = <0>;
322
323 port@0 {
324 reg = <0>;
325
326 amx4_in1_ep: endpoint {
327 remote-endpoint = <&xbar_amx4_in1_ep>;
328 };
329 };
330
331 port@1 {
332 reg = <1>;
333
334 amx4_in2_ep: endpoint {
335 remote-endpoint = <&xbar_amx4_in2_ep>;
336 };
337 };
338
339 port@2 {
340 reg = <2>;
341
342 amx4_in3_ep: endpoint {
343 remote-endpoint = <&xbar_amx4_in3_ep>;
344 };
345 };
346
347 port@3 {
348 reg = <3>;
349
350 amx4_in4_ep: endpoint {
351 remote-endpoint = <&xbar_amx4_in4_ep>;
352 };
353 };
354
355 amx4_out_port: port@4 {
356 reg = <4>;
357
358 amx4_out_ep: endpoint {
359 remote-endpoint = <&xbar_amx4_out_ep>;
360 };
361 };
362 };
363 };
364
365 adx@2903800 {
366 status = "okay";
367
368 ports {
369 #address-cells = <1>;
370 #size-cells = <0>;
371
372 port@0 {
373 reg = <0>;
374
375 adx1_in_ep: endpoint {
376 remote-endpoint = <&xbar_adx1_in_ep>;
377 };
378 };
379
380 adx1_out1_port: port@1 {
381 reg = <1>;
382
383 adx1_out1_ep: endpoint {
384 remote-endpoint = <&xbar_adx1_out1_ep>;
385 };
386 };
387
388 adx1_out2_port: port@2 {
389 reg = <2>;
390
391 adx1_out2_ep: endpoint {
392 remote-endpoint = <&xbar_adx1_out2_ep>;
393 };
394 };
395
396 adx1_out3_port: port@3 {
397 reg = <3>;
398
399 adx1_out3_ep: endpoint {
400 remote-endpoint = <&xbar_adx1_out3_ep>;
401 };
402 };
403
404 adx1_out4_port: port@4 {
405 reg = <4>;
406
407 adx1_out4_ep: endpoint {
408 remote-endpoint = <&xbar_adx1_out4_ep>;
409 };
410 };
411 };
412 };
413
414 adx@2903900 {
415 status = "okay";
416
417 ports {
418 #address-cells = <1>;
419 #size-cells = <0>;
420
421 port@0 {
422 reg = <0>;
423
424 adx2_in_ep: endpoint {
425 remote-endpoint = <&xbar_adx2_in_ep>;
426 };
427 };
428
429 adx2_out1_port: port@1 {
430 reg = <1>;
431
432 adx2_out1_ep: endpoint {
433 remote-endpoint = <&xbar_adx2_out1_ep>;
434 };
435 };
436
437 adx2_out2_port: port@2 {
438 reg = <2>;
439
440 adx2_out2_ep: endpoint {
441 remote-endpoint = <&xbar_adx2_out2_ep>;
442 };
443 };
444
445 adx2_out3_port: port@3 {
446 reg = <3>;
447
448 adx2_out3_ep: endpoint {
449 remote-endpoint = <&xbar_adx2_out3_ep>;
450 };
451 };
452
453 adx2_out4_port: port@4 {
454 reg = <4>;
455
456 adx2_out4_ep: endpoint {
457 remote-endpoint = <&xbar_adx2_out4_ep>;
458 };
459 };
460 };
461 };
462
463 adx@2903a00 {
464 status = "okay";
465
466 ports {
467 #address-cells = <1>;
468 #size-cells = <0>;
469
470 port@0 {
471 reg = <0>;
472
473 adx3_in_ep: endpoint {
474 remote-endpoint = <&xbar_adx3_in_ep>;
475 };
476 };
477
478 adx3_out1_port: port@1 {
479 reg = <1>;
480
481 adx3_out1_ep: endpoint {
482 remote-endpoint = <&xbar_adx3_out1_ep>;
483 };
484 };
485
486 adx3_out2_port: port@2 {
487 reg = <2>;
488
489 adx3_out2_ep: endpoint {
490 remote-endpoint = <&xbar_adx3_out2_ep>;
491 };
492 };
493
494 adx3_out3_port: port@3 {
495 reg = <3>;
496
497 adx3_out3_ep: endpoint {
498 remote-endpoint = <&xbar_adx3_out3_ep>;
499 };
500 };
501
502 adx3_out4_port: port@4 {
503 reg = <4>;
504
505 adx3_out4_ep: endpoint {
506 remote-endpoint = <&xbar_adx3_out4_ep>;
507 };
508 };
509 };
510 };
511
512 adx@2903b00 {
513 status = "okay";
514
515 ports {
516 #address-cells = <1>;
517 #size-cells = <0>;
518
519 port@0 {
520 reg = <0>;
521
522 adx4_in_ep: endpoint {
523 remote-endpoint = <&xbar_adx4_in_ep>;
524 };
525 };
526
527 adx4_out1_port: port@1 {
528 reg = <1>;
529
530 adx4_out1_ep: endpoint {
531 remote-endpoint = <&xbar_adx4_out1_ep>;
532 };
533 };
534
535 adx4_out2_port: port@2 {
536 reg = <2>;
537
538 adx4_out2_ep: endpoint {
539 remote-endpoint = <&xbar_adx4_out2_ep>;
540 };
541 };
542
543 adx4_out3_port: port@3 {
544 reg = <3>;
545
546 adx4_out3_ep: endpoint {
547 remote-endpoint = <&xbar_adx4_out3_ep>;
548 };
549 };
550
551 adx4_out4_port: port@4 {
552 reg = <4>;
553
554 adx4_out4_ep: endpoint {
555 remote-endpoint = <&xbar_adx4_out4_ep>;
556 };
557 };
558 };
559 };
560
561 dmic@2904000 {
562 status = "okay";
563
564 ports {
565 #address-cells = <1>;
566 #size-cells = <0>;
567
568 port@0 {
569 reg = <0>;
570
571 dmic1_cif_ep: endpoint {
572 remote-endpoint = <&xbar_dmic1_ep>;
573 };
574 };
575
576 dmic1_port: port@1 {
577 reg = <1>;
578
579 dmic1_dap_ep: endpoint {
580 /* Place holder for external Codec */
581 };
582 };
583 };
584 };
585
586 dmic@2904100 {
587 status = "okay";
588
589 ports {
590 #address-cells = <1>;
591 #size-cells = <0>;
592
593 port@0 {
594 reg = <0>;
595
596 dmic2_cif_ep: endpoint {
597 remote-endpoint = <&xbar_dmic2_ep>;
598 };
599 };
600
601 dmic2_port: port@1 {
602 reg = <1>;
603
604 dmic2_dap_ep: endpoint {
605 /* Place holder for external Codec */
606 };
607 };
608 };
609 };
610
611 dmic@2904300 {
612 status = "okay";
613
614 ports {
615 #address-cells = <1>;
616 #size-cells = <0>;
617
618 port@0 {
619 reg = <0>;
620
621 dmic4_cif_ep: endpoint {
622 remote-endpoint = <&xbar_dmic4_ep>;
623 };
624 };
625
626 dmic4_port: port@1 {
627 reg = <1>;
628
629 dmic4_dap_ep: endpoint {
630 /* Place holder for external Codec */
631 };
632 };
633 };
634 };
635
636 dspk@2905000 {
637 status = "okay";
638
639 ports {
640 #address-cells = <1>;
641 #size-cells = <0>;
642
643 port@0 {
644 reg = <0>;
645
646 dspk1_cif_ep: endpoint {
647 remote-endpoint = <&xbar_dspk1_ep>;
648 };
649 };
650
651 dspk1_port: port@1 {
652 reg = <1>;
653
654 dspk1_dap_ep: endpoint {
655 /* Place holder for external Codec */
656 };
657 };
658 };
659 };
660
661 dspk@2905100 {
662 status = "okay";
663
664 ports {
665 #address-cells = <1>;
666 #size-cells = <0>;
667
668 port@0 {
669 reg = <0>;
670
671 dspk2_cif_ep: endpoint {
672 remote-endpoint = <&xbar_dspk2_ep>;
673 };
674 };
675
676 dspk2_port: port@1 {
677 reg = <1>;
678
679 dspk2_dap_ep: endpoint {
680 /* Place holder for external Codec */
681 };
682 };
683 };
684 };
685
686 processing-engine@2908000 {
687 status = "okay";
688
689 ports {
690 #address-cells = <1>;
691 #size-cells = <0>;
692
693 port@0 {
694 reg = <0x0>;
695
696 ope1_cif_in_ep: endpoint {
697 remote-endpoint = <&xbar_ope1_in_ep>;
698 };
699 };
700
701 ope1_out_port: port@1 {
702 reg = <0x1>;
703
704 ope1_cif_out_ep: endpoint {
705 remote-endpoint = <&xbar_ope1_out_ep>;
706 };
707 };
708 };
709 };
710
711 mvc@290a000 {
712 status = "okay";
713
714 ports {
715 #address-cells = <1>;
716 #size-cells = <0>;
717
718 port@0 {
719 reg = <0>;
720
721 mvc1_cif_in_ep: endpoint {
722 remote-endpoint = <&xbar_mvc1_in_ep>;
723 };
724 };
725
726 mvc1_out_port: port@1 {
727 reg = <1>;
728
729 mvc1_cif_out_ep: endpoint {
730 remote-endpoint = <&xbar_mvc1_out_ep>;
731 };
732 };
733 };
734 };
735
736 mvc@290a200 {
737 status = "okay";
738
739 ports {
740 #address-cells = <1>;
741 #size-cells = <0>;
742
743 port@0 {
744 reg = <0>;
745
746 mvc2_cif_in_ep: endpoint {
747 remote-endpoint = <&xbar_mvc2_in_ep>;
748 };
749 };
750
751 mvc2_out_port: port@1 {
752 reg = <1>;
753
754 mvc2_cif_out_ep: endpoint {
755 remote-endpoint = <&xbar_mvc2_out_ep>;
756 };
757 };
758 };
759 };
760
761 amixer@290bb00 {
762 status = "okay";
763
764 ports {
765 #address-cells = <1>;
766 #size-cells = <0>;
767
768 port@0 {
769 reg = <0x0>;
770
771 mixer_in1_ep: endpoint {
772 remote-endpoint = <&xbar_mixer_in1_ep>;
773 };
774 };
775
776 port@1 {
777 reg = <0x1>;
778
779 mixer_in2_ep: endpoint {
780 remote-endpoint = <&xbar_mixer_in2_ep>;
781 };
782 };
783
784 port@2 {
785 reg = <0x2>;
786
787 mixer_in3_ep: endpoint {
788 remote-endpoint = <&xbar_mixer_in3_ep>;
789 };
790 };
791
792 port@3 {
793 reg = <0x3>;
794
795 mixer_in4_ep: endpoint {
796 remote-endpoint = <&xbar_mixer_in4_ep>;
797 };
798 };
799
800 port@4 {
801 reg = <0x4>;
802
803 mixer_in5_ep: endpoint {
804 remote-endpoint = <&xbar_mixer_in5_ep>;
805 };
806 };
807
808 port@5 {
809 reg = <0x5>;
810
811 mixer_in6_ep: endpoint {
812 remote-endpoint = <&xbar_mixer_in6_ep>;
813 };
814 };
815
816 port@6 {
817 reg = <0x6>;
818
819 mixer_in7_ep: endpoint {
820 remote-endpoint = <&xbar_mixer_in7_ep>;
821 };
822 };
823
824 port@7 {
825 reg = <0x7>;
826
827 mixer_in8_ep: endpoint {
828 remote-endpoint = <&xbar_mixer_in8_ep>;
829 };
830 };
831
832 port@8 {
833 reg = <0x8>;
834
835 mixer_in9_ep: endpoint {
836 remote-endpoint = <&xbar_mixer_in9_ep>;
837 };
838 };
839
840 port@9 {
841 reg = <0x9>;
842
843 mixer_in10_ep: endpoint {
844 remote-endpoint = <&xbar_mixer_in10_ep>;
845 };
846 };
847
848 mixer_out1_port: port@a {
849 reg = <0xa>;
850
851 mixer_out1_ep: endpoint {
852 remote-endpoint = <&xbar_mixer_out1_ep>;
853 };
854 };
855
856 mixer_out2_port: port@b {
857 reg = <0xb>;
858
859 mixer_out2_ep: endpoint {
860 remote-endpoint = <&xbar_mixer_out2_ep>;
861 };
862 };
863
864 mixer_out3_port: port@c {
865 reg = <0xc>;
866
867 mixer_out3_ep: endpoint {
868 remote-endpoint = <&xbar_mixer_out3_ep>;
869 };
870 };
871
872 mixer_out4_port: port@d {
873 reg = <0xd>;
874
875 mixer_out4_ep: endpoint {
876 remote-endpoint = <&xbar_mixer_out4_ep>;
877 };
878 };
879
880 mixer_out5_port: port@e {
881 reg = <0xe>;
882
883 mixer_out5_ep: endpoint {
884 remote-endpoint = <&xbar_mixer_out5_ep>;
885 };
886 };
887 };
888 };
889
890 admaif@290f000 {
891 status = "okay";
892
893 ports {
894 #address-cells = <1>;
895 #size-cells = <0>;
896
897 admaif0_port: port@0 {
898 reg = <0x0>;
899
900 admaif0_ep: endpoint {
901 remote-endpoint = <&xbar_admaif0_ep>;
902 };
903 };
904
905 admaif1_port: port@1 {
906 reg = <0x1>;
907
908 admaif1_ep: endpoint {
909 remote-endpoint = <&xbar_admaif1_ep>;
910 };
911 };
912
913 admaif2_port: port@2 {
914 reg = <0x2>;
915
916 admaif2_ep: endpoint {
917 remote-endpoint = <&xbar_admaif2_ep>;
918 };
919 };
920
921 admaif3_port: port@3 {
922 reg = <0x3>;
923
924 admaif3_ep: endpoint {
925 remote-endpoint = <&xbar_admaif3_ep>;
926 };
927 };
928
929 admaif4_port: port@4 {
930 reg = <0x4>;
931
932 admaif4_ep: endpoint {
933 remote-endpoint = <&xbar_admaif4_ep>;
934 };
935 };
936
937 admaif5_port: port@5 {
938 reg = <0x5>;
939
940 admaif5_ep: endpoint {
941 remote-endpoint = <&xbar_admaif5_ep>;
942 };
943 };
944
945 admaif6_port: port@6 {
946 reg = <0x6>;
947
948 admaif6_ep: endpoint {
949 remote-endpoint = <&xbar_admaif6_ep>;
950 };
951 };
952
953 admaif7_port: port@7 {
954 reg = <0x7>;
955
956 admaif7_ep: endpoint {
957 remote-endpoint = <&xbar_admaif7_ep>;
958 };
959 };
960
961 admaif8_port: port@8 {
962 reg = <0x8>;
963
964 admaif8_ep: endpoint {
965 remote-endpoint = <&xbar_admaif8_ep>;
966 };
967 };
968
969 admaif9_port: port@9 {
970 reg = <0x9>;
971
972 admaif9_ep: endpoint {
973 remote-endpoint = <&xbar_admaif9_ep>;
974 };
975 };
976
977 admaif10_port: port@a {
978 reg = <0xa>;
979
980 admaif10_ep: endpoint {
981 remote-endpoint = <&xbar_admaif10_ep>;
982 };
983 };
984
985 admaif11_port: port@b {
986 reg = <0xb>;
987
988 admaif11_ep: endpoint {
989 remote-endpoint = <&xbar_admaif11_ep>;
990 };
991 };
992
993 admaif12_port: port@c {
994 reg = <0xc>;
995
996 admaif12_ep: endpoint {
997 remote-endpoint = <&xbar_admaif12_ep>;
998 };
999 };
1000
1001 admaif13_port: port@d {
1002 reg = <0xd>;
1003
1004 admaif13_ep: endpoint {
1005 remote-endpoint = <&xbar_admaif13_ep>;
1006 };
1007 };
1008
1009 admaif14_port: port@e {
1010 reg = <0xe>;
1011
1012 admaif14_ep: endpoint {
1013 remote-endpoint = <&xbar_admaif14_ep>;
1014 };
1015 };
1016
1017 admaif15_port: port@f {
1018 reg = <0xf>;
1019
1020 admaif15_ep: endpoint {
1021 remote-endpoint = <&xbar_admaif15_ep>;
1022 };
1023 };
1024
1025 admaif16_port: port@10 {
1026 reg = <0x10>;
1027
1028 admaif16_ep: endpoint {
1029 remote-endpoint = <&xbar_admaif16_ep>;
1030 };
1031 };
1032
1033 admaif17_port: port@11 {
1034 reg = <0x11>;
1035
1036 admaif17_ep: endpoint {
1037 remote-endpoint = <&xbar_admaif17_ep>;
1038 };
1039 };
1040
1041 admaif18_port: port@12 {
1042 reg = <0x12>;
1043
1044 admaif18_ep: endpoint {
1045 remote-endpoint = <&xbar_admaif18_ep>;
1046 };
1047 };
1048
1049 admaif19_port: port@13 {
1050 reg = <0x13>;
1051
1052 admaif19_ep: endpoint {
1053 remote-endpoint = <&xbar_admaif19_ep>;
1054 };
1055 };
1056 };
1057 };
1058
1059 asrc@2910000 {
1060 status = "okay";
1061
1062 ports {
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1065
1066 port@0 {
1067 reg = <0x0>;
1068
1069 asrc_in1_ep: endpoint {
1070 remote-endpoint = <&xbar_asrc_in1_ep>;
1071 };
1072 };
1073
1074 port@1 {
1075 reg = <0x1>;
1076
1077 asrc_in2_ep: endpoint {
1078 remote-endpoint = <&xbar_asrc_in2_ep>;
1079 };
1080 };
1081
1082 port@2 {
1083 reg = <0x2>;
1084
1085 asrc_in3_ep: endpoint {
1086 remote-endpoint = <&xbar_asrc_in3_ep>;
1087 };
1088 };
1089
1090 port@3 {
1091 reg = <0x3>;
1092
1093 asrc_in4_ep: endpoint {
1094 remote-endpoint = <&xbar_asrc_in4_ep>;
1095 };
1096 };
1097
1098 port@4 {
1099 reg = <0x4>;
1100
1101 asrc_in5_ep: endpoint {
1102 remote-endpoint = <&xbar_asrc_in5_ep>;
1103 };
1104 };
1105
1106 port@5 {
1107 reg = <0x5>;
1108
1109 asrc_in6_ep: endpoint {
1110 remote-endpoint = <&xbar_asrc_in6_ep>;
1111 };
1112 };
1113
1114 port@6 {
1115 reg = <0x6>;
1116
1117 asrc_in7_ep: endpoint {
1118 remote-endpoint = <&xbar_asrc_in7_ep>;
1119 };
1120 };
1121
1122 asrc_out1_port: port@7 {
1123 reg = <0x7>;
1124
1125 asrc_out1_ep: endpoint {
1126 remote-endpoint = <&xbar_asrc_out1_ep>;
1127 };
1128 };
1129
1130 asrc_out2_port: port@8 {
1131 reg = <0x8>;
1132
1133 asrc_out2_ep: endpoint {
1134 remote-endpoint = <&xbar_asrc_out2_ep>;
1135 };
1136 };
1137
1138 asrc_out3_port: port@9 {
1139 reg = <0x9>;
1140
1141 asrc_out3_ep: endpoint {
1142 remote-endpoint = <&xbar_asrc_out3_ep>;
1143 };
1144 };
1145
1146 asrc_out4_port: port@a {
1147 reg = <0xa>;
1148
1149 asrc_out4_ep: endpoint {
1150 remote-endpoint = <&xbar_asrc_out4_ep>;
1151 };
1152 };
1153
1154 asrc_out5_port: port@b {
1155 reg = <0xb>;
1156
1157 asrc_out5_ep: endpoint {
1158 remote-endpoint = <&xbar_asrc_out5_ep>;
1159 };
1160 };
1161
1162 asrc_out6_port: port@c {
1163 reg = <0xc>;
1164
1165 asrc_out6_ep: endpoint {
1166 remote-endpoint = <&xbar_asrc_out6_ep>;
1167 };
1168 };
1169 };
1170 };
1171
1172 ports {
1173 #address-cells = <1>;
1174 #size-cells = <0>;
1175
1176 port@0 {
1177 reg = <0x0>;
1178
1179 xbar_admaif0_ep: endpoint {
1180 remote-endpoint = <&admaif0_ep>;
1181 };
1182 };
1183
1184 port@1 {
1185 reg = <0x1>;
1186
1187 xbar_admaif1_ep: endpoint {
1188 remote-endpoint = <&admaif1_ep>;
1189 };
1190 };
1191
1192 port@2 {
1193 reg = <0x2>;
1194
1195 xbar_admaif2_ep: endpoint {
1196 remote-endpoint = <&admaif2_ep>;
1197 };
1198 };
1199
1200 port@3 {
1201 reg = <0x3>;
1202
1203 xbar_admaif3_ep: endpoint {
1204 remote-endpoint = <&admaif3_ep>;
1205 };
1206 };
1207
1208 port@4 {
1209 reg = <0x4>;
1210
1211 xbar_admaif4_ep: endpoint {
1212 remote-endpoint = <&admaif4_ep>;
1213 };
1214 };
1215
1216 port@5 {
1217 reg = <0x5>;
1218
1219 xbar_admaif5_ep: endpoint {
1220 remote-endpoint = <&admaif5_ep>;
1221 };
1222 };
1223
1224 port@6 {
1225 reg = <0x6>;
1226
1227 xbar_admaif6_ep: endpoint {
1228 remote-endpoint = <&admaif6_ep>;
1229 };
1230 };
1231
1232 port@7 {
1233 reg = <0x7>;
1234
1235 xbar_admaif7_ep: endpoint {
1236 remote-endpoint = <&admaif7_ep>;
1237 };
1238 };
1239
1240 port@8 {
1241 reg = <0x8>;
1242
1243 xbar_admaif8_ep: endpoint {
1244 remote-endpoint = <&admaif8_ep>;
1245 };
1246 };
1247
1248 port@9 {
1249 reg = <0x9>;
1250
1251 xbar_admaif9_ep: endpoint {
1252 remote-endpoint = <&admaif9_ep>;
1253 };
1254 };
1255
1256 port@a {
1257 reg = <0xa>;
1258
1259 xbar_admaif10_ep: endpoint {
1260 remote-endpoint = <&admaif10_ep>;
1261 };
1262 };
1263
1264 port@b {
1265 reg = <0xb>;
1266
1267 xbar_admaif11_ep: endpoint {
1268 remote-endpoint = <&admaif11_ep>;
1269 };
1270 };
1271
1272 port@c {
1273 reg = <0xc>;
1274
1275 xbar_admaif12_ep: endpoint {
1276 remote-endpoint = <&admaif12_ep>;
1277 };
1278 };
1279
1280 port@d {
1281 reg = <0xd>;
1282
1283 xbar_admaif13_ep: endpoint {
1284 remote-endpoint = <&admaif13_ep>;
1285 };
1286 };
1287
1288 port@e {
1289 reg = <0xe>;
1290
1291 xbar_admaif14_ep: endpoint {
1292 remote-endpoint = <&admaif14_ep>;
1293 };
1294 };
1295
1296 port@f {
1297 reg = <0xf>;
1298
1299 xbar_admaif15_ep: endpoint {
1300 remote-endpoint = <&admaif15_ep>;
1301 };
1302 };
1303
1304 port@10 {
1305 reg = <0x10>;
1306
1307 xbar_admaif16_ep: endpoint {
1308 remote-endpoint = <&admaif16_ep>;
1309 };
1310 };
1311
1312 port@11 {
1313 reg = <0x11>;
1314
1315 xbar_admaif17_ep: endpoint {
1316 remote-endpoint = <&admaif17_ep>;
1317 };
1318 };
1319
1320 port@12 {
1321 reg = <0x12>;
1322
1323 xbar_admaif18_ep: endpoint {
1324 remote-endpoint = <&admaif18_ep>;
1325 };
1326 };
1327
1328 port@13 {
1329 reg = <0x13>;
1330
1331 xbar_admaif19_ep: endpoint {
1332 remote-endpoint = <&admaif19_ep>;
1333 };
1334 };
1335
1336 xbar_i2s3_port: port@16 {
1337 reg = <0x16>;
1338
1339 xbar_i2s3_ep: endpoint {
1340 remote-endpoint = <&i2s3_cif_ep>;
1341 };
1342 };
1343
1344 xbar_i2s5_port: port@18 {
1345 reg = <0x18>;
1346
1347 xbar_i2s5_ep: endpoint {
1348 remote-endpoint = <&i2s5_cif_ep>;
1349 };
1350 };
1351
1352 xbar_dmic1_port: port@1a {
1353 reg = <0x1a>;
1354
1355 xbar_dmic1_ep: endpoint {
1356 remote-endpoint = <&dmic1_cif_ep>;
1357 };
1358 };
1359
1360 xbar_dmic2_port: port@1b {
1361 reg = <0x1b>;
1362
1363 xbar_dmic2_ep: endpoint {
1364 remote-endpoint = <&dmic2_cif_ep>;
1365 };
1366 };
1367
1368 xbar_dmic4_port: port@1d {
1369 reg = <0x1d>;
1370
1371 xbar_dmic4_ep: endpoint {
1372 remote-endpoint = <&dmic4_cif_ep>;
1373 };
1374 };
1375
1376 xbar_dspk1_port: port@1e {
1377 reg = <0x1e>;
1378
1379 xbar_dspk1_ep: endpoint {
1380 remote-endpoint = <&dspk1_cif_ep>;
1381 };
1382 };
1383
1384 xbar_dspk2_port: port@1f {
1385 reg = <0x1f>;
1386
1387 xbar_dspk2_ep: endpoint {
1388 remote-endpoint = <&dspk2_cif_ep>;
1389 };
1390 };
1391
1392 xbar_sfc1_in_port: port@20 {
1393 reg = <0x20>;
1394
1395 xbar_sfc1_in_ep: endpoint {
1396 remote-endpoint = <&sfc1_cif_in_ep>;
1397 };
1398 };
1399
1400 port@21 {
1401 reg = <0x21>;
1402
1403 xbar_sfc1_out_ep: endpoint {
1404 remote-endpoint = <&sfc1_cif_out_ep>;
1405 };
1406 };
1407
1408 xbar_sfc2_in_port: port@22 {
1409 reg = <0x22>;
1410
1411 xbar_sfc2_in_ep: endpoint {
1412 remote-endpoint = <&sfc2_cif_in_ep>;
1413 };
1414 };
1415
1416 port@23 {
1417 reg = <0x23>;
1418
1419 xbar_sfc2_out_ep: endpoint {
1420 remote-endpoint = <&sfc2_cif_out_ep>;
1421 };
1422 };
1423
1424 xbar_sfc3_in_port: port@24 {
1425 reg = <0x24>;
1426
1427 xbar_sfc3_in_ep: endpoint {
1428 remote-endpoint = <&sfc3_cif_in_ep>;
1429 };
1430 };
1431
1432 port@25 {
1433 reg = <0x25>;
1434
1435 xbar_sfc3_out_ep: endpoint {
1436 remote-endpoint = <&sfc3_cif_out_ep>;
1437 };
1438 };
1439
1440 xbar_sfc4_in_port: port@26 {
1441 reg = <0x26>;
1442
1443 xbar_sfc4_in_ep: endpoint {
1444 remote-endpoint = <&sfc4_cif_in_ep>;
1445 };
1446 };
1447
1448 port@27 {
1449 reg = <0x27>;
1450
1451 xbar_sfc4_out_ep: endpoint {
1452 remote-endpoint = <&sfc4_cif_out_ep>;
1453 };
1454 };
1455
1456 xbar_mvc1_in_port: port@28 {
1457 reg = <0x28>;
1458
1459 xbar_mvc1_in_ep: endpoint {
1460 remote-endpoint = <&mvc1_cif_in_ep>;
1461 };
1462 };
1463
1464 port@29 {
1465 reg = <0x29>;
1466
1467 xbar_mvc1_out_ep: endpoint {
1468 remote-endpoint = <&mvc1_cif_out_ep>;
1469 };
1470 };
1471
1472 xbar_mvc2_in_port: port@2a {
1473 reg = <0x2a>;
1474
1475 xbar_mvc2_in_ep: endpoint {
1476 remote-endpoint = <&mvc2_cif_in_ep>;
1477 };
1478 };
1479
1480 port@2b {
1481 reg = <0x2b>;
1482
1483 xbar_mvc2_out_ep: endpoint {
1484 remote-endpoint = <&mvc2_cif_out_ep>;
1485 };
1486 };
1487
1488 xbar_amx1_in1_port: port@2c {
1489 reg = <0x2c>;
1490
1491 xbar_amx1_in1_ep: endpoint {
1492 remote-endpoint = <&amx1_in1_ep>;
1493 };
1494 };
1495
1496 xbar_amx1_in2_port: port@2d {
1497 reg = <0x2d>;
1498
1499 xbar_amx1_in2_ep: endpoint {
1500 remote-endpoint = <&amx1_in2_ep>;
1501 };
1502 };
1503
1504 xbar_amx1_in3_port: port@2e {
1505 reg = <0x2e>;
1506
1507 xbar_amx1_in3_ep: endpoint {
1508 remote-endpoint = <&amx1_in3_ep>;
1509 };
1510 };
1511
1512 xbar_amx1_in4_port: port@2f {
1513 reg = <0x2f>;
1514
1515 xbar_amx1_in4_ep: endpoint {
1516 remote-endpoint = <&amx1_in4_ep>;
1517 };
1518 };
1519
1520 port@30 {
1521 reg = <0x30>;
1522
1523 xbar_amx1_out_ep: endpoint {
1524 remote-endpoint = <&amx1_out_ep>;
1525 };
1526 };
1527
1528 xbar_amx2_in1_port: port@31 {
1529 reg = <0x31>;
1530
1531 xbar_amx2_in1_ep: endpoint {
1532 remote-endpoint = <&amx2_in1_ep>;
1533 };
1534 };
1535
1536 xbar_amx2_in2_port: port@32 {
1537 reg = <0x32>;
1538
1539 xbar_amx2_in2_ep: endpoint {
1540 remote-endpoint = <&amx2_in2_ep>;
1541 };
1542 };
1543
1544 xbar_amx2_in3_port: port@33 {
1545 reg = <0x33>;
1546
1547 xbar_amx2_in3_ep: endpoint {
1548 remote-endpoint = <&amx2_in3_ep>;
1549 };
1550 };
1551
1552 xbar_amx2_in4_port: port@34 {
1553 reg = <0x34>;
1554
1555 xbar_amx2_in4_ep: endpoint {
1556 remote-endpoint = <&amx2_in4_ep>;
1557 };
1558 };
1559
1560 port@35 {
1561 reg = <0x35>;
1562
1563 xbar_amx2_out_ep: endpoint {
1564 remote-endpoint = <&amx2_out_ep>;
1565 };
1566 };
1567
1568 xbar_amx3_in1_port: port@36 {
1569 reg = <0x36>;
1570
1571 xbar_amx3_in1_ep: endpoint {
1572 remote-endpoint = <&amx3_in1_ep>;
1573 };
1574 };
1575
1576 xbar_amx3_in2_port: port@37 {
1577 reg = <0x37>;
1578
1579 xbar_amx3_in2_ep: endpoint {
1580 remote-endpoint = <&amx3_in2_ep>;
1581 };
1582 };
1583
1584 xbar_amx3_in3_port: port@38 {
1585 reg = <0x38>;
1586
1587 xbar_amx3_in3_ep: endpoint {
1588 remote-endpoint = <&amx3_in3_ep>;
1589 };
1590 };
1591
1592 xbar_amx3_in4_port: port@39 {
1593 reg = <0x39>;
1594
1595 xbar_amx3_in4_ep: endpoint {
1596 remote-endpoint = <&amx3_in4_ep>;
1597 };
1598 };
1599
1600 port@3a {
1601 reg = <0x3a>;
1602
1603 xbar_amx3_out_ep: endpoint {
1604 remote-endpoint = <&amx3_out_ep>;
1605 };
1606 };
1607
1608 xbar_amx4_in1_port: port@3b {
1609 reg = <0x3b>;
1610
1611 xbar_amx4_in1_ep: endpoint {
1612 remote-endpoint = <&amx4_in1_ep>;
1613 };
1614 };
1615
1616 xbar_amx4_in2_port: port@3c {
1617 reg = <0x3c>;
1618
1619 xbar_amx4_in2_ep: endpoint {
1620 remote-endpoint = <&amx4_in2_ep>;
1621 };
1622 };
1623
1624 xbar_amx4_in3_port: port@3d {
1625 reg = <0x3d>;
1626
1627 xbar_amx4_in3_ep: endpoint {
1628 remote-endpoint = <&amx4_in3_ep>;
1629 };
1630 };
1631
1632 xbar_amx4_in4_port: port@3e {
1633 reg = <0x3e>;
1634
1635 xbar_amx4_in4_ep: endpoint {
1636 remote-endpoint = <&amx4_in4_ep>;
1637 };
1638 };
1639
1640 port@3f {
1641 reg = <0x3f>;
1642
1643 xbar_amx4_out_ep: endpoint {
1644 remote-endpoint = <&amx4_out_ep>;
1645 };
1646 };
1647
1648 xbar_adx1_in_port: port@40 {
1649 reg = <0x40>;
1650
1651 xbar_adx1_in_ep: endpoint {
1652 remote-endpoint = <&adx1_in_ep>;
1653 };
1654 };
1655
1656 port@41 {
1657 reg = <0x41>;
1658
1659 xbar_adx1_out1_ep: endpoint {
1660 remote-endpoint = <&adx1_out1_ep>;
1661 };
1662 };
1663
1664 port@42 {
1665 reg = <0x42>;
1666
1667 xbar_adx1_out2_ep: endpoint {
1668 remote-endpoint = <&adx1_out2_ep>;
1669 };
1670 };
1671
1672 port@43 {
1673 reg = <0x43>;
1674
1675 xbar_adx1_out3_ep: endpoint {
1676 remote-endpoint = <&adx1_out3_ep>;
1677 };
1678 };
1679
1680 port@44 {
1681 reg = <0x44>;
1682
1683 xbar_adx1_out4_ep: endpoint {
1684 remote-endpoint = <&adx1_out4_ep>;
1685 };
1686 };
1687
1688 xbar_adx2_in_port: port@45 {
1689 reg = <0x45>;
1690
1691 xbar_adx2_in_ep: endpoint {
1692 remote-endpoint = <&adx2_in_ep>;
1693 };
1694 };
1695
1696 port@46 {
1697 reg = <0x46>;
1698
1699 xbar_adx2_out1_ep: endpoint {
1700 remote-endpoint = <&adx2_out1_ep>;
1701 };
1702 };
1703
1704 port@47 {
1705 reg = <0x47>;
1706
1707 xbar_adx2_out2_ep: endpoint {
1708 remote-endpoint = <&adx2_out2_ep>;
1709 };
1710 };
1711
1712 port@48 {
1713 reg = <0x48>;
1714
1715 xbar_adx2_out3_ep: endpoint {
1716 remote-endpoint = <&adx2_out3_ep>;
1717 };
1718 };
1719
1720 port@49 {
1721 reg = <0x49>;
1722
1723 xbar_adx2_out4_ep: endpoint {
1724 remote-endpoint = <&adx2_out4_ep>;
1725 };
1726 };
1727
1728 xbar_adx3_in_port: port@4a {
1729 reg = <0x4a>;
1730
1731 xbar_adx3_in_ep: endpoint {
1732 remote-endpoint = <&adx3_in_ep>;
1733 };
1734 };
1735
1736 port@4b {
1737 reg = <0x4b>;
1738
1739 xbar_adx3_out1_ep: endpoint {
1740 remote-endpoint = <&adx3_out1_ep>;
1741 };
1742 };
1743
1744 port@4c {
1745 reg = <0x4c>;
1746
1747 xbar_adx3_out2_ep: endpoint {
1748 remote-endpoint = <&adx3_out2_ep>;
1749 };
1750 };
1751
1752 port@4d {
1753 reg = <0x4d>;
1754
1755 xbar_adx3_out3_ep: endpoint {
1756 remote-endpoint = <&adx3_out3_ep>;
1757 };
1758 };
1759
1760 port@4e {
1761 reg = <0x4e>;
1762
1763 xbar_adx3_out4_ep: endpoint {
1764 remote-endpoint = <&adx3_out4_ep>;
1765 };
1766 };
1767
1768 xbar_adx4_in_port: port@4f {
1769 reg = <0x4f>;
1770
1771 xbar_adx4_in_ep: endpoint {
1772 remote-endpoint = <&adx4_in_ep>;
1773 };
1774 };
1775
1776 port@50 {
1777 reg = <0x50>;
1778
1779 xbar_adx4_out1_ep: endpoint {
1780 remote-endpoint = <&adx4_out1_ep>;
1781 };
1782 };
1783
1784 port@51 {
1785 reg = <0x51>;
1786
1787 xbar_adx4_out2_ep: endpoint {
1788 remote-endpoint = <&adx4_out2_ep>;
1789 };
1790 };
1791
1792 port@52 {
1793 reg = <0x52>;
1794
1795 xbar_adx4_out3_ep: endpoint {
1796 remote-endpoint = <&adx4_out3_ep>;
1797 };
1798 };
1799
1800 port@53 {
1801 reg = <0x53>;
1802
1803 xbar_adx4_out4_ep: endpoint {
1804 remote-endpoint = <&adx4_out4_ep>;
1805 };
1806 };
1807
1808 xbar_mixer_in1_port: port@54 {
1809 reg = <0x54>;
1810
1811 xbar_mixer_in1_ep: endpoint {
1812 remote-endpoint = <&mixer_in1_ep>;
1813 };
1814 };
1815
1816 xbar_mixer_in2_port: port@55 {
1817 reg = <0x55>;
1818
1819 xbar_mixer_in2_ep: endpoint {
1820 remote-endpoint = <&mixer_in2_ep>;
1821 };
1822 };
1823
1824 xbar_mixer_in3_port: port@56 {
1825 reg = <0x56>;
1826
1827 xbar_mixer_in3_ep: endpoint {
1828 remote-endpoint = <&mixer_in3_ep>;
1829 };
1830 };
1831
1832 xbar_mixer_in4_port: port@57 {
1833 reg = <0x57>;
1834
1835 xbar_mixer_in4_ep: endpoint {
1836 remote-endpoint = <&mixer_in4_ep>;
1837 };
1838 };
1839
1840 xbar_mixer_in5_port: port@58 {
1841 reg = <0x58>;
1842
1843 xbar_mixer_in5_ep: endpoint {
1844 remote-endpoint = <&mixer_in5_ep>;
1845 };
1846 };
1847
1848 xbar_mixer_in6_port: port@59 {
1849 reg = <0x59>;
1850
1851 xbar_mixer_in6_ep: endpoint {
1852 remote-endpoint = <&mixer_in6_ep>;
1853 };
1854 };
1855
1856 xbar_mixer_in7_port: port@5a {
1857 reg = <0x5a>;
1858
1859 xbar_mixer_in7_ep: endpoint {
1860 remote-endpoint = <&mixer_in7_ep>;
1861 };
1862 };
1863
1864 xbar_mixer_in8_port: port@5b {
1865 reg = <0x5b>;
1866
1867 xbar_mixer_in8_ep: endpoint {
1868 remote-endpoint = <&mixer_in8_ep>;
1869 };
1870 };
1871
1872 xbar_mixer_in9_port: port@5c {
1873 reg = <0x5c>;
1874
1875 xbar_mixer_in9_ep: endpoint {
1876 remote-endpoint = <&mixer_in9_ep>;
1877 };
1878 };
1879
1880 xbar_mixer_in10_port: port@5d {
1881 reg = <0x5d>;
1882
1883 xbar_mixer_in10_ep: endpoint {
1884 remote-endpoint = <&mixer_in10_ep>;
1885 };
1886 };
1887
1888 port@5e {
1889 reg = <0x5e>;
1890
1891 xbar_mixer_out1_ep: endpoint {
1892 remote-endpoint = <&mixer_out1_ep>;
1893 };
1894 };
1895
1896 port@5f {
1897 reg = <0x5f>;
1898
1899 xbar_mixer_out2_ep: endpoint {
1900 remote-endpoint = <&mixer_out2_ep>;
1901 };
1902 };
1903
1904 port@60 {
1905 reg = <0x60>;
1906
1907 xbar_mixer_out3_ep: endpoint {
1908 remote-endpoint = <&mixer_out3_ep>;
1909 };
1910 };
1911
1912 port@61 {
1913 reg = <0x61>;
1914
1915 xbar_mixer_out4_ep: endpoint {
1916 remote-endpoint = <&mixer_out4_ep>;
1917 };
1918 };
1919
1920 port@62 {
1921 reg = <0x62>;
1922
1923 xbar_mixer_out5_ep: endpoint {
1924 remote-endpoint = <&mixer_out5_ep>;
1925 };
1926 };
1927
1928 xbar_asrc_in1_port: port@63 {
1929 reg = <0x63>;
1930
1931 xbar_asrc_in1_ep: endpoint {
1932 remote-endpoint = <&asrc_in1_ep>;
1933 };
1934 };
1935
1936 port@64 {
1937 reg = <0x64>;
1938
1939 xbar_asrc_out1_ep: endpoint {
1940 remote-endpoint = <&asrc_out1_ep>;
1941 };
1942 };
1943
1944 xbar_asrc_in2_port: port@65 {
1945 reg = <0x65>;
1946
1947 xbar_asrc_in2_ep: endpoint {
1948 remote-endpoint = <&asrc_in2_ep>;
1949 };
1950 };
1951
1952 port@66 {
1953 reg = <0x66>;
1954
1955 xbar_asrc_out2_ep: endpoint {
1956 remote-endpoint = <&asrc_out2_ep>;
1957 };
1958 };
1959
1960 xbar_asrc_in3_port: port@67 {
1961 reg = <0x67>;
1962
1963 xbar_asrc_in3_ep: endpoint {
1964 remote-endpoint = <&asrc_in3_ep>;
1965 };
1966 };
1967
1968 port@68 {
1969 reg = <0x68>;
1970
1971 xbar_asrc_out3_ep: endpoint {
1972 remote-endpoint = <&asrc_out3_ep>;
1973 };
1974 };
1975
1976 xbar_asrc_in4_port: port@69 {
1977 reg = <0x69>;
1978
1979 xbar_asrc_in4_ep: endpoint {
1980 remote-endpoint = <&asrc_in4_ep>;
1981 };
1982 };
1983
1984 port@6a {
1985 reg = <0x6a>;
1986
1987 xbar_asrc_out4_ep: endpoint {
1988 remote-endpoint = <&asrc_out4_ep>;
1989 };
1990 };
1991
1992 xbar_asrc_in5_port: port@6b {
1993 reg = <0x6b>;
1994
1995 xbar_asrc_in5_ep: endpoint {
1996 remote-endpoint = <&asrc_in5_ep>;
1997 };
1998 };
1999
2000 port@6c {
2001 reg = <0x6c>;
2002
2003 xbar_asrc_out5_ep: endpoint {
2004 remote-endpoint = <&asrc_out5_ep>;
2005 };
2006 };
2007
2008 xbar_asrc_in6_port: port@6d {
2009 reg = <0x6d>;
2010
2011 xbar_asrc_in6_ep: endpoint {
2012 remote-endpoint = <&asrc_in6_ep>;
2013 };
2014 };
2015
2016 port@6e {
2017 reg = <0x6e>;
2018
2019 xbar_asrc_out6_ep: endpoint {
2020 remote-endpoint = <&asrc_out6_ep>;
2021 };
2022 };
2023
2024 xbar_asrc_in7_port: port@6f {
2025 reg = <0x6f>;
2026
2027 xbar_asrc_in7_ep: endpoint {
2028 remote-endpoint = <&asrc_in7_ep>;
2029 };
2030 };
2031
2032 xbar_ope1_in_port: port@70 {
2033 reg = <0x70>;
2034
2035 xbar_ope1_in_ep: endpoint {
2036 remote-endpoint = <&ope1_cif_in_ep>;
2037 };
2038 };
2039
2040 port@71 {
2041 reg = <0x71>;
2042
2043 xbar_ope1_out_ep: endpoint {
2044 remote-endpoint = <&ope1_cif_out_ep>;
2045 };
2046 };
2047 };
2048 };
2049
2050 dma-controller@2930000 {
2051 status = "okay";
2052 };
2053
2054 interrupt-controller@2a40000 {
2055 status = "okay";
2056 };
2057 };
2058
2059 i2c@3160000 {
2060 eeprom@57 {
2061 compatible = "atmel,24c02";
2062 reg = <0x57>;
2063
2064 label = "system";
2065 vcc-supply = <&vdd_1v8>;
2066 address-width = <8>;
2067 pagesize = <8>;
2068 size = <256>;
2069 read-only;
2070 };
2071 };
2072
2073 ddc: i2c@3190000 {
2074 status = "okay";
2075 };
2076
2077 spi@3270000 {
2078 status = "okay";
2079
2080 flash@0 {
2081 compatible = "jedec,spi-nor";
2082 reg = <0>;
2083 spi-max-frequency = <102000000>;
2084 spi-tx-bus-width = <4>;
2085 spi-rx-bus-width = <4>;
2086 };
2087 };
2088
2089 pwm@32d0000 {
2090 status = "okay";
2091 };
2092
2093 hda@3510000 {
2094 nvidia,model = "NVIDIA Jetson Xavier NX HDA";
2095 status = "okay";
2096 };
2097
2098 padctl@3520000 {
2099 status = "okay";
2100
2101 pads {
2102 usb2 {
2103 lanes {
2104 usb2-0 {
2105 status = "okay";
2106 };
2107
2108 usb2-1 {
2109 status = "okay";
2110 };
2111
2112 usb2-2 {
2113 status = "okay";
2114 };
2115 };
2116 };
2117
2118 usb3 {
2119 lanes {
2120 usb3-2 {
2121 status = "okay";
2122 };
2123 };
2124 };
2125 };
2126
2127 ports {
2128 usb2-0 {
2129 mode = "otg";
2130 status = "okay";
2131 usb-role-switch;
2132 connector {
2133 compatible = "gpio-usb-b-connector",
2134 "usb-b-connector";
2135 label = "micro-USB";
2136 type = "micro";
2137 vbus-gpios = <&gpio TEGRA194_MAIN_GPIO(Z, 1)
2138 GPIO_ACTIVE_LOW>;
2139 };
2140 };
2141
2142 usb2-1 {
2143 mode = "host";
2144 status = "okay";
2145 };
2146
2147 usb2-2 {
2148 mode = "host";
2149 vbus-supply = <&vdd_5v0_sys>;
2150 status = "okay";
2151 };
2152
2153 usb3-2 {
2154 nvidia,usb2-companion = <1>;
2155 vbus-supply = <&vdd_5v0_sys>;
2156 status = "okay";
2157 };
2158 };
2159 };
2160
2161 usb@3550000 {
2162 status = "okay";
2163
2164 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>;
2165 phy-names = "usb2-0";
2166 };
2167
2168 usb@3610000 {
2169 status = "okay";
2170
2171 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2172 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
2173 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
2174 phy-names = "usb2-1", "usb2-2", "usb3-2";
2175 };
2176
2177 host1x@13e00000 {
2178 display-hub@15200000 {
2179 status = "okay";
2180 };
2181
2182 dpaux@155c0000 {
2183 status = "okay";
2184 };
2185
2186 dpaux@155d0000 {
2187 status = "okay";
2188 };
2189
2190 /* DP0 */
2191 sor@15b00000 {
2192 status = "okay";
2193
2194 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2195 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2196
2197 nvidia,dpaux = <&dpaux0>;
2198 };
2199
2200 /* HDMI */
2201 sor@15b40000 {
2202 status = "okay";
2203
2204 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2205 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2206 hdmi-supply = <&vdd_hdmi>;
2207
2208 nvidia,ddc-i2c-bus = <&ddc>;
2209 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1)
2210 GPIO_ACTIVE_LOW>;
2211 };
2212 };
2213
2214 pcie@14160000 {
2215 status = "okay";
2216
2217 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2218
2219 phys = <&p2u_hsio_11>;
2220 phy-names = "p2u-0";
2221 };
2222
2223 pcie@141a0000 {
2224 status = "okay";
2225
2226 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2227
2228 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2229 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2230 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2231
2232 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2233 "p2u-5", "p2u-6", "p2u-7";
2234 };
2235
2236 pcie-ep@141a0000 {
2237 status = "disabled";
2238
2239 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2240
2241 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
2242
2243 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
2244 GPIO_ACTIVE_HIGH>;
2245
2246 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2247 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2248 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2249
2250 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2251 "p2u-5", "p2u-6", "p2u-7";
2252 };
2253 };
2254
2255 gpio-keys {
2256 compatible = "gpio-keys";
2257
2258 key-force-recovery {
2259 label = "Force Recovery";
2260 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
2261 GPIO_ACTIVE_LOW>;
2262 linux,input-type = <EV_KEY>;
2263 linux,code = <KEY_SLEEP>;
2264 debounce-interval = <10>;
2265 };
2266
2267 key-power {
2268 label = "Power";
2269 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
2270 GPIO_ACTIVE_LOW>;
2271 linux,input-type = <EV_KEY>;
2272 linux,code = <KEY_POWER>;
2273 debounce-interval = <10>;
2274 wakeup-event-action = <EV_ACT_ASSERTED>;
2275 wakeup-source;
2276 };
2277 };
2278
2279 fan: pwm-fan {
2280 compatible = "pwm-fan";
2281 pwms = <&pwm6 0 45334>;
2282
2283 cooling-levels = <0 64 128 255>;
2284 #cooling-cells = <2>;
2285 };
2286
2287 vdd_5v0_sys: regulator-vdd-5v0-sys {
2288 compatible = "regulator-fixed";
2289 regulator-name = "VDD_5V_SYS";
2290 regulator-min-microvolt = <5000000>;
2291 regulator-max-microvolt = <5000000>;
2292 regulator-always-on;
2293 regulator-boot-on;
2294 };
2295
2296 vdd_3v3_sys: regulator-vdd-3v3-sys {
2297 compatible = "regulator-fixed";
2298 regulator-name = "VDD_3V3_SYS";
2299 regulator-min-microvolt = <3300000>;
2300 regulator-max-microvolt = <3300000>;
2301 regulator-always-on;
2302 regulator-boot-on;
2303 };
2304
2305 vdd_3v3_ao: regulator-vdd-3v3-ao {
2306 compatible = "regulator-fixed";
2307 regulator-name = "VDD_3V3_AO";
2308 regulator-min-microvolt = <3300000>;
2309 regulator-max-microvolt = <3300000>;
2310 regulator-always-on;
2311 regulator-boot-on;
2312 };
2313
2314 vdd_1v8: regulator-vdd-1v8 {
2315 compatible = "regulator-fixed";
2316 regulator-name = "VDD_1V8";
2317 regulator-min-microvolt = <1800000>;
2318 regulator-max-microvolt = <1800000>;
2319 regulator-always-on;
2320 regulator-boot-on;
2321 };
2322
2323 vdd_hdmi: regulator-vdd-hdmi {
2324 compatible = "regulator-fixed";
2325 regulator-name = "VDD_5V0_HDMI_CON";
2326 regulator-min-microvolt = <5000000>;
2327 regulator-max-microvolt = <5000000>;
2328 regulator-always-on;
2329 regulator-boot-on;
2330 };
2331
2332 sound {
2333 compatible = "nvidia,tegra186-audio-graph-card";
2334 status = "okay";
2335
2336 dais = /* ADMAIF (FE) Ports */
2337 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2338 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2339 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2340 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2341 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2342 /* XBAR Ports */
2343 <&xbar_i2s3_port>, <&xbar_i2s5_port>,
2344 <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic4_port>,
2345 <&xbar_dspk1_port>, <&xbar_dspk2_port>,
2346 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2347 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2348 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2349 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2350 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2351 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2352 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2353 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2354 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2355 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2356 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2357 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2358 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2359 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2360 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2361 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2362 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2363 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2364 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2365 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2366 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2367 <&xbar_asrc_in7_port>,
2368 <&xbar_ope1_in_port>,
2369 /* HW accelerators */
2370 <&sfc1_out_port>, <&sfc2_out_port>,
2371 <&sfc3_out_port>, <&sfc4_out_port>,
2372 <&mvc1_out_port>, <&mvc2_out_port>,
2373 <&amx1_out_port>, <&amx2_out_port>,
2374 <&amx3_out_port>, <&amx4_out_port>,
2375 <&adx1_out1_port>, <&adx1_out2_port>,
2376 <&adx1_out3_port>, <&adx1_out4_port>,
2377 <&adx2_out1_port>, <&adx2_out2_port>,
2378 <&adx2_out3_port>, <&adx2_out4_port>,
2379 <&adx3_out1_port>, <&adx3_out2_port>,
2380 <&adx3_out3_port>, <&adx3_out4_port>,
2381 <&adx4_out1_port>, <&adx4_out2_port>,
2382 <&adx4_out3_port>, <&adx4_out4_port>,
2383 <&mixer_out1_port>, <&mixer_out2_port>,
2384 <&mixer_out3_port>, <&mixer_out4_port>,
2385 <&mixer_out5_port>,
2386 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2387 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2388 <&ope1_out_port>,
2389 /* BE I/O Ports */
2390 <&i2s3_port>, <&i2s5_port>,
2391 <&dmic1_port>, <&dmic2_port>, <&dmic4_port>,
2392 <&dspk1_port>, <&dspk2_port>;
2393
2394 label = "NVIDIA Jetson Xavier NX APE";
2395 };
2396
2397 thermal-zones {
2398 cpu-thermal {
2399 polling-delay = <0>;
2400 polling-delay-passive = <500>;
2401 status = "okay";
2402
2403 trips {
2404 cpu_trip_critical: critical {
2405 temperature = <96500>;
2406 hysteresis = <0>;
2407 type = "critical";
2408 };
2409
2410 cpu_trip_hot: hot {
2411 temperature = <70000>;
2412 hysteresis = <2000>;
2413 type = "hot";
2414 };
2415
2416 cpu_trip_active: active {
2417 temperature = <50000>;
2418 hysteresis = <2000>;
2419 type = "active";
2420 };
2421
2422 cpu_trip_passive: passive {
2423 temperature = <30000>;
2424 hysteresis = <2000>;
2425 type = "passive";
2426 };
2427 };
2428
2429 cooling-maps {
2430 cpu-critical {
2431 cooling-device = <&fan 3 3>;
2432 trip = <&cpu_trip_critical>;
2433 };
2434
2435 cpu-hot {
2436 cooling-device = <&fan 2 2>;
2437 trip = <&cpu_trip_hot>;
2438 };
2439
2440 cpu-active {
2441 cooling-device = <&fan 1 1>;
2442 trip = <&cpu_trip_active>;
2443 };
2444
2445 cpu-passive {
2446 cooling-device = <&fan 0 0>;
2447 trip = <&cpu_trip_passive>;
2448 };
2449 };
2450 };
2451
2452 gpu-thermal {
2453 polling-delay = <0>;
2454 polling-delay-passive = <500>;
2455 status = "okay";
2456
2457 trips {
2458 gpu_alert0: critical {
2459 temperature = <99000>;
2460 hysteresis = <0>;
2461 type = "critical";
2462 };
2463 };
2464 };
2465
2466 aux-thermal {
2467 polling-delay = <0>;
2468 polling-delay-passive = <500>;
2469 status = "okay";
2470
2471 trips {
2472 aux_alert0: critical {
2473 temperature = <90000>;
2474 hysteresis = <0>;
2475 type = "critical";
2476 };
2477 };
2478 };
2479 };
2480 };
"Das U-Boot" Source Tree