]> git.ipfire.org Git - thirdparty/u-boot.git/blob - src/arm64/rockchip/rk3368-r88.dts
Squashed 'dts/upstream/' content from commit aaba2d45dc2a
[thirdparty/u-boot.git] / src / arm64 / rockchip / rk3368-r88.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
4 */
5
6 /dts-v1/;
7 #include "rk3368.dtsi"
8 #include <dt-bindings/input/input.h>
9
10 / {
11 model = "Rockchip R88";
12 compatible = "rockchip,r88", "rockchip,rk3368";
13
14 aliases {
15 mmc0 = &sdio0;
16 mmc1 = &emmc;
17 };
18
19 chosen {
20 stdout-path = "serial2:115200n8";
21 };
22
23 memory {
24 device_type = "memory";
25 reg = <0x0 0x0 0x0 0x40000000>;
26 };
27
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
33 };
34
35 keys: gpio-keys {
36 compatible = "gpio-keys";
37 pinctrl-names = "default";
38 pinctrl-0 = <&pwr_key>;
39
40 key-power {
41 wakeup-source;
42 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
43 label = "GPIO Power";
44 linux,code = <KEY_POWER>;
45 };
46 };
47
48 leds: gpio-leds {
49 compatible = "gpio-leds";
50
51 work_led: led-0 {
52 gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
53 label = "r88:green:led";
54 pinctrl-names = "default";
55 pinctrl-0 = <&led_ctl>;
56 };
57 };
58
59 ir: ir-receiver {
60 compatible = "gpio-ir-receiver";
61 gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&ir_int>;
64 };
65
66 sdio_pwrseq: sdio-pwrseq {
67 compatible = "mmc-pwrseq-simple";
68 clocks = <&hym8563>;
69 clock-names = "ext_clock";
70 pinctrl-names = "default";
71 pinctrl-0 = <&bt_rst>, <&wifi_reg_on>;
72
73 reset-gpios =
74 /* BT_RST_N */
75 <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
76
77 /* WL_REG_ON */
78 <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
79 };
80
81 vcc_18: vcc18-regulator {
82 compatible = "regulator-fixed";
83 regulator-name = "vcc_18";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
86 regulator-always-on;
87 regulator-boot-on;
88 vin-supply = <&vcc_sys>;
89 };
90
91 /* supplies both host and otg */
92 vcc_host: vcc-host-regulator {
93 compatible = "regulator-fixed";
94 enable-active-high;
95 gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&host_vbus_drv>;
98 regulator-name = "vcc_host";
99 regulator-always-on;
100 regulator-boot-on;
101 vin-supply = <&vcc_sys>;
102 };
103
104 vcc_io: vcc-io-regulator {
105 compatible = "regulator-fixed";
106 regulator-name = "vcc_io";
107 regulator-min-microvolt = <3300000>;
108 regulator-max-microvolt = <3300000>;
109 regulator-always-on;
110 regulator-boot-on;
111 vin-supply = <&vcc_sys>;
112 };
113
114 vcc_lan: vcc-lan-regulator {
115 compatible = "regulator-fixed";
116 regulator-name = "vcc_lan";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 regulator-always-on;
120 regulator-boot-on;
121 vin-supply = <&vcc_io>;
122 };
123
124 vcc_sys: vcc-sys-regulator {
125 compatible = "regulator-fixed";
126 regulator-name = "vcc_sys";
127 regulator-min-microvolt = <5000000>;
128 regulator-max-microvolt = <5000000>;
129 regulator-always-on;
130 regulator-boot-on;
131 };
132
133 vccio_wl: vccio-wl-regulator {
134 compatible = "regulator-fixed";
135 regulator-name = "vccio_wl";
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 regulator-always-on;
139 regulator-boot-on;
140 vin-supply = <&vcc_io>;
141 };
142
143 vdd_10: vdd-10-regulator {
144 compatible = "regulator-fixed";
145 regulator-name = "vdd_10";
146 regulator-min-microvolt = <1000000>;
147 regulator-max-microvolt = <1000000>;
148 regulator-always-on;
149 regulator-boot-on;
150 vin-supply = <&vcc_sys>;
151 };
152 };
153
154 &emmc {
155 bus-width = <8>;
156 cap-mmc-highspeed;
157 mmc-pwrseq = <&emmc_pwrseq>;
158 non-removable;
159 pinctrl-names = "default";
160 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
161 status = "okay";
162 };
163
164 &gmac {
165 phy-supply = <&vcc_lan>;
166 phy-mode = "rmii";
167 clock_in_out = "output";
168 snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
169 snps,reset-active-low;
170 snps,reset-delays-us = <0 10000 1000000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&rmii_pins>;
173 tx_delay = <0x30>;
174 rx_delay = <0x10>;
175 status = "okay";
176 };
177
178 &i2c0 {
179 status = "okay";
180
181 vdd_cpu: syr827@40 {
182 compatible = "silergy,syr827";
183 reg = <0x40>;
184 fcs,suspend-voltage-selector = <1>;
185 regulator-name = "vdd_cpu";
186 regulator-enable-ramp-delay = <300>;
187 regulator-min-microvolt = <712500>;
188 regulator-max-microvolt = <1500000>;
189 regulator-ramp-delay = <8000>;
190 regulator-always-on;
191 regulator-boot-on;
192 vin-supply = <&vcc_sys>;
193 };
194
195 hym8563: rtc@51 {
196 compatible = "haoyu,hym8563";
197 reg = <0x51>;
198 #clock-cells = <0>;
199 clock-output-names = "xin32k";
200 /* rtc_int is not connected */
201 };
202 };
203
204 &io_domains {
205 status = "okay";
206
207 audio-supply = <&vcc_io>;
208 gpio30-supply = <&vcc_io>;
209 gpio1830-supply = <&vcc_io>;
210 wifi-supply = <&vccio_wl>;
211 };
212
213 &sdio0 {
214 assigned-clocks = <&cru SCLK_SDIO0>;
215 assigned-clock-parents = <&cru PLL_CPLL>;
216 bus-width = <4>;
217 cap-sd-highspeed;
218 cap-sdio-irq;
219 keep-power-in-suspend;
220 mmc-pwrseq = <&sdio_pwrseq>;
221 non-removable;
222 pinctrl-names = "default";
223 pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
224 vmmc-supply = <&vcc_io>;
225 vqmmc-supply = <&vccio_wl>;
226 status = "okay";
227 };
228
229 &pinctrl {
230 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
231 bias-disable;
232 drive-strength = <8>;
233 };
234
235 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
236 bias-pull-up;
237 drive-strength = <8>;
238 };
239
240 emmc {
241 emmc_bus8: emmc-bus8 {
242 rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>,
243 <1 RK_PC3 2 &pcfg_pull_up_drv_8ma>,
244 <1 RK_PC4 2 &pcfg_pull_up_drv_8ma>,
245 <1 RK_PC5 2 &pcfg_pull_up_drv_8ma>,
246 <1 RK_PC6 2 &pcfg_pull_up_drv_8ma>,
247 <1 RK_PC7 2 &pcfg_pull_up_drv_8ma>,
248 <1 RK_PD0 2 &pcfg_pull_up_drv_8ma>,
249 <1 RK_PD1 2 &pcfg_pull_up_drv_8ma>;
250 };
251
252 emmc-clk {
253 rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>;
254 };
255
256 emmc-cmd {
257 rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>;
258 };
259
260 emmc_reset: emmc-reset {
261 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
262 };
263 };
264
265 ir {
266 ir_int: ir-int {
267 rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
268 };
269 };
270
271 keys {
272 pwr_key: pwr-key {
273 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
274 };
275 };
276
277 leds {
278 stby_pwren: stby-pwren {
279 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
280 };
281
282 led_ctl: led-ctl {
283 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
284 };
285 };
286
287 sdio {
288 wifi_reg_on: wifi-reg-on {
289 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
290 };
291
292 bt_rst: bt-rst {
293 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
294 };
295 };
296
297 usb {
298 host_vbus_drv: host-vbus-drv {
299 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
300 };
301 };
302 };
303
304 &pmu_io_domains {
305 status = "okay";
306
307 pmu-supply = <&vcc_io>;
308 vop-supply = <&vcc_io>;
309 };
310
311 &saradc {
312 vref-supply = <&vcc_18>;
313 status = "okay";
314 };
315
316 &tsadc {
317 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
318 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
319 status = "okay";
320 };
321
322 &uart2 {
323 status = "okay";
324 };
325
326 &usb_host0_ehci {
327 status = "okay";
328 };
329
330 &usb_otg {
331 dr_mode = "host";
332 status = "okay";
333 };
334
335 &wdt {
336 status = "okay";
337 };