1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * RK3399-based FriendlyElec boards device tree source
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
15 #include <dt-bindings/input/linux-event-codes.h>
16 #include "rk3399.dtsi"
17 #include "rk3399-opp.dtsi"
27 stdout-path = "serial2:1500000n8";
30 clkin_gmac: external-gmac-clock {
31 compatible = "fixed-clock";
32 clock-frequency = <125000000>;
33 clock-output-names = "clkin_gmac";
37 vcc3v3_sys: vcc3v3-sys {
38 compatible = "regulator-fixed";
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 regulator-name = "vcc3v3_sys";
46 vcc5v0_sys: vcc5v0-sys {
47 compatible = "regulator-fixed";
50 regulator-min-microvolt = <5000000>;
51 regulator-max-microvolt = <5000000>;
52 regulator-name = "vcc5v0_sys";
53 vin-supply = <&vdd_5v>;
56 /* switched by pmic_sleep */
57 vcc1v8_s3: vcc1v8-s3 {
58 compatible = "regulator-fixed";
61 regulator-min-microvolt = <1800000>;
62 regulator-max-microvolt = <1800000>;
63 regulator-name = "vcc1v8_s3";
64 vin-supply = <&vcc_1v8>;
67 vcc3v0_sd: vcc3v0-sd {
68 compatible = "regulator-fixed";
70 gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&sdmmc0_pwr_h>;
74 regulator-min-microvolt = <3000000>;
75 regulator-max-microvolt = <3000000>;
76 regulator-name = "vcc3v0_sd";
77 vin-supply = <&vcc3v3_sys>;
81 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
82 * drives the enable pin, but we can't quite model that.
84 vcca0v9_s3: vcca0v9-s3 {
85 compatible = "regulator-fixed";
86 regulator-min-microvolt = <900000>;
87 regulator-max-microvolt = <900000>;
88 regulator-name = "vcca0v9_s3";
89 vin-supply = <&vcc1v8_s3>;
92 /* As above, actually supplied by vcc3v3_sys */
93 vcca1v8_s3: vcca1v8-s3 {
94 compatible = "regulator-fixed";
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <1800000>;
97 regulator-name = "vcca1v8_s3";
98 vin-supply = <&vcc1v8_s3>;
101 vbus_typec: vbus-typec {
102 compatible = "regulator-fixed";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
105 regulator-name = "vbus_typec";
109 compatible = "gpio-keys";
111 pinctrl-names = "default";
112 pinctrl-0 = <&power_key>;
115 debounce-interval = <100>;
116 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
117 label = "GPIO Key Power";
118 linux,code = <KEY_POWER>;
124 compatible = "gpio-leds";
125 pinctrl-names = "default";
126 pinctrl-0 = <&status_led_pin>;
129 gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
130 label = "status_led";
131 linux,default-trigger = "heartbeat";
135 sdio_pwrseq: sdio-pwrseq {
136 compatible = "mmc-pwrseq-simple";
138 clock-names = "ext_clock";
139 pinctrl-names = "default";
140 pinctrl-0 = <&wifi_reg_on_h>;
141 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
146 cpu-supply = <&vdd_cpu_b>;
150 cpu-supply = <&vdd_cpu_b>;
154 cpu-supply = <&vdd_cpu_l>;
158 cpu-supply = <&vdd_cpu_l>;
162 cpu-supply = <&vdd_cpu_l>;
166 cpu-supply = <&vdd_cpu_l>;
170 rockchip,enable-strobe-pulldown;
175 assigned-clock-parents = <&clkin_gmac>;
176 assigned-clocks = <&cru SCLK_RMII_SRC>;
177 clock_in_out = "input";
178 pinctrl-names = "default";
179 pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
180 phy-handle = <&rtl8211e>;
182 phy-supply = <&vcc3v3_s3>;
188 compatible = "snps,dwmac-mdio";
189 #address-cells = <1>;
192 rtl8211e: ethernet-phy@1 {
194 interrupt-parent = <&gpio3>;
195 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
196 reset-assert-us = <10000>;
197 reset-deassert-us = <30000>;
198 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
204 mali-supply = <&vdd_gpu>;
209 ddc-i2c-bus = <&i2c7>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&hdmi_cec>;
220 clock-frequency = <400000>;
221 i2c-scl-rising-time-ns = <160>;
222 i2c-scl-falling-time-ns = <30>;
225 vdd_cpu_b: regulator@40 {
226 compatible = "silergy,syr827";
228 fcs,suspend-voltage-selector = <1>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&cpu_b_sleep>;
233 regulator-min-microvolt = <712500>;
234 regulator-max-microvolt = <1500000>;
235 regulator-name = "vdd_cpu_b";
236 regulator-ramp-delay = <1000>;
237 vin-supply = <&vcc3v3_sys>;
239 regulator-state-mem {
240 regulator-off-in-suspend;
244 vdd_gpu: regulator@41 {
245 compatible = "silergy,syr828";
247 fcs,suspend-voltage-selector = <1>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&gpu_sleep>;
252 regulator-min-microvolt = <712500>;
253 regulator-max-microvolt = <1500000>;
254 regulator-name = "vdd_gpu";
255 regulator-ramp-delay = <1000>;
256 vin-supply = <&vcc3v3_sys>;
258 regulator-state-mem {
259 regulator-off-in-suspend;
264 compatible = "rockchip,rk808";
266 clock-output-names = "xin32k", "rtc_clko_wifi";
268 interrupt-parent = <&gpio1>;
269 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>;
272 rockchip,system-power-controller;
275 vcc1-supply = <&vcc3v3_sys>;
276 vcc2-supply = <&vcc3v3_sys>;
277 vcc3-supply = <&vcc3v3_sys>;
278 vcc4-supply = <&vcc3v3_sys>;
279 vcc6-supply = <&vcc3v3_sys>;
280 vcc7-supply = <&vcc3v3_sys>;
281 vcc8-supply = <&vcc3v3_sys>;
282 vcc9-supply = <&vcc3v3_sys>;
283 vcc10-supply = <&vcc3v3_sys>;
284 vcc11-supply = <&vcc3v3_sys>;
285 vcc12-supply = <&vcc3v3_sys>;
286 vddio-supply = <&vcc_3v0>;
289 vdd_center: DCDC_REG1 {
292 regulator-min-microvolt = <750000>;
293 regulator-max-microvolt = <1350000>;
294 regulator-name = "vdd_center";
295 regulator-ramp-delay = <6001>;
297 regulator-state-mem {
298 regulator-off-in-suspend;
302 vdd_cpu_l: DCDC_REG2 {
305 regulator-min-microvolt = <750000>;
306 regulator-max-microvolt = <1350000>;
307 regulator-name = "vdd_cpu_l";
308 regulator-ramp-delay = <6001>;
310 regulator-state-mem {
311 regulator-off-in-suspend;
318 regulator-name = "vcc_ddr";
320 regulator-state-mem {
321 regulator-on-in-suspend;
328 regulator-min-microvolt = <1800000>;
329 regulator-max-microvolt = <1800000>;
330 regulator-name = "vcc_1v8";
332 regulator-state-mem {
333 regulator-on-in-suspend;
334 regulator-suspend-microvolt = <1800000>;
338 vcc1v8_cam: LDO_REG1 {
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <1800000>;
343 regulator-name = "vcc1v8_cam";
345 regulator-state-mem {
346 regulator-off-in-suspend;
350 vcc3v0_touch: LDO_REG2 {
353 regulator-min-microvolt = <3000000>;
354 regulator-max-microvolt = <3000000>;
355 regulator-name = "vcc3v0_touch";
357 regulator-state-mem {
358 regulator-off-in-suspend;
362 vcc1v8_pmupll: LDO_REG3 {
365 regulator-min-microvolt = <1800000>;
366 regulator-max-microvolt = <1800000>;
367 regulator-name = "vcc1v8_pmupll";
369 regulator-state-mem {
370 regulator-on-in-suspend;
371 regulator-suspend-microvolt = <1800000>;
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <3300000>;
380 regulator-name = "vcc_sdio";
382 regulator-state-mem {
383 regulator-on-in-suspend;
384 regulator-suspend-microvolt = <3000000>;
388 vcca3v0_codec: LDO_REG5 {
391 regulator-min-microvolt = <3000000>;
392 regulator-max-microvolt = <3000000>;
393 regulator-name = "vcca3v0_codec";
395 regulator-state-mem {
396 regulator-off-in-suspend;
403 regulator-min-microvolt = <1500000>;
404 regulator-max-microvolt = <1500000>;
405 regulator-name = "vcc_1v5";
407 regulator-state-mem {
408 regulator-on-in-suspend;
409 regulator-suspend-microvolt = <1500000>;
413 vcca1v8_codec: LDO_REG7 {
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-name = "vcca1v8_codec";
420 regulator-state-mem {
421 regulator-off-in-suspend;
428 regulator-min-microvolt = <3000000>;
429 regulator-max-microvolt = <3000000>;
430 regulator-name = "vcc_3v0";
432 regulator-state-mem {
433 regulator-on-in-suspend;
434 regulator-suspend-microvolt = <3000000>;
438 vcc3v3_s3: SWITCH_REG1 {
441 regulator-name = "vcc3v3_s3";
443 regulator-state-mem {
444 regulator-off-in-suspend;
448 vcc3v3_s0: SWITCH_REG2 {
451 regulator-name = "vcc3v3_s0";
453 regulator-state-mem {
454 regulator-off-in-suspend;
462 clock-frequency = <200000>;
463 i2c-scl-rising-time-ns = <150>;
464 i2c-scl-falling-time-ns = <30>;
473 clock-frequency = <400000>;
474 i2c-scl-rising-time-ns = <160>;
475 i2c-scl-falling-time-ns = <30>;
478 fusb0: typec-portc@22 {
479 compatible = "fcs,fusb302";
481 interrupt-parent = <&gpio1>;
482 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
483 pinctrl-names = "default";
484 pinctrl-0 = <&fusb0_int>;
485 vbus-supply = <&vbus_typec>;
498 bt656-supply = <&vcc_1v8>;
499 audio-supply = <&vcca1v8_codec>;
500 sdmmc-supply = <&vcc_sdio>;
501 gpio1830-supply = <&vcc_3v0>;
506 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
507 assigned-clock-rates = <100000000>;
508 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
514 vpcie0v9-supply = <&vcca0v9_s3>;
515 vpcie1v8-supply = <&vcca1v8_s3>;
521 fusb0_int: fusb0-int {
522 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
527 status_led_pin: status-led-pin {
528 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
534 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
538 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
543 cpu_b_sleep: cpu-b-sleep {
544 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
547 gpu_sleep: gpu-sleep {
548 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
551 pmic_int_l: pmic-int-l {
552 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
557 power_key: power-key {
558 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
563 bt_host_wake_l: bt-host-wake-l {
564 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
567 bt_reg_on_h: bt-reg-on-h {
568 /* external pullup to VCC1V8_PMUPLL */
569 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
572 bt_wake_l: bt-wake-l {
573 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
576 wifi_reg_on_h: wifi-reg_on-h {
577 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
582 sdmmc0_det_l: sdmmc0-det-l {
583 rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
586 sdmmc0_pwr_h: sdmmc0-pwr-h {
587 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
593 pmu1830-supply = <&vcc_3v0>;
606 pinctrl-names = "active";
607 pinctrl-0 = <&pwm2_pin_pull_down>;
612 vref-supply = <&vcca1v8_s3>;
627 keep-power-in-suspend;
628 mmc-pwrseq = <&sdio_pwrseq>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
640 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
642 pinctrl-names = "default";
643 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
645 vmmc-supply = <&vcc3v0_sd>;
646 vqmmc-supply = <&vcc_sdio>;
659 /* tshut mode 0:CRU 1:GPIO */
660 rockchip,hw-tshut-mode = <1>;
661 /* tshut polarity 0:LOW 1:HIGH */
662 rockchip,hw-tshut-polarity = <1>;
691 pinctrl-names = "default";
692 pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
696 compatible = "brcm,bcm43438-bt";
699 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
700 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
701 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
702 max-speed = <4000000>;
703 pinctrl-names = "default";
704 pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
705 vbat-supply = <&vcc3v3_sys>;
706 vddio-supply = <&vcc_1v8>;