]> git.ipfire.org Git - thirdparty/u-boot.git/blob - src/arm64/rockchip/rk3566-lubancat-1.dts
Squashed 'dts/upstream/' content from commit aaba2d45dc2a
[thirdparty/u-boot.git] / src / arm64 / rockchip / rk3566-lubancat-1.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
8 #include "rk3566.dtsi"
9
10 / {
11 model = "EmbedFire LubanCat 1";
12 compatible = "embedfire,lubancat-1", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdmmc0;
17 mmc1 = &sdhci;
18 };
19
20 chosen: chosen {
21 stdout-path = "serial2:1500000n8";
22 };
23
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
28 #clock-cells = <0>;
29 };
30
31 hdmi-con {
32 compatible = "hdmi-connector";
33 type = "a";
34
35 port {
36 hdmi_con_in: endpoint {
37 remote-endpoint = <&hdmi_out_con>;
38 };
39 };
40 };
41
42 gpio-leds {
43 compatible = "gpio-leds";
44
45 sys_led: sys-led {
46 label = "sys_led";
47 linux,default-trigger = "heartbeat";
48 default-state = "on";
49 gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&sys_led_pin>;
52 };
53 };
54
55 usb_5v: usb-5v-regulator {
56 compatible = "regulator-fixed";
57 regulator-name = "usb_5v";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <5000000>;
62 };
63
64 vcc5v0_sys: vcc5v0-sys-regulator {
65 compatible = "regulator-fixed";
66 regulator-name = "vcc5v0_sys";
67 regulator-always-on;
68 regulator-boot-on;
69 regulator-min-microvolt = <5000000>;
70 regulator-max-microvolt = <5000000>;
71 vin-supply = <&usb_5v>;
72 };
73
74 vcc3v3_sys: vcc3v3-sys-regulator {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc3v3_sys";
77 regulator-always-on;
78 regulator-boot-on;
79 regulator-min-microvolt = <3300000>;
80 regulator-max-microvolt = <3300000>;
81 vin-supply = <&vcc5v0_sys>;
82 };
83
84 vcc3v3_pcie: vcc3v3-pcie-regulator {
85 compatible = "regulator-fixed";
86 regulator-name = "vcc3v3_pcie";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
89 enable-active-high;
90 gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
91 startup-delay-us = <5000>;
92 vin-supply = <&vcc5v0_sys>;
93 };
94
95 vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
96 compatible = "regulator-fixed";
97 enable-active-high;
98 gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&vcc5v0_usb20_host_en>;
101 regulator-name = "vcc5v0_usb20_host";
102 regulator-always-on;
103 };
104
105 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
106 compatible = "regulator-fixed";
107 enable-active-high;
108 gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
109 pinctrl-names = "default";
110 pinctrl-0 = <&vcc5v0_usb30_host_en>;
111 regulator-name = "vcc5v0_usb30_host";
112 regulator-always-on;
113 };
114 };
115
116 &uart2 {
117 status = "okay";
118 };
119
120 &combphy1 {
121 status = "okay";
122 };
123
124 &combphy2 {
125 status = "okay";
126 };
127
128 &cpu0 {
129 cpu-supply = <&vdd_cpu>;
130 };
131
132 &cpu1 {
133 cpu-supply = <&vdd_cpu>;
134 };
135
136 &cpu2 {
137 cpu-supply = <&vdd_cpu>;
138 };
139
140 &cpu3 {
141 cpu-supply = <&vdd_cpu>;
142 };
143
144 &gpu {
145 mali-supply = <&vdd_gpu>;
146 status = "okay";
147 };
148
149 &hdmi {
150 avdd-0v9-supply = <&vdda0v9_image>;
151 avdd-1v8-supply = <&vcca1v8_image>;
152 status = "okay";
153 };
154
155 &hdmi_in {
156 hdmi_in_vp0: endpoint {
157 remote-endpoint = <&vp0_out_hdmi>;
158 };
159 };
160
161 &hdmi_out {
162 hdmi_out_con: endpoint {
163 remote-endpoint = <&hdmi_con_in>;
164 };
165 };
166
167 &hdmi_sound {
168 status = "okay";
169 };
170
171 &i2c0 {
172 status = "okay";
173
174 vdd_cpu: regulator@1c {
175 compatible = "tcs,tcs4525";
176 reg = <0x1c>;
177 fcs,suspend-voltage-selector = <1>;
178 regulator-name = "vdd_cpu";
179 regulator-always-on;
180 regulator-boot-on;
181 regulator-min-microvolt = <800000>;
182 regulator-max-microvolt = <1150000>;
183 regulator-ramp-delay = <2300>;
184 vin-supply = <&vcc5v0_sys>;
185
186 regulator-state-mem {
187 regulator-off-in-suspend;
188 };
189 };
190
191 rk809: pmic@20 {
192 compatible = "rockchip,rk809";
193 reg = <0x20>;
194 interrupt-parent = <&gpio0>;
195 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
196 clock-output-names = "rk808-clkout1", "rk808-clkout2";
197
198 pinctrl-names = "default";
199 pinctrl-0 = <&pmic_int>;
200 rockchip,system-power-controller;
201 wakeup-source;
202 #clock-cells = <1>;
203
204 vcc1-supply = <&vcc3v3_sys>;
205 vcc2-supply = <&vcc3v3_sys>;
206 vcc3-supply = <&vcc3v3_sys>;
207 vcc4-supply = <&vcc3v3_sys>;
208 vcc5-supply = <&vcc3v3_sys>;
209 vcc6-supply = <&vcc3v3_sys>;
210 vcc7-supply = <&vcc3v3_sys>;
211 vcc8-supply = <&vcc3v3_sys>;
212 vcc9-supply = <&vcc3v3_sys>;
213
214 regulators {
215 vdd_logic: DCDC_REG1 {
216 regulator-name = "vdd_logic";
217 regulator-always-on;
218 regulator-boot-on;
219 regulator-min-microvolt = <500000>;
220 regulator-max-microvolt = <1350000>;
221 regulator-ramp-delay = <6001>;
222 regulator-initial-mode = <0x2>;
223
224 regulator-state-mem {
225 regulator-off-in-suspend;
226 };
227 };
228
229 vdd_gpu: DCDC_REG2 {
230 regulator-name = "vdd_gpu";
231 regulator-always-on;
232 regulator-boot-on;
233 regulator-min-microvolt = <500000>;
234 regulator-max-microvolt = <1350000>;
235 regulator-ramp-delay = <6001>;
236 regulator-initial-mode = <0x2>;
237
238 regulator-state-mem {
239 regulator-off-in-suspend;
240 };
241 };
242
243 vcc_ddr: DCDC_REG3 {
244 regulator-name = "vcc_ddr";
245 regulator-always-on;
246 regulator-boot-on;
247 regulator-initial-mode = <0x2>;
248
249 regulator-state-mem {
250 regulator-on-in-suspend;
251 };
252 };
253
254 vdd_npu: DCDC_REG4 {
255 regulator-name = "vdd_npu";
256 regulator-always-on;
257 regulator-boot-on;
258 regulator-min-microvolt = <500000>;
259 regulator-max-microvolt = <1350000>;
260 regulator-ramp-delay = <6001>;
261 regulator-initial-mode = <0x2>;
262
263 regulator-state-mem {
264 regulator-off-in-suspend;
265 };
266 };
267
268 vcc_1v8: DCDC_REG5 {
269 regulator-name = "vcc_1v8";
270 regulator-always-on;
271 regulator-boot-on;
272 regulator-min-microvolt = <1800000>;
273 regulator-max-microvolt = <1800000>;
274
275 regulator-state-mem {
276 regulator-off-in-suspend;
277 };
278 };
279
280 vdda0v9_image: LDO_REG1 {
281 regulator-name = "vdda0v9_image";
282 regulator-boot-on;
283 regulator-always-on;
284 regulator-min-microvolt = <900000>;
285 regulator-max-microvolt = <900000>;
286
287 regulator-state-mem {
288 regulator-off-in-suspend;
289 };
290 };
291
292 vdda_0v9: LDO_REG2 {
293 regulator-name = "vdda_0v9";
294 regulator-always-on;
295 regulator-boot-on;
296 regulator-min-microvolt = <900000>;
297 regulator-max-microvolt = <900000>;
298
299 regulator-state-mem {
300 regulator-off-in-suspend;
301 };
302 };
303
304 vdda0v9_pmu: LDO_REG3 {
305 regulator-name = "vdda0v9_pmu";
306 regulator-always-on;
307 regulator-boot-on;
308 regulator-min-microvolt = <900000>;
309 regulator-max-microvolt = <900000>;
310
311 regulator-state-mem {
312 regulator-on-in-suspend;
313 regulator-suspend-microvolt = <900000>;
314 };
315 };
316
317 vccio_acodec: LDO_REG4 {
318 regulator-name = "vccio_acodec";
319 regulator-always-on;
320 regulator-boot-on;
321 regulator-min-microvolt = <3300000>;
322 regulator-max-microvolt = <3300000>;
323
324 regulator-state-mem {
325 regulator-off-in-suspend;
326 };
327 };
328
329 vccio_sd: LDO_REG5 {
330 regulator-name = "vccio_sd";
331 regulator-always-on;
332 regulator-boot-on;
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <3300000>;
335
336 regulator-state-mem {
337 regulator-off-in-suspend;
338 };
339 };
340
341 vcc3v3_pmu: LDO_REG6 {
342 regulator-name = "vcc3v3_pmu";
343 regulator-always-on;
344 regulator-boot-on;
345 regulator-min-microvolt = <3300000>;
346 regulator-max-microvolt = <3300000>;
347
348 regulator-state-mem {
349 regulator-on-in-suspend;
350 regulator-suspend-microvolt = <3300000>;
351 };
352 };
353
354 vcca_1v8: LDO_REG7 {
355 regulator-name = "vcca_1v8";
356 regulator-always-on;
357 regulator-boot-on;
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360
361 regulator-state-mem {
362 regulator-off-in-suspend;
363 };
364 };
365
366 vcca1v8_pmu: LDO_REG8 {
367 regulator-name = "vcca1v8_pmu";
368 regulator-always-on;
369 regulator-boot-on;
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
372
373 regulator-state-mem {
374 regulator-on-in-suspend;
375 regulator-suspend-microvolt = <1800000>;
376 };
377 };
378
379 vcca1v8_image: LDO_REG9 {
380 regulator-name = "vcca1v8_image";
381 regulator-always-on;
382 regulator-boot-on;
383 regulator-min-microvolt = <1800000>;
384 regulator-max-microvolt = <1800000>;
385
386 regulator-state-mem {
387 regulator-off-in-suspend;
388 };
389 };
390
391 vcc_3v3: SWITCH_REG1 {
392 regulator-name = "vcc_3v3";
393 regulator-always-on;
394 regulator-boot-on;
395
396 regulator-state-mem {
397 regulator-off-in-suspend;
398 };
399 };
400
401 vcc3v3_sd: SWITCH_REG2 {
402 regulator-name = "vcc3v3_sd";
403 regulator-always-on;
404 regulator-boot-on;
405
406 regulator-state-mem {
407 regulator-off-in-suspend;
408 };
409 };
410 };
411 };
412 };
413
414 &i2s1_8ch {
415 rockchip,trcm-sync-tx-only;
416 status = "okay";
417 };
418
419 &gmac1 {
420 phy-mode = "rgmii";
421 clock_in_out = "output";
422 snps,reset-gpio = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
423 snps,reset-active-low;
424 /* Reset time is 75ms, 100ms */
425 snps,reset-delays-us = <0 75000 100000>;
426 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
427 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
428 assigned-clock-rates = <0>, <125000000>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&gmac1m1_miim
431 &gmac1m1_tx_bus2_level3
432 &gmac1m1_rx_bus2
433 &gmac1m1_rgmii_clk_level2
434 &gmac1m1_rgmii_bus_level3>;
435 tx_delay = <0x1a>;
436 rx_delay = <0x0c>;
437 phy-handle = <&rgmii_phy1>;
438 status = "okay";
439 };
440
441 &mdio1 {
442 rgmii_phy1: phy@0 {
443 compatible = "ethernet-phy-ieee802.3-c22";
444 reg = <0x0>;
445 };
446 };
447
448 &pcie2x1 {
449 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
450 disable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
451 vpcie3v3-supply = <&vcc3v3_pcie>;
452 status = "okay";
453 };
454
455 &pinctrl {
456 leds {
457 sys_led_pin: sys-status-led-pin {
458 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
459 };
460 };
461
462 usb {
463 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
464 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
465 };
466
467 vcc5v0_usb30_host_en: vcc5v0-usb30-host-en {
468 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
469 };
470 };
471
472 pmic {
473 pmic_int: pmic_int {
474 rockchip,pins =
475 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
476 };
477 };
478 };
479
480 &pmu_io_domains {
481 pmuio2-supply = <&vcc3v3_pmu>;
482 vccio1-supply = <&vccio_acodec>;
483 vccio3-supply = <&vccio_sd>;
484 vccio4-supply = <&vcc_3v3>;
485 vccio5-supply = <&vcc_3v3>;
486 vccio6-supply = <&vcc_1v8>;
487 vccio7-supply = <&vcc_3v3>;
488 status = "okay";
489 };
490
491 &saradc {
492 vref-supply = <&vcca_1v8>;
493 status = "okay";
494 };
495
496 &tsadc {
497 rockchip,hw-tshut-mode = <1>;
498 rockchip,hw-tshut-polarity = <0>;
499 status = "okay";
500 };
501
502 &sdhci {
503 assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
504 assigned-clock-rates = <200000000>, <24000000>, <200000000>;
505 bus-width = <8>;
506 max-frequency = <200000000>;
507 mmc-hs200-1_8v;
508 non-removable;
509 pinctrl-names = "default";
510 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
511 supports-emmc;
512 status = "okay";
513 };
514
515 &sdmmc0 {
516 max-frequency = <150000000>;
517 supports-sd;
518 bus-width = <4>;
519 cap-mmc-highspeed;
520 cap-sd-highspeed;
521 disable-wp;
522 sd-uhs-sdr104;
523 vmmc-supply = <&vcc3v3_sd>;
524 vqmmc-supply = <&vccio_sd>;
525 pinctrl-names = "default";
526 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
527 status = "okay";
528 };
529
530 /* USB OTG/USB Host_1 USB 2.0 Comb */
531 &usb2phy0 {
532 status = "okay";
533 };
534
535 &usb2phy0_host {
536 status = "okay";
537 };
538
539 &usb2phy0_otg {
540 status = "okay";
541 };
542
543 &usb_host0_ehci {
544 status = "okay";
545 };
546
547 &usb_host0_ohci {
548 status = "okay";
549 };
550
551 /* USB Host_2/USB Host_3 USB 2.0 Comb */
552 &usb2phy1 {
553 status = "okay";
554 };
555
556 &usb2phy1_host {
557 status = "okay";
558 };
559
560 &usb2phy1_otg {
561 status = "okay";
562 };
563
564 &usb_host1_ehci {
565 status = "okay";
566 };
567
568 &usb_host1_ohci {
569 status = "okay";
570 };
571
572 /* USB3.0 Host */
573 &usb_host1_xhci {
574 status = "okay";
575 };
576
577 &vop {
578 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
579 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
580 status = "okay";
581 };
582
583 &vop_mmu {
584 status = "okay";
585 };
586
587 &vp0 {
588 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
589 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
590 remote-endpoint = <&hdmi_in_vp0>;
591 };
592 };