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[thirdparty/u-boot.git] / src / arm64 / rockchip / rk3566-quartz64-a.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
8 #include "rk3566.dtsi"
9
10 / {
11 model = "Pine64 RK3566 Quartz64-A Board";
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdmmc0;
17 mmc1 = &sdhci;
18 };
19
20 chosen: chosen {
21 stdout-path = "serial2:1500000n8";
22 };
23
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
28 #clock-cells = <0>;
29 };
30
31 fan: gpio_fan {
32 compatible = "gpio-fan";
33 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34 gpio-fan,speed-map = <0 0
35 4500 1>;
36 pinctrl-names = "default";
37 pinctrl-0 = <&fan_en_h>;
38 #cooling-cells = <2>;
39 };
40
41 hdmi-con {
42 compatible = "hdmi-connector";
43 type = "a";
44
45 port {
46 hdmi_con_in: endpoint {
47 remote-endpoint = <&hdmi_out_con>;
48 };
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 led-work {
56 label = "work-led";
57 default-state = "off";
58 gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&work_led_enable_h>;
61 retain-state-suspended;
62 };
63
64 led-diy {
65 label = "diy-led";
66 default-state = "on";
67 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 pinctrl-names = "default";
70 pinctrl-0 = <&diy_led_enable_h>;
71 retain-state-suspended;
72 };
73 };
74
75 rk817-sound {
76 compatible = "simple-audio-card";
77 simple-audio-card,format = "i2s";
78 simple-audio-card,name = "Analog RK817";
79 simple-audio-card,mclk-fs = <256>;
80
81 simple-audio-card,cpu {
82 sound-dai = <&i2s1_8ch>;
83 };
84
85 simple-audio-card,codec {
86 sound-dai = <&rk817>;
87 };
88 };
89
90 sdio_pwrseq: sdio-pwrseq {
91 compatible = "mmc-pwrseq-simple";
92 clocks = <&rk817 1>;
93 clock-names = "ext_clock";
94 pinctrl-names = "default";
95 pinctrl-0 = <&wifi_enable_h>;
96 post-power-on-delay-ms = <100>;
97 power-off-delay-us = <5000000>;
98 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
99 };
100
101 spdif_dit: spdif-dit {
102 compatible = "linux,spdif-dit";
103 #sound-dai-cells = <0>;
104 };
105
106 spdif_sound: spdif-sound {
107 compatible = "simple-audio-card";
108 simple-audio-card,name = "SPDIF";
109
110 simple-audio-card,cpu {
111 sound-dai = <&spdif>;
112 };
113
114 simple-audio-card,codec {
115 sound-dai = <&spdif_dit>;
116 };
117 };
118
119 vcc12v_dcin: vcc12v_dcin {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc12v_dcin";
122 regulator-always-on;
123 regulator-boot-on;
124 regulator-min-microvolt = <12000000>;
125 regulator-max-microvolt = <12000000>;
126 };
127
128 /* vbus feeds the rk817 usb input.
129 * With no battery attached, also feeds vcc_bat+
130 * via ON/OFF_BAT jumper
131 */
132 vbus: vbus {
133 compatible = "regulator-fixed";
134 regulator-name = "vbus";
135 regulator-always-on;
136 regulator-boot-on;
137 regulator-min-microvolt = <5000000>;
138 regulator-max-microvolt = <5000000>;
139 vin-supply = <&vcc12v_dcin>;
140 };
141
142 vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
143 compatible = "regulator-fixed";
144 enable-active-high;
145 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pcie_enable_h>;
148 regulator-name = "vcc3v3_pcie_p";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 vin-supply = <&vcc_3v3>;
152 };
153
154 vcc5v0_usb: vcc5v0_usb {
155 compatible = "regulator-fixed";
156 regulator-name = "vcc5v0_usb";
157 regulator-always-on;
158 regulator-boot-on;
159 regulator-min-microvolt = <5000000>;
160 regulator-max-microvolt = <5000000>;
161 vin-supply = <&vcc12v_dcin>;
162 };
163
164 /* all four ports are controlled by one gpio
165 * the host ports are sourced from vcc5v0_usb
166 * the otg port is sourced from vcc5v0_midu
167 */
168 vcc5v0_usb20_host: vcc5v0_usb20_host {
169 compatible = "regulator-fixed";
170 enable-active-high;
171 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&vcc5v0_usb20_host_en>;
174 regulator-name = "vcc5v0_usb20_host";
175 regulator-min-microvolt = <5000000>;
176 regulator-max-microvolt = <5000000>;
177 vin-supply = <&vcc5v0_usb>;
178 };
179
180 vcc5v0_usb20_otg: vcc5v0_usb20_otg {
181 compatible = "regulator-fixed";
182 enable-active-high;
183 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
184 regulator-name = "vcc5v0_usb20_otg";
185 regulator-min-microvolt = <5000000>;
186 regulator-max-microvolt = <5000000>;
187 vin-supply = <&dcdc_boost>;
188 };
189
190 vcc3v3_sd: vcc3v3_sd {
191 compatible = "regulator-fixed";
192 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&vcc_sd_h>;
195 regulator-boot-on;
196 regulator-name = "vcc3v3_sd";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
199 vin-supply = <&vcc_3v3>;
200 };
201
202 /* sourced from vbus and vcc_bat+ via rk817 sw5 */
203 vcc_sys: vcc_sys {
204 compatible = "regulator-fixed";
205 regulator-name = "vcc_sys";
206 regulator-always-on;
207 regulator-boot-on;
208 regulator-min-microvolt = <4400000>;
209 regulator-max-microvolt = <4400000>;
210 vin-supply = <&vbus>;
211 };
212
213 /* sourced from vcc_sys, sdio module operates internally at 3.3v */
214 vcc_wl: vcc_wl {
215 compatible = "regulator-fixed";
216 regulator-name = "vcc_wl";
217 regulator-always-on;
218 regulator-boot-on;
219 regulator-min-microvolt = <3300000>;
220 regulator-max-microvolt = <3300000>;
221 vin-supply = <&vcc_sys>;
222 };
223 };
224
225 &combphy1 {
226 status = "okay";
227 };
228
229 &combphy2 {
230 status = "okay";
231 };
232
233 &cpu0 {
234 cpu-supply = <&vdd_cpu>;
235 };
236
237 &cpu1 {
238 cpu-supply = <&vdd_cpu>;
239 };
240
241 &cpu2 {
242 cpu-supply = <&vdd_cpu>;
243 };
244
245 &cpu3 {
246 cpu-supply = <&vdd_cpu>;
247 };
248
249 &cpu_thermal {
250 trips {
251 cpu_hot: cpu_hot {
252 temperature = <55000>;
253 hysteresis = <2000>;
254 type = "active";
255 };
256 };
257
258 cooling-maps {
259 map1 {
260 trip = <&cpu_hot>;
261 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
262 };
263 };
264 };
265
266 &gmac1 {
267 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
268 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
269 clock_in_out = "input";
270 phy-supply = <&vcc_3v3>;
271 phy-mode = "rgmii";
272 pinctrl-names = "default";
273 pinctrl-0 = <&gmac1m0_miim
274 &gmac1m0_tx_bus2
275 &gmac1m0_rx_bus2
276 &gmac1m0_rgmii_clk
277 &gmac1m0_clkinout
278 &gmac1m0_rgmii_bus>;
279 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
280 snps,reset-active-low;
281 /* Reset time is 20ms, 100ms for rtl8211f */
282 snps,reset-delays-us = <0 20000 100000>;
283 tx_delay = <0x30>;
284 rx_delay = <0x10>;
285 phy-handle = <&rgmii_phy1>;
286 status = "okay";
287 };
288
289 &gpu {
290 mali-supply = <&vdd_gpu>;
291 status = "okay";
292 };
293
294 &hdmi {
295 avdd-0v9-supply = <&vdda_0v9>;
296 avdd-1v8-supply = <&vcc_1v8>;
297 status = "okay";
298 };
299
300 &hdmi_in {
301 hdmi_in_vp0: endpoint {
302 remote-endpoint = <&vp0_out_hdmi>;
303 };
304 };
305
306 &hdmi_out {
307 hdmi_out_con: endpoint {
308 remote-endpoint = <&hdmi_con_in>;
309 };
310 };
311
312 &hdmi_sound {
313 status = "okay";
314 };
315
316 &i2c0 {
317 status = "okay";
318
319 vdd_cpu: regulator@1c {
320 compatible = "tcs,tcs4525";
321 reg = <0x1c>;
322 fcs,suspend-voltage-selector = <1>;
323 regulator-name = "vdd_cpu";
324 regulator-min-microvolt = <800000>;
325 regulator-max-microvolt = <1150000>;
326 regulator-ramp-delay = <2300>;
327 regulator-always-on;
328 regulator-boot-on;
329 vin-supply = <&vcc_sys>;
330
331 regulator-state-mem {
332 regulator-off-in-suspend;
333 };
334 };
335
336 rk817: pmic@20 {
337 compatible = "rockchip,rk817";
338 reg = <0x20>;
339 interrupt-parent = <&gpio0>;
340 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
341 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
342 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
343 clock-names = "mclk";
344 clocks = <&cru I2S1_MCLKOUT_TX>;
345 clock-output-names = "rk808-clkout1", "rk808-clkout2";
346 #clock-cells = <1>;
347 pinctrl-names = "default";
348 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
349 rockchip,system-power-controller;
350 #sound-dai-cells = <0>;
351 wakeup-source;
352
353 vcc1-supply = <&vcc_sys>;
354 vcc2-supply = <&vcc_sys>;
355 vcc3-supply = <&vcc_sys>;
356 vcc4-supply = <&vcc_sys>;
357 vcc5-supply = <&vcc_sys>;
358 vcc6-supply = <&vcc_sys>;
359 vcc7-supply = <&vcc_sys>;
360 vcc8-supply = <&vcc_sys>;
361 vcc9-supply = <&dcdc_boost>;
362
363 regulators {
364 vdd_logic: DCDC_REG1 {
365 regulator-always-on;
366 regulator-boot-on;
367 regulator-min-microvolt = <500000>;
368 regulator-max-microvolt = <1350000>;
369 regulator-ramp-delay = <6001>;
370 regulator-initial-mode = <0x2>;
371 regulator-name = "vdd_logic";
372 regulator-state-mem {
373 regulator-on-in-suspend;
374 regulator-suspend-microvolt = <900000>;
375 };
376 };
377
378 vdd_gpu: DCDC_REG2 {
379 regulator-always-on;
380 regulator-boot-on;
381 regulator-min-microvolt = <500000>;
382 regulator-max-microvolt = <1350000>;
383 regulator-ramp-delay = <6001>;
384 regulator-initial-mode = <0x2>;
385 regulator-name = "vdd_gpu";
386 regulator-state-mem {
387 regulator-off-in-suspend;
388 };
389 };
390
391 vcc_ddr: DCDC_REG3 {
392 regulator-always-on;
393 regulator-boot-on;
394 regulator-initial-mode = <0x2>;
395 regulator-name = "vcc_ddr";
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 };
399 };
400
401 vcc_3v3: DCDC_REG4 {
402 regulator-always-on;
403 regulator-boot-on;
404 regulator-min-microvolt = <3300000>;
405 regulator-max-microvolt = <3300000>;
406 regulator-initial-mode = <0x2>;
407 regulator-name = "vcc_3v3";
408 regulator-state-mem {
409 regulator-off-in-suspend;
410 };
411 };
412
413 vcca1v8_pmu: LDO_REG1 {
414 regulator-always-on;
415 regulator-boot-on;
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-name = "vcca1v8_pmu";
419 regulator-state-mem {
420 regulator-on-in-suspend;
421 regulator-suspend-microvolt = <1800000>;
422 };
423 };
424
425 vdda_0v9: LDO_REG2 {
426 regulator-always-on;
427 regulator-boot-on;
428 regulator-min-microvolt = <900000>;
429 regulator-max-microvolt = <900000>;
430 regulator-name = "vdda_0v9";
431 regulator-state-mem {
432 regulator-off-in-suspend;
433 };
434 };
435
436 vdda0v9_pmu: LDO_REG3 {
437 regulator-always-on;
438 regulator-boot-on;
439 regulator-min-microvolt = <900000>;
440 regulator-max-microvolt = <900000>;
441 regulator-name = "vdda0v9_pmu";
442 regulator-state-mem {
443 regulator-on-in-suspend;
444 regulator-suspend-microvolt = <900000>;
445 };
446 };
447
448 vccio_acodec: LDO_REG4 {
449 regulator-always-on;
450 regulator-boot-on;
451 regulator-min-microvolt = <3300000>;
452 regulator-max-microvolt = <3300000>;
453 regulator-name = "vccio_acodec";
454 regulator-state-mem {
455 regulator-off-in-suspend;
456 };
457 };
458
459 vccio_sd: LDO_REG5 {
460 regulator-always-on;
461 regulator-boot-on;
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <3300000>;
464 regulator-name = "vccio_sd";
465 regulator-state-mem {
466 regulator-off-in-suspend;
467 };
468 };
469
470 vcc3v3_pmu: LDO_REG6 {
471 regulator-always-on;
472 regulator-boot-on;
473 regulator-min-microvolt = <3300000>;
474 regulator-max-microvolt = <3300000>;
475 regulator-name = "vcc3v3_pmu";
476 regulator-state-mem {
477 regulator-on-in-suspend;
478 regulator-suspend-microvolt = <3300000>;
479 };
480 };
481
482 vcc_1v8: LDO_REG7 {
483 regulator-always-on;
484 regulator-boot-on;
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <1800000>;
487 regulator-name = "vcc_1v8";
488 regulator-state-mem {
489 regulator-off-in-suspend;
490 };
491 };
492
493 vcc1v8_dvp: LDO_REG8 {
494 regulator-always-on;
495 regulator-boot-on;
496 regulator-min-microvolt = <1800000>;
497 regulator-max-microvolt = <1800000>;
498 regulator-name = "vcc1v8_dvp";
499 regulator-state-mem {
500 regulator-off-in-suspend;
501 };
502 };
503
504 vcc2v8_dvp: LDO_REG9 {
505 regulator-always-on;
506 regulator-boot-on;
507 regulator-min-microvolt = <2800000>;
508 regulator-max-microvolt = <2800000>;
509 regulator-name = "vcc2v8_dvp";
510 regulator-state-mem {
511 regulator-off-in-suspend;
512 };
513 };
514
515 dcdc_boost: BOOST {
516 regulator-always-on;
517 regulator-boot-on;
518 regulator-min-microvolt = <5000000>;
519 regulator-max-microvolt = <5000000>;
520 regulator-name = "boost";
521 regulator-state-mem {
522 regulator-off-in-suspend;
523 };
524 };
525
526 otg_switch: OTG_SWITCH {
527 regulator-name = "otg_switch";
528 regulator-state-mem {
529 regulator-off-in-suspend;
530 };
531 };
532 };
533 };
534 };
535
536 /* i2c3 is exposed on con40
537 * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
538 * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
539 */
540 &i2c3 {
541 status = "okay";
542 };
543
544 &i2s0_8ch {
545 status = "okay";
546 };
547
548 &i2s1_8ch {
549 pinctrl-names = "default";
550 pinctrl-0 = <&i2s1m0_sclktx
551 &i2s1m0_lrcktx
552 &i2s1m0_sdi0
553 &i2s1m0_sdo0>;
554 rockchip,trcm-sync-tx-only;
555 status = "okay";
556 };
557
558 &mdio1 {
559 rgmii_phy1: ethernet-phy@0 {
560 compatible = "ethernet-phy-ieee802.3-c22";
561 reg = <0>;
562 };
563 };
564
565 &pcie2x1 {
566 pinctrl-names = "default";
567 pinctrl-0 = <&pcie_reset_h>;
568 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
569 vpcie3v3-supply = <&vcc3v3_pcie_p>;
570 status = "okay";
571 };
572
573 &pinctrl {
574 bt {
575 bt_enable_h: bt-enable-h {
576 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
577 };
578
579 bt_host_wake_l: bt-host-wake-l {
580 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
581 };
582
583 bt_wake_l: bt-wake-l {
584 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
585 };
586 };
587
588 fan {
589 fan_en_h: fan-en-h {
590 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
591 };
592 };
593
594 leds {
595 work_led_enable_h: work-led-enable-h {
596 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
597 };
598
599 diy_led_enable_h: diy-led-enable-h {
600 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
601 };
602 };
603
604 pcie {
605 pcie_enable_h: pcie-enable-h {
606 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
607 };
608
609 pcie_reset_h: pcie-reset-h {
610 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
611 };
612 };
613
614 pmic {
615 pmic_int_l: pmic-int-l {
616 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
617 };
618 };
619
620 usb2 {
621 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
622 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
623 };
624 };
625
626 sdio-pwrseq {
627 wifi_enable_h: wifi-enable-h {
628 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
629 };
630 };
631
632 vcc_sd {
633 vcc_sd_h: vcc-sd-h {
634 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
635 };
636 };
637 };
638
639 &pmu_io_domains {
640 pmuio1-supply = <&vcc3v3_pmu>;
641 pmuio2-supply = <&vcc3v3_pmu>;
642 vccio1-supply = <&vccio_acodec>;
643 vccio2-supply = <&vcc_1v8>;
644 vccio3-supply = <&vccio_sd>;
645 vccio4-supply = <&vcc_1v8>;
646 vccio5-supply = <&vcc_3v3>;
647 vccio6-supply = <&vcc1v8_dvp>;
648 vccio7-supply = <&vcc_3v3>;
649 status = "okay";
650 };
651
652 &sdhci {
653 bus-width = <8>;
654 mmc-hs200-1_8v;
655 non-removable;
656 vmmc-supply = <&vcc_3v3>;
657 vqmmc-supply = <&vcc_1v8>;
658 status = "okay";
659 };
660
661 &sdmmc0 {
662 bus-width = <4>;
663 cap-sd-highspeed;
664 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
665 disable-wp;
666 pinctrl-names = "default";
667 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
668 sd-uhs-sdr104;
669 vmmc-supply = <&vcc3v3_sd>;
670 vqmmc-supply = <&vccio_sd>;
671 status = "okay";
672 };
673
674 &sdmmc1 {
675 bus-width = <4>;
676 cap-sd-highspeed;
677 cap-sdio-irq;
678 keep-power-in-suspend;
679 mmc-pwrseq = <&sdio_pwrseq>;
680 non-removable;
681 pinctrl-names = "default";
682 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
683 sd-uhs-sdr104;
684 vmmc-supply = <&vcc_wl>;
685 vqmmc-supply = <&vcc_1v8>;
686 status = "okay";
687 };
688
689 &sfc {
690 pinctrl-0 = <&fspi_pins>;
691 pinctrl-names = "default";
692 #address-cells = <1>;
693 #size-cells = <0>;
694 status = "disabled";
695
696 flash@0 {
697 compatible = "jedec,spi-nor";
698 reg = <0>;
699 spi-max-frequency = <24000000>;
700 spi-rx-bus-width = <4>;
701 spi-tx-bus-width = <1>;
702 };
703 };
704
705 /* spdif is exposed on con40 pin 18 */
706 &spdif {
707 status = "okay";
708 };
709
710 /* spi1 is exposed on con40
711 * pin 11 - spi1_mosi_m1
712 * pin 13 - spi1_miso_m1
713 * pin 15 - spi1_clk_m1
714 * pin 17 - spi1_cs0_m1
715 */
716 &spi1 {
717 pinctrl-names = "default";
718 pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
719 };
720
721 &tsadc {
722 /* tshut mode 0:CRU 1:GPIO */
723 rockchip,hw-tshut-mode = <1>;
724 /* tshut polarity 0:LOW 1:HIGH */
725 rockchip,hw-tshut-polarity = <0>;
726 status = "okay";
727 };
728
729 /* uart0 is exposed on con40
730 * pin 12 - uart0_tx
731 * pin 14 - uart0_rx
732 */
733 &uart0 {
734 pinctrl-names = "default";
735 pinctrl-0 = <&uart0_xfer>;
736 status = "okay";
737 };
738
739 &uart1 {
740 pinctrl-names = "default";
741 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
742 status = "okay";
743 uart-has-rtscts;
744
745 bluetooth {
746 compatible = "brcm,bcm43438-bt";
747 clocks = <&rk817 1>;
748 clock-names = "lpo";
749 host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
750 device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
751 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
754 vbat-supply = <&vcc_sys>;
755 vddio-supply = <&vcca1v8_pmu>;
756 max-speed = <3000000>;
757 };
758 };
759
760 /* uart2 is exposed on con40
761 * pin 8 - uart2_tx_m0_debug
762 * pin 10 - uart2_rx_m0_debug
763 */
764 &uart2 {
765 status = "okay";
766 };
767
768 &usb_host0_ehci {
769 status = "okay";
770 };
771
772 &usb_host0_ohci {
773 status = "okay";
774 };
775
776 &usb_host1_ehci {
777 status = "okay";
778 };
779
780 &usb_host1_ohci {
781 status = "okay";
782 };
783
784 &usb_host0_xhci {
785 dr_mode = "host";
786 status = "okay";
787 };
788
789 /* usb3 controller is muxed with sata1 */
790 &usb_host1_xhci {
791 status = "okay";
792 };
793
794 &usb2phy0 {
795 status = "okay";
796 };
797
798 &usb2phy0_host {
799 phy-supply = <&vcc5v0_usb20_host>;
800 status = "okay";
801 };
802
803 &usb2phy0_otg {
804 phy-supply = <&vcc5v0_usb20_otg>;
805 status = "okay";
806 };
807
808 &usb2phy1 {
809 status = "okay";
810 };
811
812 &usb2phy1_host {
813 phy-supply = <&vcc5v0_usb20_host>;
814 status = "okay";
815 };
816
817 &usb2phy1_otg {
818 phy-supply = <&vcc5v0_usb20_host>;
819 status = "okay";
820 };
821
822 &vop {
823 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
824 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
825 status = "okay";
826 };
827
828 &vop_mmu {
829 status = "okay";
830 };
831
832 &vp0 {
833 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
834 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
835 remote-endpoint = <&hdmi_in_vp0>;
836 };
837 };