1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
11 model = "Pine64 RK3566 Quartz64-A Board";
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
32 compatible = "gpio-fan";
33 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
34 gpio-fan,speed-map = <0 0
36 pinctrl-names = "default";
37 pinctrl-0 = <&fan_en_h>;
42 compatible = "hdmi-connector";
46 hdmi_con_in: endpoint {
47 remote-endpoint = <&hdmi_out_con>;
53 compatible = "gpio-leds";
57 default-state = "off";
58 gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&work_led_enable_h>;
61 retain-state-suspended;
67 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
68 linux,default-trigger = "heartbeat";
69 pinctrl-names = "default";
70 pinctrl-0 = <&diy_led_enable_h>;
71 retain-state-suspended;
76 compatible = "simple-audio-card";
77 simple-audio-card,format = "i2s";
78 simple-audio-card,name = "Analog RK817";
79 simple-audio-card,mclk-fs = <256>;
81 simple-audio-card,cpu {
82 sound-dai = <&i2s1_8ch>;
85 simple-audio-card,codec {
90 sdio_pwrseq: sdio-pwrseq {
91 compatible = "mmc-pwrseq-simple";
93 clock-names = "ext_clock";
94 pinctrl-names = "default";
95 pinctrl-0 = <&wifi_enable_h>;
96 post-power-on-delay-ms = <100>;
97 power-off-delay-us = <5000000>;
98 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
101 spdif_dit: spdif-dit {
102 compatible = "linux,spdif-dit";
103 #sound-dai-cells = <0>;
106 spdif_sound: spdif-sound {
107 compatible = "simple-audio-card";
108 simple-audio-card,name = "SPDIF";
110 simple-audio-card,cpu {
111 sound-dai = <&spdif>;
114 simple-audio-card,codec {
115 sound-dai = <&spdif_dit>;
119 vcc12v_dcin: vcc12v_dcin {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc12v_dcin";
124 regulator-min-microvolt = <12000000>;
125 regulator-max-microvolt = <12000000>;
128 /* vbus feeds the rk817 usb input.
129 * With no battery attached, also feeds vcc_bat+
130 * via ON/OFF_BAT jumper
133 compatible = "regulator-fixed";
134 regulator-name = "vbus";
137 regulator-min-microvolt = <5000000>;
138 regulator-max-microvolt = <5000000>;
139 vin-supply = <&vcc12v_dcin>;
142 vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
143 compatible = "regulator-fixed";
145 gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pcie_enable_h>;
148 regulator-name = "vcc3v3_pcie_p";
149 regulator-min-microvolt = <3300000>;
150 regulator-max-microvolt = <3300000>;
151 vin-supply = <&vcc_3v3>;
154 vcc5v0_usb: vcc5v0_usb {
155 compatible = "regulator-fixed";
156 regulator-name = "vcc5v0_usb";
159 regulator-min-microvolt = <5000000>;
160 regulator-max-microvolt = <5000000>;
161 vin-supply = <&vcc12v_dcin>;
164 /* all four ports are controlled by one gpio
165 * the host ports are sourced from vcc5v0_usb
166 * the otg port is sourced from vcc5v0_midu
168 vcc5v0_usb20_host: vcc5v0_usb20_host {
169 compatible = "regulator-fixed";
171 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&vcc5v0_usb20_host_en>;
174 regulator-name = "vcc5v0_usb20_host";
175 regulator-min-microvolt = <5000000>;
176 regulator-max-microvolt = <5000000>;
177 vin-supply = <&vcc5v0_usb>;
180 vcc5v0_usb20_otg: vcc5v0_usb20_otg {
181 compatible = "regulator-fixed";
183 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
184 regulator-name = "vcc5v0_usb20_otg";
185 regulator-min-microvolt = <5000000>;
186 regulator-max-microvolt = <5000000>;
187 vin-supply = <&dcdc_boost>;
190 vcc3v3_sd: vcc3v3_sd {
191 compatible = "regulator-fixed";
192 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&vcc_sd_h>;
196 regulator-name = "vcc3v3_sd";
197 regulator-min-microvolt = <3300000>;
198 regulator-max-microvolt = <3300000>;
199 vin-supply = <&vcc_3v3>;
202 /* sourced from vbus and vcc_bat+ via rk817 sw5 */
204 compatible = "regulator-fixed";
205 regulator-name = "vcc_sys";
208 regulator-min-microvolt = <4400000>;
209 regulator-max-microvolt = <4400000>;
210 vin-supply = <&vbus>;
213 /* sourced from vcc_sys, sdio module operates internally at 3.3v */
215 compatible = "regulator-fixed";
216 regulator-name = "vcc_wl";
219 regulator-min-microvolt = <3300000>;
220 regulator-max-microvolt = <3300000>;
221 vin-supply = <&vcc_sys>;
234 cpu-supply = <&vdd_cpu>;
238 cpu-supply = <&vdd_cpu>;
242 cpu-supply = <&vdd_cpu>;
246 cpu-supply = <&vdd_cpu>;
252 temperature = <55000>;
261 cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
267 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
268 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
269 clock_in_out = "input";
270 phy-supply = <&vcc_3v3>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&gmac1m0_miim
279 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
280 snps,reset-active-low;
281 /* Reset time is 20ms, 100ms for rtl8211f */
282 snps,reset-delays-us = <0 20000 100000>;
285 phy-handle = <&rgmii_phy1>;
290 mali-supply = <&vdd_gpu>;
295 avdd-0v9-supply = <&vdda_0v9>;
296 avdd-1v8-supply = <&vcc_1v8>;
301 hdmi_in_vp0: endpoint {
302 remote-endpoint = <&vp0_out_hdmi>;
307 hdmi_out_con: endpoint {
308 remote-endpoint = <&hdmi_con_in>;
319 vdd_cpu: regulator@1c {
320 compatible = "tcs,tcs4525";
322 fcs,suspend-voltage-selector = <1>;
323 regulator-name = "vdd_cpu";
324 regulator-min-microvolt = <800000>;
325 regulator-max-microvolt = <1150000>;
326 regulator-ramp-delay = <2300>;
329 vin-supply = <&vcc_sys>;
331 regulator-state-mem {
332 regulator-off-in-suspend;
337 compatible = "rockchip,rk817";
339 interrupt-parent = <&gpio0>;
340 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
341 assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
342 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
343 clock-names = "mclk";
344 clocks = <&cru I2S1_MCLKOUT_TX>;
345 clock-output-names = "rk808-clkout1", "rk808-clkout2";
347 pinctrl-names = "default";
348 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
349 rockchip,system-power-controller;
350 #sound-dai-cells = <0>;
353 vcc1-supply = <&vcc_sys>;
354 vcc2-supply = <&vcc_sys>;
355 vcc3-supply = <&vcc_sys>;
356 vcc4-supply = <&vcc_sys>;
357 vcc5-supply = <&vcc_sys>;
358 vcc6-supply = <&vcc_sys>;
359 vcc7-supply = <&vcc_sys>;
360 vcc8-supply = <&vcc_sys>;
361 vcc9-supply = <&dcdc_boost>;
364 vdd_logic: DCDC_REG1 {
367 regulator-min-microvolt = <500000>;
368 regulator-max-microvolt = <1350000>;
369 regulator-ramp-delay = <6001>;
370 regulator-initial-mode = <0x2>;
371 regulator-name = "vdd_logic";
372 regulator-state-mem {
373 regulator-on-in-suspend;
374 regulator-suspend-microvolt = <900000>;
381 regulator-min-microvolt = <500000>;
382 regulator-max-microvolt = <1350000>;
383 regulator-ramp-delay = <6001>;
384 regulator-initial-mode = <0x2>;
385 regulator-name = "vdd_gpu";
386 regulator-state-mem {
387 regulator-off-in-suspend;
394 regulator-initial-mode = <0x2>;
395 regulator-name = "vcc_ddr";
396 regulator-state-mem {
397 regulator-on-in-suspend;
404 regulator-min-microvolt = <3300000>;
405 regulator-max-microvolt = <3300000>;
406 regulator-initial-mode = <0x2>;
407 regulator-name = "vcc_3v3";
408 regulator-state-mem {
409 regulator-off-in-suspend;
413 vcca1v8_pmu: LDO_REG1 {
416 regulator-min-microvolt = <1800000>;
417 regulator-max-microvolt = <1800000>;
418 regulator-name = "vcca1v8_pmu";
419 regulator-state-mem {
420 regulator-on-in-suspend;
421 regulator-suspend-microvolt = <1800000>;
428 regulator-min-microvolt = <900000>;
429 regulator-max-microvolt = <900000>;
430 regulator-name = "vdda_0v9";
431 regulator-state-mem {
432 regulator-off-in-suspend;
436 vdda0v9_pmu: LDO_REG3 {
439 regulator-min-microvolt = <900000>;
440 regulator-max-microvolt = <900000>;
441 regulator-name = "vdda0v9_pmu";
442 regulator-state-mem {
443 regulator-on-in-suspend;
444 regulator-suspend-microvolt = <900000>;
448 vccio_acodec: LDO_REG4 {
451 regulator-min-microvolt = <3300000>;
452 regulator-max-microvolt = <3300000>;
453 regulator-name = "vccio_acodec";
454 regulator-state-mem {
455 regulator-off-in-suspend;
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <3300000>;
464 regulator-name = "vccio_sd";
465 regulator-state-mem {
466 regulator-off-in-suspend;
470 vcc3v3_pmu: LDO_REG6 {
473 regulator-min-microvolt = <3300000>;
474 regulator-max-microvolt = <3300000>;
475 regulator-name = "vcc3v3_pmu";
476 regulator-state-mem {
477 regulator-on-in-suspend;
478 regulator-suspend-microvolt = <3300000>;
485 regulator-min-microvolt = <1800000>;
486 regulator-max-microvolt = <1800000>;
487 regulator-name = "vcc_1v8";
488 regulator-state-mem {
489 regulator-off-in-suspend;
493 vcc1v8_dvp: LDO_REG8 {
496 regulator-min-microvolt = <1800000>;
497 regulator-max-microvolt = <1800000>;
498 regulator-name = "vcc1v8_dvp";
499 regulator-state-mem {
500 regulator-off-in-suspend;
504 vcc2v8_dvp: LDO_REG9 {
507 regulator-min-microvolt = <2800000>;
508 regulator-max-microvolt = <2800000>;
509 regulator-name = "vcc2v8_dvp";
510 regulator-state-mem {
511 regulator-off-in-suspend;
518 regulator-min-microvolt = <5000000>;
519 regulator-max-microvolt = <5000000>;
520 regulator-name = "boost";
521 regulator-state-mem {
522 regulator-off-in-suspend;
526 otg_switch: OTG_SWITCH {
527 regulator-name = "otg_switch";
528 regulator-state-mem {
529 regulator-off-in-suspend;
536 /* i2c3 is exposed on con40
537 * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
538 * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
549 pinctrl-names = "default";
550 pinctrl-0 = <&i2s1m0_sclktx
554 rockchip,trcm-sync-tx-only;
559 rgmii_phy1: ethernet-phy@0 {
560 compatible = "ethernet-phy-ieee802.3-c22";
566 pinctrl-names = "default";
567 pinctrl-0 = <&pcie_reset_h>;
568 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
569 vpcie3v3-supply = <&vcc3v3_pcie_p>;
575 bt_enable_h: bt-enable-h {
576 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
579 bt_host_wake_l: bt-host-wake-l {
580 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
583 bt_wake_l: bt-wake-l {
584 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
590 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
595 work_led_enable_h: work-led-enable-h {
596 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
599 diy_led_enable_h: diy-led-enable-h {
600 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
605 pcie_enable_h: pcie-enable-h {
606 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
609 pcie_reset_h: pcie-reset-h {
610 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
615 pmic_int_l: pmic-int-l {
616 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
621 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
622 rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
627 wifi_enable_h: wifi-enable-h {
628 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
634 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
640 pmuio1-supply = <&vcc3v3_pmu>;
641 pmuio2-supply = <&vcc3v3_pmu>;
642 vccio1-supply = <&vccio_acodec>;
643 vccio2-supply = <&vcc_1v8>;
644 vccio3-supply = <&vccio_sd>;
645 vccio4-supply = <&vcc_1v8>;
646 vccio5-supply = <&vcc_3v3>;
647 vccio6-supply = <&vcc1v8_dvp>;
648 vccio7-supply = <&vcc_3v3>;
656 vmmc-supply = <&vcc_3v3>;
657 vqmmc-supply = <&vcc_1v8>;
664 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
666 pinctrl-names = "default";
667 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
669 vmmc-supply = <&vcc3v3_sd>;
670 vqmmc-supply = <&vccio_sd>;
678 keep-power-in-suspend;
679 mmc-pwrseq = <&sdio_pwrseq>;
681 pinctrl-names = "default";
682 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
684 vmmc-supply = <&vcc_wl>;
685 vqmmc-supply = <&vcc_1v8>;
690 pinctrl-0 = <&fspi_pins>;
691 pinctrl-names = "default";
692 #address-cells = <1>;
697 compatible = "jedec,spi-nor";
699 spi-max-frequency = <24000000>;
700 spi-rx-bus-width = <4>;
701 spi-tx-bus-width = <1>;
705 /* spdif is exposed on con40 pin 18 */
710 /* spi1 is exposed on con40
711 * pin 11 - spi1_mosi_m1
712 * pin 13 - spi1_miso_m1
713 * pin 15 - spi1_clk_m1
714 * pin 17 - spi1_cs0_m1
717 pinctrl-names = "default";
718 pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
722 /* tshut mode 0:CRU 1:GPIO */
723 rockchip,hw-tshut-mode = <1>;
724 /* tshut polarity 0:LOW 1:HIGH */
725 rockchip,hw-tshut-polarity = <0>;
729 /* uart0 is exposed on con40
734 pinctrl-names = "default";
735 pinctrl-0 = <&uart0_xfer>;
740 pinctrl-names = "default";
741 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
746 compatible = "brcm,bcm43438-bt";
749 host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
750 device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
751 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
752 pinctrl-names = "default";
753 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
754 vbat-supply = <&vcc_sys>;
755 vddio-supply = <&vcca1v8_pmu>;
756 max-speed = <3000000>;
760 /* uart2 is exposed on con40
761 * pin 8 - uart2_tx_m0_debug
762 * pin 10 - uart2_rx_m0_debug
789 /* usb3 controller is muxed with sata1 */
799 phy-supply = <&vcc5v0_usb20_host>;
804 phy-supply = <&vcc5v0_usb20_otg>;
813 phy-supply = <&vcc5v0_usb20_host>;
818 phy-supply = <&vcc5v0_usb20_host>;
823 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
824 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
833 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
834 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
835 remote-endpoint = <&hdmi_in_vp0>;