src/arm64/rockchip/rk3566-soquartz.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/pinctrl/rockchip.h>
   7 #include <dt-bindings/soc/rockchip,vop2.h>
   8 #include "rk3566.dtsi"
   9
  10 / {
  11         model = "Pine64 RK3566 SoQuartz SOM";
  12         compatible = "pine64,soquartz", "rockchip,rk3566";
  13
  14         aliases {
  15                 ethernet0 = &gmac1;
  16                 mmc0 = &sdmmc0;
  17                 mmc1 = &sdhci;
  18                 mmc2 = &sdmmc1;
  19         };
  20
  21         chosen: chosen {
  22                 stdout-path = "serial2:1500000n8";
  23         };
  24
  25         gmac1_clkin: external-gmac1-clock {
  26                 compatible = "fixed-clock";
  27                 clock-frequency = <125000000>;
  28                 clock-output-names = "gmac1_clkin";
  29                 #clock-cells = <0>;
  30         };
  31
  32         hdmi-con {
  33                 compatible = "hdmi-connector";
  34                 type = "a";
  35
  36                 port {
  37                         hdmi_con_in: endpoint {
  38                                 remote-endpoint = <&hdmi_out_con>;
  39                         };
  40                 };
  41         };
  42
  43         leds {
  44                 compatible = "gpio-leds";
  45
  46                 led_diy: led-diy {
  47                         label = "diy-led";
  48                         default-state = "on";
  49                         gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
  50                         linux,default-trigger = "heartbeat";
  51                         pinctrl-names = "default";
  52                         pinctrl-0 = <&diy_led_enable_h>;
  53                         retain-state-suspended;
  54                         status = "disabled";
  55                 };
  56
  57                 led_work: led-work {
  58                         label = "work-led";
  59                         default-state = "off";
  60                         gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
  61                         pinctrl-names = "default";
  62                         pinctrl-0 = <&work_led_enable_h>;
  63                         retain-state-suspended;
  64                         status = "disabled";
  65                 };
  66         };
  67
  68         sdio_pwrseq: sdio-pwrseq {
  69                 status = "okay";
  70                 compatible = "mmc-pwrseq-simple";
  71                 clocks = <&rk809 1>;
  72                 clock-names = "ext_clock";
  73                 pinctrl-names = "default";
  74                 pinctrl-0 = <&wifi_enable_h>;
  75                 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
  76         };
  77
  78         vbus: vbus-regulator {
  79                 compatible = "regulator-fixed";
  80                 regulator-name = "vbus";
  81                 regulator-always-on;
  82                 regulator-boot-on;
  83                 regulator-min-microvolt = <5000000>;
  84                 regulator-max-microvolt = <5000000>;
  85         };
  86
  87         /* sourced from vbus, vbus is provided by the carrier board */
  88         vcc5v0_sys: vcc5v0-sys-regulator {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "vcc5v0_sys";
  91                 regulator-always-on;
  92                 regulator-boot-on;
  93                 regulator-min-microvolt = <5000000>;
  94                 regulator-max-microvolt = <5000000>;
  95                 vin-supply = <&vbus>;
  96         };
  97
  98         vcc3v3_sys: vcc3v3-sys-regulator {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "vcc3v3_sys";
 101                 regulator-always-on;
 102                 regulator-boot-on;
 103                 regulator-min-microvolt = <3300000>;
 104                 regulator-max-microvolt = <3300000>;
 105                 vin-supply = <&vcc5v0_sys>;
 106         };
 107 };
 108
 109 &cpu0 {
 110         cpu-supply = <&vdd_cpu>;
 111 };
 112
 113 &cpu1 {
 114         cpu-supply = <&vdd_cpu>;
 115 };
 116
 117 &cpu2 {
 118         cpu-supply = <&vdd_cpu>;
 119 };
 120
 121 &cpu3 {
 122         cpu-supply = <&vdd_cpu>;
 123 };
 124
 125 &gmac1 {
 126         assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
 127         assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
 128         clock_in_out = "input";
 129         phy-supply = <&vcc_3v3>;
 130         phy-mode = "rgmii";
 131         pinctrl-names = "default";
 132         pinctrl-0 = <&gmac1m0_miim
 133                      &gmac1m0_tx_bus2
 134                      &gmac1m0_rx_bus2
 135                      &gmac1m0_rgmii_clk
 136                      &gmac1m0_clkinout
 137                      &gmac1m0_rgmii_bus>;
 138         snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
 139         snps,reset-active-low;
 140         /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
 141         snps,reset-delays-us = <0 20000 100000>;
 142         tx_delay = <0x30>;
 143         rx_delay = <0x10>;
 144         phy-handle = <&rgmii_phy1>;
 145         status = "disabled";
 146 };
 147
 148 &gpio0 {
 149         nextrst-hog {
 150                 gpio-hog;
 151                 /*
 152                  * GPIO_ACTIVE_LOW + output-low here means that the pin is set
 153                  * to high, because output-low decides the value pre-inversion.
 154                  */
 155                 gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
 156                 line-name = "nEXTRST";
 157                 output-low;
 158         };
 159 };
 160
 161 &gpu {
 162         mali-supply = <&vdd_gpu>;
 163         status = "okay";
 164 };
 165
 166 &hdmi {
 167         avdd-0v9-supply = <&vdda0v9_image>;
 168         avdd-1v8-supply = <&vcca1v8_image>;
 169         status = "okay";
 170 };
 171
 172 &hdmi_in {
 173         hdmi_in_vp0: endpoint {
 174                 remote-endpoint = <&vp0_out_hdmi>;
 175         };
 176 };
 177
 178 &hdmi_out {
 179         hdmi_out_con: endpoint {
 180                 remote-endpoint = <&hdmi_con_in>;
 181         };
 182 };
 183
 184 &hdmi_sound {
 185         status = "okay";
 186 };
 187
 188 &i2c0 {
 189         status = "okay";
 190
 191         vdd_cpu: regulator@1c {
 192                 compatible = "tcs,tcs4525";
 193                 reg = <0x1c>;
 194                 fcs,suspend-voltage-selector = <1>;
 195                 regulator-name = "vdd_cpu";
 196                 regulator-min-microvolt = <800000>;
 197                 regulator-max-microvolt = <1150000>;
 198                 regulator-ramp-delay = <2300>;
 199                 regulator-always-on;
 200                 regulator-boot-on;
 201                 vin-supply = <&vcc5v0_sys>;
 202
 203                 regulator-state-mem {
 204                         regulator-off-in-suspend;
 205                 };
 206         };
 207
 208         rk809: pmic@20 {
 209                 compatible = "rockchip,rk809";
 210                 reg = <0x20>;
 211                 interrupt-parent = <&gpio0>;
 212                 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
 213                 #clock-cells = <1>;
 214                 clock-output-names = "rk808-clkout1", "rk808-clkout2";
 215                 pinctrl-names = "default";
 216                 pinctrl-0 = <&pmic_int_l>;
 217                 rockchip,system-power-controller;
 218                 wakeup-source;
 219
 220                 vcc1-supply = <&vcc3v3_sys>;
 221                 vcc2-supply = <&vcc3v3_sys>;
 222                 vcc3-supply = <&vcc3v3_sys>;
 223                 vcc4-supply = <&vcc3v3_sys>;
 224                 vcc5-supply = <&vcc3v3_sys>;
 225                 vcc6-supply = <&vcc3v3_sys>;
 226                 vcc7-supply = <&vcc3v3_sys>;
 227                 vcc8-supply = <&vcc3v3_sys>;
 228                 vcc9-supply = <&vcc3v3_sys>;
 229
 230                 regulators {
 231                         vdd_logic: DCDC_REG1 {
 232                                 regulator-name = "vdd_logic";
 233                                 regulator-always-on;
 234                                 regulator-boot-on;
 235                                 regulator-min-microvolt = <500000>;
 236                                 regulator-max-microvolt = <1350000>;
 237                                 regulator-ramp-delay = <6001>;
 238                                 regulator-initial-mode = <0x2>;
 239                                 regulator-state-mem {
 240                                         regulator-on-in-suspend;
 241                                         regulator-suspend-microvolt = <900000>;
 242                                 };
 243                         };
 244
 245                         vdd_gpu: DCDC_REG2 {
 246                                 regulator-name = "vdd_gpu";
 247                                 regulator-always-on;
 248                                 regulator-boot-on;
 249                                 regulator-min-microvolt = <500000>;
 250                                 regulator-max-microvolt = <1350000>;
 251                                 regulator-ramp-delay = <6001>;
 252                                 regulator-initial-mode = <0x2>;
 253                                         regulator-state-mem {
 254                                         regulator-off-in-suspend;
 255                                 };
 256                         };
 257
 258                         vcc_ddr: DCDC_REG3 {
 259                                 regulator-always-on;
 260                                 regulator-boot-on;
 261                                 regulator-initial-mode = <0x2>;
 262                                 regulator-name = "vcc_ddr";
 263                                 regulator-state-mem {
 264                                         regulator-on-in-suspend;
 265                                 };
 266                         };
 267
 268                         vdd_npu: DCDC_REG4 {
 269                                 regulator-always-on;
 270                                 regulator-boot-on;
 271                                 regulator-min-microvolt = <500000>;
 272                                 regulator-max-microvolt = <1350000>;
 273                                 regulator-initial-mode = <0x2>;
 274                                 regulator-name = "vdd_npu";
 275                                 regulator-state-mem {
 276                                         regulator-off-in-suspend;
 277                                 };
 278                         };
 279
 280                         vcc_1v8: DCDC_REG5 {
 281                                 regulator-name = "vcc_1v8";
 282                                 regulator-always-on;
 283                                 regulator-boot-on;
 284                                 regulator-min-microvolt = <1800000>;
 285                                 regulator-max-microvolt = <1800000>;
 286                                 regulator-state-mem {
 287                                         regulator-on-in-suspend;
 288                                         regulator-suspend-microvolt = <1800000>;
 289                                 };
 290                         };
 291
 292                         vdda0v9_image: LDO_REG1 {
 293                                 regulator-always-on;
 294                                 regulator-boot-on;
 295                                 regulator-min-microvolt = <900000>;
 296                                 regulator-max-microvolt = <900000>;
 297                                 regulator-name = "vdda0v9_image";
 298                                 regulator-state-mem {
 299                                         regulator-on-in-suspend;
 300                                         regulator-suspend-microvolt = <900000>;
 301                                 };
 302                         };
 303
 304                         vdda_0v9: LDO_REG2 {
 305                                 regulator-always-on;
 306                                 regulator-boot-on;
 307                                 regulator-min-microvolt = <900000>;
 308                                 regulator-max-microvolt = <900000>;
 309                                 regulator-name = "vdda_0v9";
 310                                 regulator-state-mem {
 311                                         regulator-off-in-suspend;
 312                                 };
 313                         };
 314
 315                         vdda0v9_pmu: LDO_REG3 {
 316                                 regulator-always-on;
 317                                 regulator-boot-on;
 318                                 regulator-min-microvolt = <900000>;
 319                                 regulator-max-microvolt = <900000>;
 320                                 regulator-name = "vdda0v9_pmu";
 321                                 regulator-state-mem {
 322                                         regulator-on-in-suspend;
 323                                         regulator-suspend-microvolt = <900000>;
 324                                 };
 325                         };
 326
 327                         vccio_acodec: LDO_REG4 {
 328                                 regulator-always-on;
 329                                 regulator-boot-on;
 330                                 regulator-min-microvolt = <3300000>;
 331                                 regulator-max-microvolt = <3300000>;
 332                                 regulator-name = "vccio_acodec";
 333                                 regulator-state-mem {
 334                                         regulator-off-in-suspend;
 335                                 };
 336                         };
 337
 338                         vccio_sd: LDO_REG5 {
 339                                 regulator-always-on;
 340                                 regulator-boot-on;
 341                                 regulator-min-microvolt = <1800000>;
 342                                 regulator-max-microvolt = <3300000>;
 343                                 regulator-name = "vccio_sd";
 344                                 regulator-state-mem {
 345                                         regulator-off-in-suspend;
 346                                 };
 347                         };
 348
 349                         vcc3v3_pmu: LDO_REG6 {
 350                                 regulator-always-on;
 351                                 regulator-boot-on;
 352                                 regulator-min-microvolt = <3300000>;
 353                                 regulator-max-microvolt = <3300000>;
 354                                 regulator-name = "vcc3v3_pmu";
 355                                 regulator-state-mem {
 356                                         regulator-on-in-suspend;
 357                                         regulator-suspend-microvolt = <3300000>;
 358                                 };
 359                         };
 360
 361                         vcca_1v8: LDO_REG7 {
 362                                 regulator-always-on;
 363                                 regulator-boot-on;
 364                                 regulator-min-microvolt = <1800000>;
 365                                 regulator-max-microvolt = <1800000>;
 366                                 regulator-name = "vcca_1v8";
 367                                 regulator-state-mem {
 368                                         regulator-off-in-suspend;
 369                                 };
 370                         };
 371
 372                         vcca1v8_pmu: LDO_REG8 {
 373                                 regulator-always-on;
 374                                 regulator-boot-on;
 375                                 regulator-min-microvolt = <1800000>;
 376                                 regulator-max-microvolt = <1800000>;
 377                                 regulator-name = "vcca1v8_pmu";
 378                                 regulator-state-mem {
 379                                         regulator-off-in-suspend;
 380                                 };
 381                         };
 382
 383                         vcca1v8_image: LDO_REG9 {
 384                                 regulator-always-on;
 385                                 regulator-boot-on;
 386                                 regulator-min-microvolt = <1800000>;
 387                                 regulator-max-microvolt = <1800000>;
 388                                 regulator-name = "vcca1v8_image";
 389                                 regulator-state-mem {
 390                                         regulator-off-in-suspend;
 391                                 };
 392                         };
 393
 394                         vcc_3v3: SWITCH_REG1 {
 395                                 regulator-name = "vcc_3v3";
 396                                 regulator-state-mem {
 397                                         regulator-off-in-suspend;
 398                                 };
 399                         };
 400
 401                         vcc3v3_sd: SWITCH_REG2 {
 402                                 regulator-name = "vcc3v3_sd";
 403                                 status = "disabled";
 404                                 regulator-state-mem {
 405                                         regulator-on-in-suspend;
 406                                 };
 407                         };
 408
 409                 };
 410         };
 411 };
 412
 413 /*
 414  * i2c1 is exposed on CM1 / Module1A
 415  * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
 416  * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
 417  */
 418 &i2c1 {
 419         status = "disabled";
 420 };
 421
 422 /*
 423  * i2c2 is exposed on CM1 / Module1A
 424  * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
 425  * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
 426  */
 427 &i2c2 {
 428         pinctrl-names = "default";
 429         pinctrl-0 = <&i2c2m1_xfer>;
 430         status = "disabled";
 431 };
 432
 433 /*
 434  * i2c3 is exposed on CM1 / Module1A
 435  * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
 436  * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
 437  */
 438 &i2c3 {
 439         status = "disabled";
 440 };
 441
 442 /*
 443  * i2c4 is exposed on CM2 / Module1B
 444  * pin 45 - i2c4_scl_m1
 445  * pin 47 - i2c4_sda_m1
 446  */
 447 &i2c4 {
 448         pinctrl-names = "default";
 449         pinctrl-0 = <&i2c4m1_xfer>;
 450         status = "disabled";
 451 };
 452
 453 &i2s0_8ch {
 454         status = "okay";
 455 };
 456
 457 /*
 458  * i2s1_8ch is exposed on CM1 / Module1A
 459  * pin 24 - i2s1_sdi1_m1
 460  * pin 25 - i2s1_sdo0_m1
 461  * pin 26 - i2s1_lrck_tx_m1
 462  * pin 27 - i2s1_sdi0_m1
 463  * pin 29 - i2s1_sdi3_m1
 464  * pin 30 - i2s1_sdi2_m1
 465  * pin 40 - i2s1_sdo1_m1, shared with spi3
 466  * pin 41 - i2s1_sdo2_m1
 467  * pin 49 - i2s1_sclk_tx_m1
 468  * pin 50 - i2s1_mclk_m1
 469  * pin 56 - i2s1_sdo3_m1, shared with i2c2
 470  */
 471 &i2s1_8ch {
 472         pinctrl-names = "default";
 473         pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
 474                      &i2s1m1_lrcktx &i2s1m1_lrckrx
 475                      &i2s1m1_sdi0   &i2s1m1_sdi1
 476                      &i2s1m1_sdi2   &i2s1m1_sdi3
 477                      &i2s1m1_sdo0   &i2s1m1_sdo1
 478                      &i2s1m1_sdo2   &i2s1m1_sdo3>;
 479         status = "disabled";
 480 };
 481
 482 &mdio1 {
 483         rgmii_phy1: ethernet-phy@0 {
 484                 compatible = "ethernet-phy-ieee802.3-c22";
 485                 reg = <0>;
 486                 status = "disabled";
 487         };
 488 };
 489
 490 &pcie2x1 {
 491         pinctrl-names = "default";
 492         pinctrl-0 = <&pcie_reset_h>;
 493         reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
 494 };
 495
 496 &pinctrl {
 497         bt {
 498                 bt_enable_h: bt-enable-h {
 499                         rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
 500                 };
 501
 502                 bt_host_wake_l: bt-host-wake-l {
 503                         rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
 504                 };
 505
 506                 bt_wake_l: bt-wake-l {
 507                         rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 508                 };
 509         };
 510
 511         leds {
 512                 work_led_enable_h: work-led-enable-h {
 513                         rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
 514                 };
 515
 516                 diy_led_enable_h: diy-led-enable-h {
 517                         rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 518                 };
 519         };
 520
 521         pcie {
 522                 pcie_clkreq_h: pcie-clkreq-h {
 523                         rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
 524                 };
 525                 pcie_reset_h: pcie-reset-h {
 526                         rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
 527                 };
 528         };
 529
 530         pmic {
 531                 pmic_int_l: pmic-int-l {
 532                         rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
 533                 };
 534         };
 535
 536         sdio-pwrseq {
 537                 wifi_enable_h: wifi-enable-h {
 538                         rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
 539                 };
 540         };
 541 };
 542
 543 &pmu_io_domains {
 544         pmuio1-supply = <&vcc3v3_pmu>;
 545         pmuio2-supply = <&vcc3v3_pmu>;
 546         vccio1-supply = <&vcc_3v3>;
 547         vccio2-supply = <&vcc_1v8>;
 548         vccio3-supply = <&vccio_sd>;
 549         vccio4-supply = <&vcc_1v8>;
 550         vccio5-supply = <&vcc_3v3>;
 551         vccio6-supply = <&vcc_3v3>;
 552         vccio7-supply = <&vcc_3v3>;
 553         status = "okay";
 554 };
 555
 556 /*
 557  * saradc is exposed on CM1 / Module1A
 558  * pin 94 - saradc_vin3
 559  * pin 96 - saradc_vin2
 560  */
 561 &saradc {
 562         vref-supply = <&vcca_1v8>;
 563         status = "disabled";
 564 };
 565
 566 &sdhci {
 567         bus-width = <8>;
 568         mmc-hs200-1_8v;
 569         non-removable;
 570         vmmc-supply = <&vcc_3v3>;
 571         vqmmc-supply = <&vcc_1v8>;
 572         status = "okay";
 573 };
 574
 575 &sdmmc0 {
 576         broken-cd;
 577         bus-width = <4>;
 578         cap-sd-highspeed;
 579         disable-wp;
 580         pinctrl-names = "default";
 581         pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
 582         vqmmc-supply = <&vccio_sd>;
 583         status = "disabled";
 584 };
 585
 586 &sdmmc1 {
 587         bus-width = <4>;
 588         cap-sd-highspeed;
 589         cap-sdio-irq;
 590         keep-power-in-suspend;
 591         mmc-pwrseq = <&sdio_pwrseq>;
 592         non-removable;
 593         pinctrl-names = "default";
 594         pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
 595         sd-uhs-sdr50;
 596         vmmc-supply = <&vcc3v3_sys>;
 597         vqmmc-supply = <&vcc_1v8>;
 598         status = "okay";
 599 };
 600
 601 /*
 602  * spi3 is exposed on CM1 / Module1A
 603  * pin 37 - spi3_cs1_m0
 604  * pin 38 - spi3_clk_m0
 605  * pin 39 - spi3_cs0_m0
 606  * pin 40 - spi3_miso_m0, shared with i2s1_8ch
 607  * pin 44 - spi3_mosi_m0
 608  */
 609 &spi3 {
 610         status = "disabled";
 611 };
 612
 613 &tsadc {
 614         status = "okay";
 615 };
 616
 617 &uart1 {
 618         pinctrl-names = "default";
 619         pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
 620         uart-has-rtscts;
 621         status = "okay";
 622
 623         bluetooth {
 624                 compatible = "brcm,bcm43438-bt";
 625                 clocks = <&rk809 1>;
 626                 clock-names = "lpo";
 627                 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
 628                 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
 629                 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
 630                 pinctrl-names = "default";
 631                 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
 632                 vbat-supply = <&vcc3v3_sys>;
 633                 vddio-supply = <&vcca1v8_pmu>;
 634         };
 635 };
 636
 637 /*
 638  * uart2 is exposed on CM1 / Module1A
 639  * pin 51 - uart2_rx_m0
 640  * pin 55 - uart2_tx_m0
 641  */
 642 &uart2 {
 643         status = "disabled";
 644 };
 645
 646 /*
 647  * uart7 is exposed on CM1 / Module1A
 648  * pin 46 - uart7_tx_m2
 649  * pin 47 - uart7_rx_m2
 650  */
 651 &uart7 {
 652         pinctrl-names = "default";
 653         pinctrl-0 = <&uart7m2_xfer>;
 654         status = "disabled";
 655 };
 656
 657 /* dwc3_otg is the only usb port available */
 658 &usb2phy0 {
 659         status = "disabled";
 660 };
 661
 662 &usb2phy0_otg {
 663         status = "disabled";
 664 };
 665
 666 &usb_host0_xhci {
 667         status = "disabled";
 668 };
 669
 670 &vop {
 671         assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
 672         assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
 673         status = "okay";
 674 };
 675
 676 &vop_mmu {
 677         status = "okay";
 678 };
 679
 680 &vp0 {
 681         vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
 682                 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
 683                 remote-endpoint = <&hdmi_in_vp0>;
 684         };
 685 };