src/arm64/rockchip/rk3566-soquartz.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/pinctrl/rockchip.h>
   7 #include <dt-bindings/soc/rockchip,vop2.h>
   8 #include "rk3566.dtsi"
   9
  10 / {
  11         model = "Pine64 RK3566 SoQuartz SOM";
  12         compatible = "pine64,soquartz", "rockchip,rk3566";
  13
  14         aliases {
  15                 mmc0 = &sdmmc0;
  16                 mmc1 = &sdhci;
  17                 mmc2 = &sdmmc1;
  18         };
  19
  20         chosen: chosen {
  21                 stdout-path = "serial2:1500000n8";
  22         };
  23
  24         gmac1_clkin: external-gmac1-clock {
  25                 compatible = "fixed-clock";
  26                 clock-frequency = <125000000>;
  27                 clock-output-names = "gmac1_clkin";
  28                 #clock-cells = <0>;
  29         };
  30
  31         hdmi-con {
  32                 compatible = "hdmi-connector";
  33                 type = "a";
  34
  35                 port {
  36                         hdmi_con_in: endpoint {
  37                                 remote-endpoint = <&hdmi_out_con>;
  38                         };
  39                 };
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 led_diy: led-diy {
  46                         label = "diy-led";
  47                         default-state = "on";
  48                         gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
  49                         linux,default-trigger = "heartbeat";
  50                         pinctrl-names = "default";
  51                         pinctrl-0 = <&diy_led_enable_h>;
  52                         retain-state-suspended;
  53                         status = "disabled";
  54                 };
  55
  56                 led_work: led-work {
  57                         label = "work-led";
  58                         default-state = "off";
  59                         gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
  60                         pinctrl-names = "default";
  61                         pinctrl-0 = <&work_led_enable_h>;
  62                         retain-state-suspended;
  63                         status = "disabled";
  64                 };
  65         };
  66
  67         sdio_pwrseq: sdio-pwrseq {
  68                 status = "okay";
  69                 compatible = "mmc-pwrseq-simple";
  70                 clocks = <&rk809 1>;
  71                 clock-names = "ext_clock";
  72                 pinctrl-names = "default";
  73                 pinctrl-0 = <&wifi_enable_h>;
  74                 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
  75         };
  76
  77         vbus: vbus-regulator {
  78                 compatible = "regulator-fixed";
  79                 regulator-name = "vbus";
  80                 regulator-always-on;
  81                 regulator-boot-on;
  82                 regulator-min-microvolt = <5000000>;
  83                 regulator-max-microvolt = <5000000>;
  84         };
  85
  86         /* sourced from vbus, vbus is provided by the carrier board */
  87         vcc5v0_sys: vcc5v0-sys-regulator {
  88                 compatible = "regulator-fixed";
  89                 regulator-name = "vcc5v0_sys";
  90                 regulator-always-on;
  91                 regulator-boot-on;
  92                 regulator-min-microvolt = <5000000>;
  93                 regulator-max-microvolt = <5000000>;
  94                 vin-supply = <&vbus>;
  95         };
  96
  97         vcc3v3_sys: vcc3v3-sys-regulator {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "vcc3v3_sys";
 100                 regulator-always-on;
 101                 regulator-boot-on;
 102                 regulator-min-microvolt = <3300000>;
 103                 regulator-max-microvolt = <3300000>;
 104                 vin-supply = <&vcc5v0_sys>;
 105         };
 106 };
 107
 108 &cpu0 {
 109         cpu-supply = <&vdd_cpu>;
 110 };
 111
 112 &cpu1 {
 113         cpu-supply = <&vdd_cpu>;
 114 };
 115
 116 &cpu2 {
 117         cpu-supply = <&vdd_cpu>;
 118 };
 119
 120 &cpu3 {
 121         cpu-supply = <&vdd_cpu>;
 122 };
 123
 124 &gmac1 {
 125         assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
 126         assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
 127         clock_in_out = "input";
 128         phy-supply = <&vcc_3v3>;
 129         phy-mode = "rgmii";
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&gmac1m0_miim
 132                      &gmac1m0_tx_bus2
 133                      &gmac1m0_rx_bus2
 134                      &gmac1m0_rgmii_clk
 135                      &gmac1m0_clkinout
 136                      &gmac1m0_rgmii_bus>;
 137         snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
 138         snps,reset-active-low;
 139         /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
 140         snps,reset-delays-us = <0 20000 100000>;
 141         tx_delay = <0x30>;
 142         rx_delay = <0x10>;
 143         phy-handle = <&rgmii_phy1>;
 144         status = "disabled";
 145 };
 146
 147 &gpio0 {
 148         nextrst-hog {
 149                 gpio-hog;
 150                 /*
 151                  * GPIO_ACTIVE_LOW + output-low here means that the pin is set
 152                  * to high, because output-low decides the value pre-inversion.
 153                  */
 154                 gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
 155                 line-name = "nEXTRST";
 156                 output-low;
 157         };
 158 };
 159
 160 &gpu {
 161         mali-supply = <&vdd_gpu>;
 162         status = "okay";
 163 };
 164
 165 &hdmi {
 166         avdd-0v9-supply = <&vdda0v9_image>;
 167         avdd-1v8-supply = <&vcca1v8_image>;
 168         status = "okay";
 169 };
 170
 171 &hdmi_in {
 172         hdmi_in_vp0: endpoint {
 173                 remote-endpoint = <&vp0_out_hdmi>;
 174         };
 175 };
 176
 177 &hdmi_out {
 178         hdmi_out_con: endpoint {
 179                 remote-endpoint = <&hdmi_con_in>;
 180         };
 181 };
 182
 183 &hdmi_sound {
 184         status = "okay";
 185 };
 186
 187 &i2c0 {
 188         status = "okay";
 189
 190         vdd_cpu: regulator@1c {
 191                 compatible = "tcs,tcs4525";
 192                 reg = <0x1c>;
 193                 fcs,suspend-voltage-selector = <1>;
 194                 regulator-name = "vdd_cpu";
 195                 regulator-min-microvolt = <800000>;
 196                 regulator-max-microvolt = <1150000>;
 197                 regulator-ramp-delay = <2300>;
 198                 regulator-always-on;
 199                 regulator-boot-on;
 200                 vin-supply = <&vcc5v0_sys>;
 201
 202                 regulator-state-mem {
 203                         regulator-off-in-suspend;
 204                 };
 205         };
 206
 207         rk809: pmic@20 {
 208                 compatible = "rockchip,rk809";
 209                 reg = <0x20>;
 210                 interrupt-parent = <&gpio0>;
 211                 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
 212                 #clock-cells = <1>;
 213                 clock-output-names = "rk808-clkout1", "rk808-clkout2";
 214                 pinctrl-names = "default";
 215                 pinctrl-0 = <&pmic_int_l>;
 216                 rockchip,system-power-controller;
 217                 wakeup-source;
 218
 219                 vcc1-supply = <&vcc3v3_sys>;
 220                 vcc2-supply = <&vcc3v3_sys>;
 221                 vcc3-supply = <&vcc3v3_sys>;
 222                 vcc4-supply = <&vcc3v3_sys>;
 223                 vcc5-supply = <&vcc3v3_sys>;
 224                 vcc6-supply = <&vcc3v3_sys>;
 225                 vcc7-supply = <&vcc3v3_sys>;
 226                 vcc8-supply = <&vcc3v3_sys>;
 227                 vcc9-supply = <&vcc3v3_sys>;
 228
 229                 regulators {
 230                         vdd_logic: DCDC_REG1 {
 231                                 regulator-name = "vdd_logic";
 232                                 regulator-always-on;
 233                                 regulator-boot-on;
 234                                 regulator-min-microvolt = <500000>;
 235                                 regulator-max-microvolt = <1350000>;
 236                                 regulator-ramp-delay = <6001>;
 237                                 regulator-initial-mode = <0x2>;
 238                                 regulator-state-mem {
 239                                         regulator-on-in-suspend;
 240                                         regulator-suspend-microvolt = <900000>;
 241                                 };
 242                         };
 243
 244                         vdd_gpu: DCDC_REG2 {
 245                                 regulator-name = "vdd_gpu";
 246                                 regulator-always-on;
 247                                 regulator-boot-on;
 248                                 regulator-min-microvolt = <500000>;
 249                                 regulator-max-microvolt = <1350000>;
 250                                 regulator-ramp-delay = <6001>;
 251                                 regulator-initial-mode = <0x2>;
 252                                         regulator-state-mem {
 253                                         regulator-off-in-suspend;
 254                                 };
 255                         };
 256
 257                         vcc_ddr: DCDC_REG3 {
 258                                 regulator-always-on;
 259                                 regulator-boot-on;
 260                                 regulator-initial-mode = <0x2>;
 261                                 regulator-name = "vcc_ddr";
 262                                 regulator-state-mem {
 263                                         regulator-on-in-suspend;
 264                                 };
 265                         };
 266
 267                         vdd_npu: DCDC_REG4 {
 268                                 regulator-always-on;
 269                                 regulator-boot-on;
 270                                 regulator-min-microvolt = <500000>;
 271                                 regulator-max-microvolt = <1350000>;
 272                                 regulator-initial-mode = <0x2>;
 273                                 regulator-name = "vdd_npu";
 274                                 regulator-state-mem {
 275                                         regulator-off-in-suspend;
 276                                 };
 277                         };
 278
 279                         vcc_1v8: DCDC_REG5 {
 280                                 regulator-name = "vcc_1v8";
 281                                 regulator-always-on;
 282                                 regulator-boot-on;
 283                                 regulator-min-microvolt = <1800000>;
 284                                 regulator-max-microvolt = <1800000>;
 285                                 regulator-state-mem {
 286                                         regulator-on-in-suspend;
 287                                         regulator-suspend-microvolt = <1800000>;
 288                                 };
 289                         };
 290
 291                         vdda0v9_image: LDO_REG1 {
 292                                 regulator-always-on;
 293                                 regulator-boot-on;
 294                                 regulator-min-microvolt = <900000>;
 295                                 regulator-max-microvolt = <900000>;
 296                                 regulator-name = "vdda0v9_image";
 297                                 regulator-state-mem {
 298                                         regulator-on-in-suspend;
 299                                         regulator-suspend-microvolt = <900000>;
 300                                 };
 301                         };
 302
 303                         vdda_0v9: LDO_REG2 {
 304                                 regulator-always-on;
 305                                 regulator-boot-on;
 306                                 regulator-min-microvolt = <900000>;
 307                                 regulator-max-microvolt = <900000>;
 308                                 regulator-name = "vdda_0v9";
 309                                 regulator-state-mem {
 310                                         regulator-off-in-suspend;
 311                                 };
 312                         };
 313
 314                         vdda0v9_pmu: LDO_REG3 {
 315                                 regulator-always-on;
 316                                 regulator-boot-on;
 317                                 regulator-min-microvolt = <900000>;
 318                                 regulator-max-microvolt = <900000>;
 319                                 regulator-name = "vdda0v9_pmu";
 320                                 regulator-state-mem {
 321                                         regulator-on-in-suspend;
 322                                         regulator-suspend-microvolt = <900000>;
 323                                 };
 324                         };
 325
 326                         vccio_acodec: LDO_REG4 {
 327                                 regulator-always-on;
 328                                 regulator-boot-on;
 329                                 regulator-min-microvolt = <3300000>;
 330                                 regulator-max-microvolt = <3300000>;
 331                                 regulator-name = "vccio_acodec";
 332                                 regulator-state-mem {
 333                                         regulator-off-in-suspend;
 334                                 };
 335                         };
 336
 337                         vccio_sd: LDO_REG5 {
 338                                 regulator-always-on;
 339                                 regulator-boot-on;
 340                                 regulator-min-microvolt = <1800000>;
 341                                 regulator-max-microvolt = <3300000>;
 342                                 regulator-name = "vccio_sd";
 343                                 regulator-state-mem {
 344                                         regulator-off-in-suspend;
 345                                 };
 346                         };
 347
 348                         vcc3v3_pmu: LDO_REG6 {
 349                                 regulator-always-on;
 350                                 regulator-boot-on;
 351                                 regulator-min-microvolt = <3300000>;
 352                                 regulator-max-microvolt = <3300000>;
 353                                 regulator-name = "vcc3v3_pmu";
 354                                 regulator-state-mem {
 355                                         regulator-on-in-suspend;
 356                                         regulator-suspend-microvolt = <3300000>;
 357                                 };
 358                         };
 359
 360                         vcca_1v8: LDO_REG7 {
 361                                 regulator-always-on;
 362                                 regulator-boot-on;
 363                                 regulator-min-microvolt = <1800000>;
 364                                 regulator-max-microvolt = <1800000>;
 365                                 regulator-name = "vcca_1v8";
 366                                 regulator-state-mem {
 367                                         regulator-off-in-suspend;
 368                                 };
 369                         };
 370
 371                         vcca1v8_pmu: LDO_REG8 {
 372                                 regulator-always-on;
 373                                 regulator-boot-on;
 374                                 regulator-min-microvolt = <1800000>;
 375                                 regulator-max-microvolt = <1800000>;
 376                                 regulator-name = "vcca1v8_pmu";
 377                                 regulator-state-mem {
 378                                         regulator-off-in-suspend;
 379                                 };
 380                         };
 381
 382                         vcca1v8_image: LDO_REG9 {
 383                                 regulator-always-on;
 384                                 regulator-boot-on;
 385                                 regulator-min-microvolt = <1800000>;
 386                                 regulator-max-microvolt = <1800000>;
 387                                 regulator-name = "vcca1v8_image";
 388                                 regulator-state-mem {
 389                                         regulator-off-in-suspend;
 390                                 };
 391                         };
 392
 393                         vcc_3v3: SWITCH_REG1 {
 394                                 regulator-name = "vcc_3v3";
 395                                 regulator-state-mem {
 396                                         regulator-off-in-suspend;
 397                                 };
 398                         };
 399
 400                         vcc3v3_sd: SWITCH_REG2 {
 401                                 regulator-name = "vcc3v3_sd";
 402                                 status = "disabled";
 403                                 regulator-state-mem {
 404                                         regulator-on-in-suspend;
 405                                 };
 406                         };
 407
 408                 };
 409         };
 410 };
 411
 412 /*
 413  * i2c1 is exposed on CM1 / Module1A
 414  * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
 415  * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
 416  */
 417 &i2c1 {
 418         status = "disabled";
 419 };
 420
 421 /*
 422  * i2c2 is exposed on CM1 / Module1A
 423  * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
 424  * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
 425  */
 426 &i2c2 {
 427         pinctrl-names = "default";
 428         pinctrl-0 = <&i2c2m1_xfer>;
 429         status = "disabled";
 430 };
 431
 432 /*
 433  * i2c3 is exposed on CM1 / Module1A
 434  * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
 435  * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
 436  */
 437 &i2c3 {
 438         status = "disabled";
 439 };
 440
 441 /*
 442  * i2c4 is exposed on CM2 / Module1B
 443  * pin 45 - i2c4_scl_m1
 444  * pin 47 - i2c4_sda_m1
 445  */
 446 &i2c4 {
 447         pinctrl-names = "default";
 448         pinctrl-0 = <&i2c4m1_xfer>;
 449         status = "disabled";
 450 };
 451
 452 &i2s0_8ch {
 453         status = "okay";
 454 };
 455
 456 /*
 457  * i2s1_8ch is exposed on CM1 / Module1A
 458  * pin 24 - i2s1_sdi1_m1
 459  * pin 25 - i2s1_sdo0_m1
 460  * pin 26 - i2s1_lrck_tx_m1
 461  * pin 27 - i2s1_sdi0_m1
 462  * pin 29 - i2s1_sdi3_m1
 463  * pin 30 - i2s1_sdi2_m1
 464  * pin 40 - i2s1_sdo1_m1, shared with spi3
 465  * pin 41 - i2s1_sdo2_m1
 466  * pin 49 - i2s1_sclk_tx_m1
 467  * pin 50 - i2s1_mclk_m1
 468  * pin 56 - i2s1_sdo3_m1, shared with i2c2
 469  */
 470 &i2s1_8ch {
 471         pinctrl-names = "default";
 472         pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
 473                      &i2s1m1_lrcktx &i2s1m1_lrckrx
 474                      &i2s1m1_sdi0   &i2s1m1_sdi1
 475                      &i2s1m1_sdi2   &i2s1m1_sdi3
 476                      &i2s1m1_sdo0   &i2s1m1_sdo1
 477                      &i2s1m1_sdo2   &i2s1m1_sdo3>;
 478         status = "disabled";
 479 };
 480
 481 &mdio1 {
 482         rgmii_phy1: ethernet-phy@0 {
 483                 compatible = "ethernet-phy-ieee802.3-c22";
 484                 reg = <0>;
 485                 status = "disabled";
 486         };
 487 };
 488
 489 &pcie2x1 {
 490         pinctrl-names = "default";
 491         pinctrl-0 = <&pcie_reset_h>;
 492         reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
 493 };
 494
 495 &pinctrl {
 496         bt {
 497                 bt_enable_h: bt-enable-h {
 498                         rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
 499                 };
 500
 501                 bt_host_wake_l: bt-host-wake-l {
 502                         rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
 503                 };
 504
 505                 bt_wake_l: bt-wake-l {
 506                         rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 507                 };
 508         };
 509
 510         leds {
 511                 work_led_enable_h: work-led-enable-h {
 512                         rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
 513                 };
 514
 515                 diy_led_enable_h: diy-led-enable-h {
 516                         rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 517                 };
 518         };
 519
 520         pcie {
 521                 pcie_clkreq_h: pcie-clkreq-h {
 522                         rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
 523                 };
 524                 pcie_reset_h: pcie-reset-h {
 525                         rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
 526                 };
 527         };
 528
 529         pmic {
 530                 pmic_int_l: pmic-int-l {
 531                         rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
 532                 };
 533         };
 534
 535         sdio-pwrseq {
 536                 wifi_enable_h: wifi-enable-h {
 537                         rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
 538                 };
 539         };
 540 };
 541
 542 &pmu_io_domains {
 543         pmuio1-supply = <&vcc3v3_pmu>;
 544         pmuio2-supply = <&vcc3v3_pmu>;
 545         vccio1-supply = <&vcc_3v3>;
 546         vccio2-supply = <&vcc_1v8>;
 547         vccio3-supply = <&vccio_sd>;
 548         vccio4-supply = <&vcc_1v8>;
 549         vccio5-supply = <&vcc_3v3>;
 550         vccio6-supply = <&vcc_3v3>;
 551         vccio7-supply = <&vcc_3v3>;
 552         status = "okay";
 553 };
 554
 555 /*
 556  * saradc is exposed on CM1 / Module1A
 557  * pin 94 - saradc_vin3
 558  * pin 96 - saradc_vin2
 559  */
 560 &saradc {
 561         vref-supply = <&vcca_1v8>;
 562         status = "disabled";
 563 };
 564
 565 &sdhci {
 566         bus-width = <8>;
 567         mmc-hs200-1_8v;
 568         non-removable;
 569         vmmc-supply = <&vcc_3v3>;
 570         vqmmc-supply = <&vcc_1v8>;
 571         status = "okay";
 572 };
 573
 574 &sdmmc0 {
 575         broken-cd;
 576         bus-width = <4>;
 577         cap-sd-highspeed;
 578         disable-wp;
 579         pinctrl-names = "default";
 580         pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
 581         vqmmc-supply = <&vccio_sd>;
 582         status = "disabled";
 583 };
 584
 585 &sdmmc1 {
 586         bus-width = <4>;
 587         cap-sd-highspeed;
 588         cap-sdio-irq;
 589         keep-power-in-suspend;
 590         mmc-pwrseq = <&sdio_pwrseq>;
 591         non-removable;
 592         pinctrl-names = "default";
 593         pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
 594         sd-uhs-sdr50;
 595         vmmc-supply = <&vcc3v3_sys>;
 596         vqmmc-supply = <&vcc_1v8>;
 597         status = "okay";
 598 };
 599
 600 /*
 601  * spi3 is exposed on CM1 / Module1A
 602  * pin 37 - spi3_cs1_m0
 603  * pin 38 - spi3_clk_m0
 604  * pin 39 - spi3_cs0_m0
 605  * pin 40 - spi3_miso_m0, shared with i2s1_8ch
 606  * pin 44 - spi3_mosi_m0
 607  */
 608 &spi3 {
 609         status = "disabled";
 610 };
 611
 612 &tsadc {
 613         status = "okay";
 614 };
 615
 616 &uart1 {
 617         pinctrl-names = "default";
 618         pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
 619         uart-has-rtscts;
 620         status = "okay";
 621
 622         bluetooth {
 623                 compatible = "brcm,bcm43438-bt";
 624                 clocks = <&rk809 1>;
 625                 clock-names = "lpo";
 626                 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
 627                 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
 628                 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
 629                 pinctrl-names = "default";
 630                 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
 631                 vbat-supply = <&vcc3v3_sys>;
 632                 vddio-supply = <&vcca1v8_pmu>;
 633         };
 634 };
 635
 636 /*
 637  * uart2 is exposed on CM1 / Module1A
 638  * pin 51 - uart2_rx_m0
 639  * pin 55 - uart2_tx_m0
 640  */
 641 &uart2 {
 642         status = "disabled";
 643 };
 644
 645 /*
 646  * uart7 is exposed on CM1 / Module1A
 647  * pin 46 - uart7_tx_m2
 648  * pin 47 - uart7_rx_m2
 649  */
 650 &uart7 {
 651         pinctrl-names = "default";
 652         pinctrl-0 = <&uart7m2_xfer>;
 653         status = "disabled";
 654 };
 655
 656 /* dwc3_otg is the only usb port available */
 657 &usb2phy0 {
 658         status = "disabled";
 659 };
 660
 661 &usb2phy0_otg {
 662         status = "disabled";
 663 };
 664
 665 &usb_host0_xhci {
 666         status = "disabled";
 667 };
 668
 669 &vop {
 670         assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
 671         assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
 672         status = "okay";
 673 };
 674
 675 &vop_mmu {
 676         status = "okay";
 677 };
 678
 679 &vp0 {
 680         vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
 681                 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
 682                 remote-endpoint = <&hdmi_in_vp0>;
 683         };
 684 };