1 From: Tejun Heo <tj@kernel.org>
2 Subject: pata_hpt366: reimplement mode programming
5 Reimplement mode programming logic of pata_hpt366 such that it's
6 identical to that of IDE hpt366 driver. The differences were...
8 * pata_hpt366 used 0xCFFF8FFFF to mask pio modes and 0x3FFFFFFF dma
9 modes. IDE hpt366 uses 0xC1F8FFFF for PIO, 0x303800FF for MWDMA and
12 * pata_hpt366 doesn't set 0x08000000 for PIO unless it's already set
13 and always turns it on for MWDMA/UDMA. IDE hpt366 doesn't bother
14 with the bit. It always uses what was there.
16 * IDE hpt366 always clears 0xC0000000. pata_hpt366 doesn't.
18 Signed-off-by: Tejun Heo <tj@kernel.org>
19 Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
20 Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
21 Signed-off-by: Tejun Heo <teheo@suse.de>
23 Unified pio/dma paths as per Sergei's suggestion.
25 drivers/ata/pata_hpt366.c | 109 ++++++++++++++++++----------------------------
26 1 file changed, 44 insertions(+), 65 deletions(-)
28 Index: linux-2.6.27/drivers/ata/pata_hpt366.c
29 ===================================================================
30 --- linux-2.6.27.orig/drivers/ata/pata_hpt366.c
31 +++ linux-2.6.27/drivers/ata/pata_hpt366.c
33 #define DRV_VERSION "0.6.2"
41 @@ -189,28 +189,6 @@ static unsigned long hpt366_filter(struc
42 return ata_bmdma_mode_filter(adev, mask);
46 - * hpt36x_find_mode - reset the hpt36x bus
48 - * @speed: transfer mode
50 - * Return the 32bit register programming information for this channel
51 - * that matches the speed provided.
54 -static u32 hpt36x_find_mode(struct ata_port *ap, int speed)
56 - struct hpt_clock *clocks = ap->host->private_data;
58 - while(clocks->xfer_speed) {
59 - if (clocks->xfer_speed == speed)
60 - return clocks->timing;
64 - return 0xffffffffU; /* silence compiler warning */
67 static int hpt36x_cable_detect(struct ata_port *ap)
69 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
70 @@ -226,25 +204,16 @@ static int hpt36x_cable_detect(struct at
71 return ATA_CBL_PATA80;
75 - * hpt366_set_piomode - PIO setup
76 - * @ap: ATA interface
77 - * @adev: device on the interface
79 - * Perform PIO mode setup.
82 -static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
83 +static void hpt366_set_mode(struct ata_port *ap, struct ata_device *adev,
86 + struct hpt_clock *clocks = ap->host->private_data;
87 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
91 + u32 addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
92 + u32 addr2 = 0x51 + 4 * ap->port_no;
96 - addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
97 - addr2 = 0x51 + 4 * ap->port_no;
99 /* Fast interrupt prediction disable, hold off interrupt disable */
100 pci_read_config_byte(pdev, addr2, &fast);
102 @@ -252,12 +221,43 @@ static void hpt366_set_piomode(struct at
103 pci_write_config_byte(pdev, addr2, fast);
106 + /* determine timing mask and find matching clock entry */
107 + if (mode < XFER_MW_DMA_0)
109 + else if (mode < XFER_UDMA_0)
114 + while (clocks->xfer_mode) {
115 + if (clocks->xfer_mode == mode)
119 + if (!clocks->xfer_mode)
123 + * Combine new mode bits with old config bits and disable
124 + * on-chip PIO FIFO/buffer (and PIO MST mode as well) to avoid
125 + * problems handling I/O errors later.
127 pci_read_config_dword(pdev, addr1, ®);
128 - mode = hpt36x_find_mode(ap, adev->pio_mode);
129 - mode &= ~0x8000000; /* No FIFO in PIO */
130 - mode &= ~0x30070000; /* Leave config bits alone */
131 - reg &= 0x30070000; /* Strip timing bits */
132 - pci_write_config_dword(pdev, addr1, reg | mode);
133 + reg = ((reg & ~mask) | (clocks->timing & mask)) & ~0xc0000000;
134 + pci_write_config_dword(pdev, addr1, reg);
138 + * hpt366_set_piomode - PIO setup
139 + * @ap: ATA interface
140 + * @adev: device on the interface
142 + * Perform PIO mode setup.
145 +static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
147 + hpt366_set_mode(ap, adev, adev->pio_mode);
151 @@ -271,28 +271,7 @@ static void hpt366_set_piomode(struct at
153 static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev)
155 - struct pci_dev *pdev = to_pci_dev(ap->host->dev);
161 - addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
162 - addr2 = 0x51 + 4 * ap->port_no;
164 - /* Fast interrupt prediction disable, hold off interrupt disable */
165 - pci_read_config_byte(pdev, addr2, &fast);
168 - pci_write_config_byte(pdev, addr2, fast);
171 - pci_read_config_dword(pdev, addr1, ®);
172 - mode = hpt36x_find_mode(ap, adev->dma_mode);
173 - mode |= 0x8000000; /* FIFO in MWDMA or UDMA */
174 - mode &= ~0xC0000000; /* Leave config bits alone */
175 - reg &= 0xC0000000; /* Strip timing bits */
176 - pci_write_config_dword(pdev, addr1, reg | mode);
177 + hpt366_set_mode(ap, adev, adev->dma_mode);
180 static struct scsi_host_template hpt36x_sht = {