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1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7 /dts-v1/;
8 #include "jh7110.dtsi"
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
11
12 / {
13 aliases {
14 ethernet0 = &gmac0;
15 ethernet1 = &gmac1;
16 i2c0 = &i2c0;
17 i2c2 = &i2c2;
18 i2c5 = &i2c5;
19 i2c6 = &i2c6;
20 mmc0 = &mmc0;
21 mmc1 = &mmc1;
22 serial0 = &uart0;
23 };
24
25 chosen {
26 stdout-path = "serial0:115200n8";
27 };
28
29 cpus {
30 timebase-frequency = <4000000>;
31 };
32
33 memory@40000000 {
34 device_type = "memory";
35 reg = <0x0 0x40000000 0x1 0x0>;
36 };
37
38 gpio-restart {
39 compatible = "gpio-restart";
40 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
41 priority = <224>;
42 };
43
44 pwmdac_codec: pwmdac-codec {
45 compatible = "linux,spdif-dit";
46 #sound-dai-cells = <0>;
47 };
48
49 sound-pwmdac {
50 compatible = "simple-audio-card";
51 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
52 #address-cells = <1>;
53 #size-cells = <0>;
54
55 simple-audio-card,dai-link@0 {
56 reg = <0>;
57 format = "left_j";
58 bitclock-master = <&sndcpu0>;
59 frame-master = <&sndcpu0>;
60
61 sndcpu0: cpu {
62 sound-dai = <&pwmdac>;
63 };
64
65 codec {
66 sound-dai = <&pwmdac_codec>;
67 };
68 };
69 };
70 };
71
72 &dvp_clk {
73 clock-frequency = <74250000>;
74 };
75
76 &gmac0_rgmii_rxin {
77 clock-frequency = <125000000>;
78 };
79
80 &gmac0_rmii_refin {
81 clock-frequency = <50000000>;
82 };
83
84 &gmac1_rgmii_rxin {
85 clock-frequency = <125000000>;
86 };
87
88 &gmac1_rmii_refin {
89 clock-frequency = <50000000>;
90 };
91
92 &hdmitx0_pixelclk {
93 clock-frequency = <297000000>;
94 };
95
96 &i2srx_bclk_ext {
97 clock-frequency = <12288000>;
98 };
99
100 &i2srx_lrck_ext {
101 clock-frequency = <192000>;
102 };
103
104 &i2stx_bclk_ext {
105 clock-frequency = <12288000>;
106 };
107
108 &i2stx_lrck_ext {
109 clock-frequency = <192000>;
110 };
111
112 &mclk_ext {
113 clock-frequency = <12288000>;
114 };
115
116 &osc {
117 clock-frequency = <24000000>;
118 };
119
120 &rtc_osc {
121 clock-frequency = <32768>;
122 };
123
124 &tdm_ext {
125 clock-frequency = <49152000>;
126 };
127
128 &gmac0 {
129 phy-handle = <&phy0>;
130 phy-mode = "rgmii-id";
131 status = "okay";
132
133 mdio {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 compatible = "snps,dwmac-mdio";
137
138 phy0: ethernet-phy@0 {
139 reg = <0>;
140 };
141 };
142 };
143
144 &gmac1 {
145 phy-handle = <&phy1>;
146 phy-mode = "rgmii-id";
147 status = "okay";
148
149 mdio {
150 #address-cells = <1>;
151 #size-cells = <0>;
152 compatible = "snps,dwmac-mdio";
153
154 phy1: ethernet-phy@1 {
155 reg = <0>;
156 };
157 };
158 };
159
160 &i2c0 {
161 clock-frequency = <100000>;
162 i2c-sda-hold-time-ns = <300>;
163 i2c-sda-falling-time-ns = <510>;
164 i2c-scl-falling-time-ns = <510>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&i2c0_pins>;
167 status = "okay";
168 };
169
170 &i2c2 {
171 clock-frequency = <100000>;
172 i2c-sda-hold-time-ns = <300>;
173 i2c-sda-falling-time-ns = <510>;
174 i2c-scl-falling-time-ns = <510>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&i2c2_pins>;
177 status = "okay";
178 };
179
180 &i2c5 {
181 clock-frequency = <100000>;
182 i2c-sda-hold-time-ns = <300>;
183 i2c-sda-falling-time-ns = <510>;
184 i2c-scl-falling-time-ns = <510>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&i2c5_pins>;
187 status = "okay";
188
189 axp15060: pmic@36 {
190 compatible = "x-powers,axp15060";
191 reg = <0x36>;
192 interrupts = <0>;
193 interrupt-controller;
194 #interrupt-cells = <1>;
195
196 regulators {
197 vcc_3v3: dcdc1 {
198 regulator-boot-on;
199 regulator-always-on;
200 regulator-min-microvolt = <3300000>;
201 regulator-max-microvolt = <3300000>;
202 regulator-name = "vcc_3v3";
203 };
204
205 vdd_cpu: dcdc2 {
206 regulator-always-on;
207 regulator-min-microvolt = <500000>;
208 regulator-max-microvolt = <1540000>;
209 regulator-name = "vdd-cpu";
210 };
211
212 emmc_vdd: aldo4 {
213 regulator-boot-on;
214 regulator-always-on;
215 regulator-min-microvolt = <1800000>;
216 regulator-max-microvolt = <1800000>;
217 regulator-name = "emmc_vdd";
218 };
219 };
220 };
221 };
222
223 &i2c6 {
224 clock-frequency = <100000>;
225 i2c-sda-hold-time-ns = <300>;
226 i2c-sda-falling-time-ns = <510>;
227 i2c-scl-falling-time-ns = <510>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&i2c6_pins>;
230 status = "okay";
231 };
232
233 &i2srx {
234 pinctrl-names = "default";
235 pinctrl-0 = <&i2srx_pins>;
236 status = "okay";
237 };
238
239 &i2stx0 {
240 pinctrl-names = "default";
241 pinctrl-0 = <&mclk_ext_pins>;
242 status = "okay";
243 };
244
245 &i2stx1 {
246 pinctrl-names = "default";
247 pinctrl-0 = <&i2stx1_pins>;
248 status = "okay";
249 };
250
251 &mmc0 {
252 max-frequency = <100000000>;
253 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
254 assigned-clock-rates = <50000000>;
255 bus-width = <8>;
256 cap-mmc-highspeed;
257 mmc-ddr-1_8v;
258 mmc-hs200-1_8v;
259 non-removable;
260 cap-mmc-hw-reset;
261 post-power-on-delay-ms = <200>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&mmc0_pins>;
264 vmmc-supply = <&vcc_3v3>;
265 vqmmc-supply = <&emmc_vdd>;
266 status = "okay";
267 };
268
269 &mmc1 {
270 max-frequency = <100000000>;
271 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
272 assigned-clock-rates = <50000000>;
273 bus-width = <4>;
274 no-sdio;
275 no-mmc;
276 broken-cd;
277 cap-sd-highspeed;
278 post-power-on-delay-ms = <200>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&mmc1_pins>;
281 status = "okay";
282 };
283
284 &pwmdac {
285 pinctrl-names = "default";
286 pinctrl-0 = <&pwmdac_pins>;
287 status = "okay";
288 };
289
290 &qspi {
291 #address-cells = <1>;
292 #size-cells = <0>;
293 status = "okay";
294
295 nor_flash: flash@0 {
296 compatible = "jedec,spi-nor";
297 reg = <0>;
298 cdns,read-delay = <5>;
299 spi-max-frequency = <12000000>;
300 cdns,tshsl-ns = <1>;
301 cdns,tsd2d-ns = <1>;
302 cdns,tchsh-ns = <1>;
303 cdns,tslch-ns = <1>;
304
305 partitions {
306 compatible = "fixed-partitions";
307 #address-cells = <1>;
308 #size-cells = <1>;
309
310 spl@0 {
311 reg = <0x0 0x80000>;
312 };
313 uboot-env@f0000 {
314 reg = <0xf0000 0x10000>;
315 };
316 uboot@100000 {
317 reg = <0x100000 0x400000>;
318 };
319 reserved-data@600000 {
320 reg = <0x600000 0xa00000>;
321 };
322 };
323 };
324 };
325
326 &spi0 {
327 pinctrl-names = "default";
328 pinctrl-0 = <&spi0_pins>;
329 status = "okay";
330
331 spi_dev0: spi@0 {
332 compatible = "rohm,dh2228fv";
333 reg = <0>;
334 spi-max-frequency = <10000000>;
335 };
336 };
337
338 &sysgpio {
339 i2c0_pins: i2c0-0 {
340 i2c-pins {
341 pinmux = <GPIOMUX(57, GPOUT_LOW,
342 GPOEN_SYS_I2C0_CLK,
343 GPI_SYS_I2C0_CLK)>,
344 <GPIOMUX(58, GPOUT_LOW,
345 GPOEN_SYS_I2C0_DATA,
346 GPI_SYS_I2C0_DATA)>;
347 bias-disable; /* external pull-up */
348 input-enable;
349 input-schmitt-enable;
350 };
351 };
352
353 i2c2_pins: i2c2-0 {
354 i2c-pins {
355 pinmux = <GPIOMUX(3, GPOUT_LOW,
356 GPOEN_SYS_I2C2_CLK,
357 GPI_SYS_I2C2_CLK)>,
358 <GPIOMUX(2, GPOUT_LOW,
359 GPOEN_SYS_I2C2_DATA,
360 GPI_SYS_I2C2_DATA)>;
361 bias-disable; /* external pull-up */
362 input-enable;
363 input-schmitt-enable;
364 };
365 };
366
367 i2c5_pins: i2c5-0 {
368 i2c-pins {
369 pinmux = <GPIOMUX(19, GPOUT_LOW,
370 GPOEN_SYS_I2C5_CLK,
371 GPI_SYS_I2C5_CLK)>,
372 <GPIOMUX(20, GPOUT_LOW,
373 GPOEN_SYS_I2C5_DATA,
374 GPI_SYS_I2C5_DATA)>;
375 bias-disable; /* external pull-up */
376 input-enable;
377 input-schmitt-enable;
378 };
379 };
380
381 i2c6_pins: i2c6-0 {
382 i2c-pins {
383 pinmux = <GPIOMUX(16, GPOUT_LOW,
384 GPOEN_SYS_I2C6_CLK,
385 GPI_SYS_I2C6_CLK)>,
386 <GPIOMUX(17, GPOUT_LOW,
387 GPOEN_SYS_I2C6_DATA,
388 GPI_SYS_I2C6_DATA)>;
389 bias-disable; /* external pull-up */
390 input-enable;
391 input-schmitt-enable;
392 };
393 };
394
395 i2srx_pins: i2srx-0 {
396 clk-sd-pins {
397 pinmux = <GPIOMUX(38, GPOUT_LOW,
398 GPOEN_DISABLE,
399 GPI_SYS_I2SRX_BCLK)>,
400 <GPIOMUX(63, GPOUT_LOW,
401 GPOEN_DISABLE,
402 GPI_SYS_I2SRX_LRCK)>,
403 <GPIOMUX(38, GPOUT_LOW,
404 GPOEN_DISABLE,
405 GPI_SYS_I2STX1_BCLK)>,
406 <GPIOMUX(63, GPOUT_LOW,
407 GPOEN_DISABLE,
408 GPI_SYS_I2STX1_LRCK)>,
409 <GPIOMUX(61, GPOUT_LOW,
410 GPOEN_DISABLE,
411 GPI_SYS_I2SRX_SDIN0)>;
412 input-enable;
413 };
414 };
415
416 i2stx1_pins: i2stx1-0 {
417 sd-pins {
418 pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0,
419 GPOEN_ENABLE,
420 GPI_NONE)>;
421 bias-disable;
422 input-disable;
423 };
424 };
425
426 mclk_ext_pins: mclk-ext-0 {
427 mclk-ext-pins {
428 pinmux = <GPIOMUX(4, GPOUT_LOW,
429 GPOEN_DISABLE,
430 GPI_SYS_MCLK_EXT)>;
431 input-enable;
432 };
433 };
434
435 mmc0_pins: mmc0-0 {
436 rst-pins {
437 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
438 GPOEN_ENABLE,
439 GPI_NONE)>;
440 bias-pull-up;
441 drive-strength = <12>;
442 input-disable;
443 input-schmitt-disable;
444 slew-rate = <0>;
445 };
446
447 mmc-pins {
448 pinmux = <PINMUX(64, 0)>,
449 <PINMUX(65, 0)>,
450 <PINMUX(66, 0)>,
451 <PINMUX(67, 0)>,
452 <PINMUX(68, 0)>,
453 <PINMUX(69, 0)>,
454 <PINMUX(70, 0)>,
455 <PINMUX(71, 0)>,
456 <PINMUX(72, 0)>,
457 <PINMUX(73, 0)>;
458 bias-pull-up;
459 drive-strength = <12>;
460 input-enable;
461 };
462 };
463
464 mmc1_pins: mmc1-0 {
465 clk-pins {
466 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
467 GPOEN_ENABLE,
468 GPI_NONE)>;
469 bias-pull-up;
470 drive-strength = <12>;
471 input-disable;
472 input-schmitt-disable;
473 slew-rate = <0>;
474 };
475
476 mmc-pins {
477 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
478 GPOEN_SYS_SDIO1_CMD,
479 GPI_SYS_SDIO1_CMD)>,
480 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
481 GPOEN_SYS_SDIO1_DATA0,
482 GPI_SYS_SDIO1_DATA0)>,
483 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
484 GPOEN_SYS_SDIO1_DATA1,
485 GPI_SYS_SDIO1_DATA1)>,
486 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
487 GPOEN_SYS_SDIO1_DATA2,
488 GPI_SYS_SDIO1_DATA2)>,
489 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
490 GPOEN_SYS_SDIO1_DATA3,
491 GPI_SYS_SDIO1_DATA3)>;
492 bias-pull-up;
493 drive-strength = <12>;
494 input-enable;
495 input-schmitt-enable;
496 slew-rate = <0>;
497 };
498 };
499
500 pwmdac_pins: pwmdac-0 {
501 pwmdac-pins {
502 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
503 GPOEN_ENABLE,
504 GPI_NONE)>,
505 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
506 GPOEN_ENABLE,
507 GPI_NONE)>;
508 bias-disable;
509 drive-strength = <2>;
510 input-disable;
511 input-schmitt-disable;
512 slew-rate = <0>;
513 };
514 };
515
516 spi0_pins: spi0-0 {
517 mosi-pins {
518 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
519 GPOEN_ENABLE,
520 GPI_NONE)>;
521 bias-disable;
522 input-disable;
523 input-schmitt-disable;
524 };
525
526 miso-pins {
527 pinmux = <GPIOMUX(53, GPOUT_LOW,
528 GPOEN_DISABLE,
529 GPI_SYS_SPI0_RXD)>;
530 bias-pull-up;
531 input-enable;
532 input-schmitt-enable;
533 };
534
535 sck-pins {
536 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
537 GPOEN_ENABLE,
538 GPI_SYS_SPI0_CLK)>;
539 bias-disable;
540 input-disable;
541 input-schmitt-disable;
542 };
543
544 ss-pins {
545 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
546 GPOEN_ENABLE,
547 GPI_SYS_SPI0_FSS)>;
548 bias-disable;
549 input-disable;
550 input-schmitt-disable;
551 };
552 };
553
554 tdm_pins: tdm-0 {
555 tx-pins {
556 pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
557 GPOEN_ENABLE,
558 GPI_NONE)>;
559 bias-pull-up;
560 drive-strength = <2>;
561 input-disable;
562 input-schmitt-disable;
563 slew-rate = <0>;
564 };
565
566 rx-pins {
567 pinmux = <GPIOMUX(61, GPOUT_HIGH,
568 GPOEN_DISABLE,
569 GPI_SYS_TDM_RXD)>;
570 input-enable;
571 };
572
573 sync-pins {
574 pinmux = <GPIOMUX(63, GPOUT_HIGH,
575 GPOEN_DISABLE,
576 GPI_SYS_TDM_SYNC)>;
577 input-enable;
578 };
579
580 pcmclk-pins {
581 pinmux = <GPIOMUX(38, GPOUT_HIGH,
582 GPOEN_DISABLE,
583 GPI_SYS_TDM_CLK)>;
584 input-enable;
585 };
586 };
587
588 uart0_pins: uart0-0 {
589 tx-pins {
590 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
591 GPOEN_ENABLE,
592 GPI_NONE)>;
593 bias-disable;
594 drive-strength = <12>;
595 input-disable;
596 input-schmitt-disable;
597 slew-rate = <0>;
598 };
599
600 rx-pins {
601 pinmux = <GPIOMUX(6, GPOUT_LOW,
602 GPOEN_DISABLE,
603 GPI_SYS_UART0_RX)>;
604 bias-disable; /* external pull-up */
605 drive-strength = <2>;
606 input-enable;
607 input-schmitt-enable;
608 slew-rate = <0>;
609 };
610 };
611 };
612
613 &tdm {
614 pinctrl-names = "default";
615 pinctrl-0 = <&tdm_pins>;
616 status = "okay";
617 };
618
619 &uart0 {
620 pinctrl-names = "default";
621 pinctrl-0 = <&uart0_pins>;
622 status = "okay";
623 };
624
625 &usb0 {
626 dr_mode = "peripheral";
627 status = "okay";
628 };
629
630 &U74_1 {
631 cpu-supply = <&vdd_cpu>;
632 };
633
634 &U74_2 {
635 cpu-supply = <&vdd_cpu>;
636 };
637
638 &U74_3 {
639 cpu-supply = <&vdd_cpu>;
640 };
641
642 &U74_4 {
643 cpu-supply = <&vdd_cpu>;
644 };