]>
git.ipfire.org Git - thirdparty/glibc.git/blob - sysdeps/unix/sysv/linux/aarch64/cpu-features.c
203f839408b134af8b556e30b2098baee43ebce6
1 /* Initialize CPU feature data. AArch64 version.
2 This file is part of the GNU C Library.
3 Copyright (C) 2017-2018 Free Software Foundation, Inc.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <http://www.gnu.org/licenses/>. */
19 #include <cpu-features.h>
21 #include <elf/dl-hwcaps.h>
23 #define DCZID_DZP_MASK (1 << 4)
24 #define DCZID_BS_MASK (0xf)
33 static struct cpu_list cpu_list
[] = {
34 {"falkor", 0x510FC000},
35 {"thunderxt88", 0x430F0A10},
36 {"thunderx2t99", 0x431F0AF0},
37 {"thunderx2t99p1", 0x420F5160},
38 {"phecda", 0x680F0000},
43 get_midr_from_mcpu (const char *mcpu
)
45 for (int i
= 0; i
< sizeof (cpu_list
) / sizeof (struct cpu_list
); i
++)
46 if (strcmp (mcpu
, cpu_list
[i
].name
) == 0)
47 return cpu_list
[i
].midr
;
54 init_cpu_features (struct cpu_features
*cpu_features
)
56 uint64_t hwcap_mask
= GET_HWCAP_MASK();
57 uint64_t hwcap
= GLRO (dl_hwcap
) & hwcap_mask
;
59 register uint64_t midr
= UINT64_MAX
;
62 /* Get the tunable override. */
63 const char *mcpu
= TUNABLE_GET (glibc
, tune
, cpu
, const char *, NULL
);
65 midr
= get_midr_from_mcpu (mcpu
);
68 /* If there was no useful tunable override, query the MIDR if the kernel
70 if (midr
== UINT64_MAX
)
72 if (hwcap
& HWCAP_CPUID
)
73 asm volatile ("mrs %0, midr_el1" : "=r"(midr
));
78 cpu_features
->midr_el1
= midr
;
80 /* Check if ZVA is enabled. */
82 asm volatile ("mrs %0, dczid_el0" : "=r"(dczid
));
84 if ((dczid
& DCZID_DZP_MASK
) == 0)
85 cpu_features
->zva_size
= 4 << (dczid
& DCZID_BS_MASK
);