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1 /*
2 * x86 CPU test
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #define _GNU_SOURCE
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
25 #include <math.h>
26 #include <signal.h>
27 #include <setjmp.h>
28 #include <errno.h>
29 #include <sys/ucontext.h>
30 #include <sys/mman.h>
31 #include <asm/vm86.h>
32
33 #define TEST_CMOV 0
34 #define TEST_FCOMI 0
35 #define TEST_VM86
36 //#define LINUX_VM86_IOPL_FIX
37 //#define TEST_P4_FLAGS
38 //#define TEST_SSE
39
40 #define xglue(x, y) x ## y
41 #define glue(x, y) xglue(x, y)
42 #define stringify(s) tostring(s)
43 #define tostring(s) #s
44
45 #define CC_C 0x0001
46 #define CC_P 0x0004
47 #define CC_A 0x0010
48 #define CC_Z 0x0040
49 #define CC_S 0x0080
50 #define CC_O 0x0800
51
52 #define __init_call __attribute__ ((unused,__section__ (".initcall.init")))
53
54 static void *call_start __init_call = NULL;
55
56 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
57
58 #define OP add
59 #include "test-i386.h"
60
61 #define OP sub
62 #include "test-i386.h"
63
64 #define OP xor
65 #include "test-i386.h"
66
67 #define OP and
68 #include "test-i386.h"
69
70 #define OP or
71 #include "test-i386.h"
72
73 #define OP cmp
74 #include "test-i386.h"
75
76 #define OP adc
77 #define OP_CC
78 #include "test-i386.h"
79
80 #define OP sbb
81 #define OP_CC
82 #include "test-i386.h"
83
84 #define OP inc
85 #define OP_CC
86 #define OP1
87 #include "test-i386.h"
88
89 #define OP dec
90 #define OP_CC
91 #define OP1
92 #include "test-i386.h"
93
94 #define OP neg
95 #define OP_CC
96 #define OP1
97 #include "test-i386.h"
98
99 #define OP not
100 #define OP_CC
101 #define OP1
102 #include "test-i386.h"
103
104 #undef CC_MASK
105 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
106
107 #define OP shl
108 #include "test-i386-shift.h"
109
110 #define OP shr
111 #include "test-i386-shift.h"
112
113 #define OP sar
114 #include "test-i386-shift.h"
115
116 #define OP rol
117 #include "test-i386-shift.h"
118
119 #define OP ror
120 #include "test-i386-shift.h"
121
122 #define OP rcr
123 #define OP_CC
124 #include "test-i386-shift.h"
125
126 #define OP rcl
127 #define OP_CC
128 #include "test-i386-shift.h"
129
130 #define OP shld
131 #define OP_SHIFTD
132 #define OP_NOBYTE
133 #include "test-i386-shift.h"
134
135 #define OP shrd
136 #define OP_SHIFTD
137 #define OP_NOBYTE
138 #include "test-i386-shift.h"
139
140 /* XXX: should be more precise ? */
141 #undef CC_MASK
142 #define CC_MASK (CC_C)
143
144 #define OP bt
145 #define OP_NOBYTE
146 #include "test-i386-shift.h"
147
148 #define OP bts
149 #define OP_NOBYTE
150 #include "test-i386-shift.h"
151
152 #define OP btr
153 #define OP_NOBYTE
154 #include "test-i386-shift.h"
155
156 #define OP btc
157 #define OP_NOBYTE
158 #include "test-i386-shift.h"
159
160 /* lea test (modrm support) */
161 #define TEST_LEA(STR)\
162 {\
163 asm("leal " STR ", %0"\
164 : "=r" (res)\
165 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
166 printf("lea %s = %08x\n", STR, res);\
167 }
168
169 #define TEST_LEA16(STR)\
170 {\
171 asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
172 : "=wq" (res)\
173 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
174 printf("lea %s = %08x\n", STR, res);\
175 }
176
177
178 void test_lea(void)
179 {
180 int eax, ebx, ecx, edx, esi, edi, res;
181 eax = 0x0001;
182 ebx = 0x0002;
183 ecx = 0x0004;
184 edx = 0x0008;
185 esi = 0x0010;
186 edi = 0x0020;
187
188 TEST_LEA("0x4000");
189
190 TEST_LEA("(%%eax)");
191 TEST_LEA("(%%ebx)");
192 TEST_LEA("(%%ecx)");
193 TEST_LEA("(%%edx)");
194 TEST_LEA("(%%esi)");
195 TEST_LEA("(%%edi)");
196
197 TEST_LEA("0x40(%%eax)");
198 TEST_LEA("0x40(%%ebx)");
199 TEST_LEA("0x40(%%ecx)");
200 TEST_LEA("0x40(%%edx)");
201 TEST_LEA("0x40(%%esi)");
202 TEST_LEA("0x40(%%edi)");
203
204 TEST_LEA("0x4000(%%eax)");
205 TEST_LEA("0x4000(%%ebx)");
206 TEST_LEA("0x4000(%%ecx)");
207 TEST_LEA("0x4000(%%edx)");
208 TEST_LEA("0x4000(%%esi)");
209 TEST_LEA("0x4000(%%edi)");
210
211 TEST_LEA("(%%eax, %%ecx)");
212 TEST_LEA("(%%ebx, %%edx)");
213 TEST_LEA("(%%ecx, %%ecx)");
214 TEST_LEA("(%%edx, %%ecx)");
215 TEST_LEA("(%%esi, %%ecx)");
216 TEST_LEA("(%%edi, %%ecx)");
217
218 TEST_LEA("0x40(%%eax, %%ecx)");
219 TEST_LEA("0x4000(%%ebx, %%edx)");
220
221 TEST_LEA("(%%ecx, %%ecx, 2)");
222 TEST_LEA("(%%edx, %%ecx, 4)");
223 TEST_LEA("(%%esi, %%ecx, 8)");
224
225 TEST_LEA("(,%%eax, 2)");
226 TEST_LEA("(,%%ebx, 4)");
227 TEST_LEA("(,%%ecx, 8)");
228
229 TEST_LEA("0x40(,%%eax, 2)");
230 TEST_LEA("0x40(,%%ebx, 4)");
231 TEST_LEA("0x40(,%%ecx, 8)");
232
233
234 TEST_LEA("-10(%%ecx, %%ecx, 2)");
235 TEST_LEA("-10(%%edx, %%ecx, 4)");
236 TEST_LEA("-10(%%esi, %%ecx, 8)");
237
238 TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
239 TEST_LEA("0x4000(%%edx, %%ecx, 4)");
240 TEST_LEA("0x4000(%%esi, %%ecx, 8)");
241
242 /* limited 16 bit addressing test */
243 TEST_LEA16("0x4000");
244 TEST_LEA16("(%%bx)");
245 TEST_LEA16("(%%si)");
246 TEST_LEA16("(%%di)");
247 TEST_LEA16("0x40(%%bx)");
248 TEST_LEA16("0x40(%%si)");
249 TEST_LEA16("0x40(%%di)");
250 TEST_LEA16("0x4000(%%bx)");
251 TEST_LEA16("0x4000(%%si)");
252 TEST_LEA16("(%%bx,%%si)");
253 TEST_LEA16("(%%bx,%%di)");
254 TEST_LEA16("0x40(%%bx,%%si)");
255 TEST_LEA16("0x40(%%bx,%%di)");
256 TEST_LEA16("0x4000(%%bx,%%si)");
257 TEST_LEA16("0x4000(%%bx,%%di)");
258 }
259
260 #define TEST_JCC(JCC, v1, v2)\
261 {\
262 int res;\
263 asm("movl $1, %0\n\t"\
264 "cmpl %2, %1\n\t"\
265 "j" JCC " 1f\n\t"\
266 "movl $0, %0\n\t"\
267 "1:\n\t"\
268 : "=r" (res)\
269 : "r" (v1), "r" (v2));\
270 printf("%-10s %d\n", "j" JCC, res);\
271 \
272 asm("movl $0, %0\n\t"\
273 "cmpl %2, %1\n\t"\
274 "set" JCC " %b0\n\t"\
275 : "=r" (res)\
276 : "r" (v1), "r" (v2));\
277 printf("%-10s %d\n", "set" JCC, res);\
278 if (TEST_CMOV) {\
279 asm("movl $0x12345678, %0\n\t"\
280 "cmpl %2, %1\n\t"\
281 "cmov" JCC "l %3, %0\n\t"\
282 : "=r" (res)\
283 : "r" (v1), "r" (v2), "m" (1));\
284 printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
285 asm("movl $0x12345678, %0\n\t"\
286 "cmpl %2, %1\n\t"\
287 "cmov" JCC "w %w3, %w0\n\t"\
288 : "=r" (res)\
289 : "r" (v1), "r" (v2), "r" (1));\
290 printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
291 } \
292 }
293
294 /* various jump tests */
295 void test_jcc(void)
296 {
297 TEST_JCC("ne", 1, 1);
298 TEST_JCC("ne", 1, 0);
299
300 TEST_JCC("e", 1, 1);
301 TEST_JCC("e", 1, 0);
302
303 TEST_JCC("l", 1, 1);
304 TEST_JCC("l", 1, 0);
305 TEST_JCC("l", 1, -1);
306
307 TEST_JCC("le", 1, 1);
308 TEST_JCC("le", 1, 0);
309 TEST_JCC("le", 1, -1);
310
311 TEST_JCC("ge", 1, 1);
312 TEST_JCC("ge", 1, 0);
313 TEST_JCC("ge", -1, 1);
314
315 TEST_JCC("g", 1, 1);
316 TEST_JCC("g", 1, 0);
317 TEST_JCC("g", 1, -1);
318
319 TEST_JCC("b", 1, 1);
320 TEST_JCC("b", 1, 0);
321 TEST_JCC("b", 1, -1);
322
323 TEST_JCC("be", 1, 1);
324 TEST_JCC("be", 1, 0);
325 TEST_JCC("be", 1, -1);
326
327 TEST_JCC("ae", 1, 1);
328 TEST_JCC("ae", 1, 0);
329 TEST_JCC("ae", 1, -1);
330
331 TEST_JCC("a", 1, 1);
332 TEST_JCC("a", 1, 0);
333 TEST_JCC("a", 1, -1);
334
335
336 TEST_JCC("p", 1, 1);
337 TEST_JCC("p", 1, 0);
338
339 TEST_JCC("np", 1, 1);
340 TEST_JCC("np", 1, 0);
341
342 TEST_JCC("o", 0x7fffffff, 0);
343 TEST_JCC("o", 0x7fffffff, -1);
344
345 TEST_JCC("no", 0x7fffffff, 0);
346 TEST_JCC("no", 0x7fffffff, -1);
347
348 TEST_JCC("s", 0, 1);
349 TEST_JCC("s", 0, -1);
350 TEST_JCC("s", 0, 0);
351
352 TEST_JCC("ns", 0, 1);
353 TEST_JCC("ns", 0, -1);
354 TEST_JCC("ns", 0, 0);
355 }
356
357 #undef CC_MASK
358 #ifdef TEST_P4_FLAGS
359 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
360 #else
361 #define CC_MASK (CC_O | CC_C)
362 #endif
363
364 #define OP mul
365 #include "test-i386-muldiv.h"
366
367 #define OP imul
368 #include "test-i386-muldiv.h"
369
370 void test_imulw2(int op0, int op1)
371 {
372 int res, s1, s0, flags;
373 s0 = op0;
374 s1 = op1;
375 res = s0;
376 flags = 0;
377 asm volatile ("push %4\n\t"
378 "popf\n\t"
379 "imulw %w2, %w0\n\t"
380 "pushf\n\t"
381 "popl %1\n\t"
382 : "=q" (res), "=g" (flags)
383 : "q" (s1), "0" (res), "1" (flags));
384 printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
385 "imulw", s0, s1, res, flags & CC_MASK);
386 }
387
388 void test_imull2(int op0, int op1)
389 {
390 int res, s1, s0, flags;
391 s0 = op0;
392 s1 = op1;
393 res = s0;
394 flags = 0;
395 asm volatile ("push %4\n\t"
396 "popf\n\t"
397 "imull %2, %0\n\t"
398 "pushf\n\t"
399 "popl %1\n\t"
400 : "=q" (res), "=g" (flags)
401 : "q" (s1), "0" (res), "1" (flags));
402 printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
403 "imull", s0, s1, res, flags & CC_MASK);
404 }
405
406 #define TEST_IMUL_IM(size, size1, op0, op1)\
407 {\
408 int res, flags;\
409 flags = 0;\
410 res = 0;\
411 asm volatile ("push %3\n\t"\
412 "popf\n\t"\
413 "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
414 "pushf\n\t"\
415 "popl %1\n\t"\
416 : "=r" (res), "=g" (flags)\
417 : "r" (op1), "1" (flags), "0" (res));\
418 printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",\
419 "imul" size " im", op0, op1, res, flags & CC_MASK);\
420 }
421
422
423 #undef CC_MASK
424 #define CC_MASK (0)
425
426 #define OP div
427 #include "test-i386-muldiv.h"
428
429 #define OP idiv
430 #include "test-i386-muldiv.h"
431
432 void test_mul(void)
433 {
434 test_imulb(0x1234561d, 4);
435 test_imulb(3, -4);
436 test_imulb(0x80, 0x80);
437 test_imulb(0x10, 0x10);
438
439 test_imulw(0, 0x1234001d, 45);
440 test_imulw(0, 23, -45);
441 test_imulw(0, 0x8000, 0x8000);
442 test_imulw(0, 0x100, 0x100);
443
444 test_imull(0, 0x1234001d, 45);
445 test_imull(0, 23, -45);
446 test_imull(0, 0x80000000, 0x80000000);
447 test_imull(0, 0x10000, 0x10000);
448
449 test_mulb(0x1234561d, 4);
450 test_mulb(3, -4);
451 test_mulb(0x80, 0x80);
452 test_mulb(0x10, 0x10);
453
454 test_mulw(0, 0x1234001d, 45);
455 test_mulw(0, 23, -45);
456 test_mulw(0, 0x8000, 0x8000);
457 test_mulw(0, 0x100, 0x100);
458
459 test_mull(0, 0x1234001d, 45);
460 test_mull(0, 23, -45);
461 test_mull(0, 0x80000000, 0x80000000);
462 test_mull(0, 0x10000, 0x10000);
463
464 test_imulw2(0x1234001d, 45);
465 test_imulw2(23, -45);
466 test_imulw2(0x8000, 0x8000);
467 test_imulw2(0x100, 0x100);
468
469 test_imull2(0x1234001d, 45);
470 test_imull2(23, -45);
471 test_imull2(0x80000000, 0x80000000);
472 test_imull2(0x10000, 0x10000);
473
474 TEST_IMUL_IM("w", "w", 45, 0x1234);
475 TEST_IMUL_IM("w", "w", -45, 23);
476 TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
477 TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
478
479 TEST_IMUL_IM("l", "", 45, 0x1234);
480 TEST_IMUL_IM("l", "", -45, 23);
481 TEST_IMUL_IM("l", "", 0x8000, 0x80000000);
482 TEST_IMUL_IM("l", "", 0x7fff, 0x1000);
483
484 test_idivb(0x12341678, 0x127e);
485 test_idivb(0x43210123, -5);
486 test_idivb(0x12340004, -1);
487
488 test_idivw(0, 0x12345678, 12347);
489 test_idivw(0, -23223, -45);
490 test_idivw(0, 0x12348000, -1);
491 test_idivw(0x12343, 0x12345678, 0x81238567);
492
493 test_idivl(0, 0x12345678, 12347);
494 test_idivl(0, -233223, -45);
495 test_idivl(0, 0x80000000, -1);
496 test_idivl(0x12343, 0x12345678, 0x81234567);
497
498 test_divb(0x12341678, 0x127e);
499 test_divb(0x43210123, -5);
500 test_divb(0x12340004, -1);
501
502 test_divw(0, 0x12345678, 12347);
503 test_divw(0, -23223, -45);
504 test_divw(0, 0x12348000, -1);
505 test_divw(0x12343, 0x12345678, 0x81238567);
506
507 test_divl(0, 0x12345678, 12347);
508 test_divl(0, -233223, -45);
509 test_divl(0, 0x80000000, -1);
510 test_divl(0x12343, 0x12345678, 0x81234567);
511 }
512
513 #define TEST_BSX(op, size, op0)\
514 {\
515 int res, val, resz;\
516 val = op0;\
517 asm("xorl %1, %1\n"\
518 "movl $0x12345678, %0\n"\
519 #op " %" size "2, %" size "0 ; setz %b1" \
520 : "=r" (res), "=q" (resz)\
521 : "g" (val));\
522 printf("%-10s A=%08x R=%08x %d\n", #op, val, res, resz);\
523 }
524
525 void test_bsx(void)
526 {
527 TEST_BSX(bsrw, "w", 0);
528 TEST_BSX(bsrw, "w", 0x12340128);
529 TEST_BSX(bsrl, "", 0);
530 TEST_BSX(bsrl, "", 0x00340128);
531 TEST_BSX(bsfw, "w", 0);
532 TEST_BSX(bsfw, "w", 0x12340128);
533 TEST_BSX(bsfl, "", 0);
534 TEST_BSX(bsfl, "", 0x00340128);
535 }
536
537 /**********************************************/
538
539 void test_fops(double a, double b)
540 {
541 printf("a=%f b=%f a+b=%f\n", a, b, a + b);
542 printf("a=%f b=%f a-b=%f\n", a, b, a - b);
543 printf("a=%f b=%f a*b=%f\n", a, b, a * b);
544 printf("a=%f b=%f a/b=%f\n", a, b, a / b);
545 printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
546 printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
547 printf("a=%f sin(a)=%f\n", a, sin(a));
548 printf("a=%f cos(a)=%f\n", a, cos(a));
549 printf("a=%f tan(a)=%f\n", a, tan(a));
550 printf("a=%f log(a)=%f\n", a, log(a));
551 printf("a=%f exp(a)=%f\n", a, exp(a));
552 printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
553 /* just to test some op combining */
554 printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
555 printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
556 printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
557
558 }
559
560 void test_fcmp(double a, double b)
561 {
562 printf("(%f<%f)=%d\n",
563 a, b, a < b);
564 printf("(%f<=%f)=%d\n",
565 a, b, a <= b);
566 printf("(%f==%f)=%d\n",
567 a, b, a == b);
568 printf("(%f>%f)=%d\n",
569 a, b, a > b);
570 printf("(%f<=%f)=%d\n",
571 a, b, a >= b);
572 if (TEST_FCOMI) {
573 unsigned int eflags;
574 /* test f(u)comi instruction */
575 asm("fcomi %2, %1\n"
576 "pushf\n"
577 "pop %0\n"
578 : "=r" (eflags)
579 : "t" (a), "u" (b));
580 printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
581 }
582 }
583
584 void test_fcvt(double a)
585 {
586 float fa;
587 long double la;
588 int16_t fpuc;
589 int i;
590 int64_t lla;
591 int ia;
592 int16_t wa;
593 double ra;
594
595 fa = a;
596 la = a;
597 printf("(float)%f = %f\n", a, fa);
598 printf("(long double)%f = %Lf\n", a, la);
599 printf("a=%016Lx\n", *(long long *)&a);
600 printf("la=%016Lx %04x\n", *(long long *)&la,
601 *(unsigned short *)((char *)(&la) + 8));
602
603 /* test all roundings */
604 asm volatile ("fstcw %0" : "=m" (fpuc));
605 for(i=0;i<4;i++) {
606 asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10)));
607 asm volatile ("fist %0" : "=m" (wa) : "t" (a));
608 asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
609 asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
610 asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
611 asm volatile ("fldcw %0" : : "m" (fpuc));
612 printf("(short)a = %d\n", wa);
613 printf("(int)a = %d\n", ia);
614 printf("(int64_t)a = %Ld\n", lla);
615 printf("rint(a) = %f\n", ra);
616 }
617 }
618
619 #define TEST(N) \
620 asm("fld" #N : "=t" (a)); \
621 printf("fld" #N "= %f\n", a);
622
623 void test_fconst(void)
624 {
625 double a;
626 TEST(1);
627 TEST(l2t);
628 TEST(l2e);
629 TEST(pi);
630 TEST(lg2);
631 TEST(ln2);
632 TEST(z);
633 }
634
635 void test_fbcd(double a)
636 {
637 unsigned short bcd[5];
638 double b;
639
640 asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
641 asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
642 printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
643 a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
644 }
645
646 #define TEST_ENV(env, save, restore)\
647 {\
648 memset((env), 0xaa, sizeof(*(env)));\
649 for(i=0;i<5;i++)\
650 asm volatile ("fldl %0" : : "m" (dtab[i]));\
651 asm volatile (save " %0\n" : : "m" (*(env)));\
652 asm volatile (restore " %0\n": : "m" (*(env)));\
653 for(i=0;i<5;i++)\
654 asm volatile ("fstpl %0" : "=m" (rtab[i]));\
655 for(i=0;i<5;i++)\
656 printf("res[%d]=%f\n", i, rtab[i]);\
657 printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
658 (env)->fpuc,\
659 (env)->fpus & 0xff00,\
660 (env)->fptag);\
661 }
662
663 void test_fenv(void)
664 {
665 struct __attribute__((packed)) {
666 uint16_t fpuc;
667 uint16_t dummy1;
668 uint16_t fpus;
669 uint16_t dummy2;
670 uint16_t fptag;
671 uint16_t dummy3;
672 uint32_t ignored[4];
673 long double fpregs[8];
674 } float_env32;
675 struct __attribute__((packed)) {
676 uint16_t fpuc;
677 uint16_t fpus;
678 uint16_t fptag;
679 uint16_t ignored[4];
680 long double fpregs[8];
681 } float_env16;
682 double dtab[8];
683 double rtab[8];
684 int i;
685
686 for(i=0;i<8;i++)
687 dtab[i] = i + 1;
688
689 TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
690 TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
691 TEST_ENV(&float_env32, "fnstenv", "fldenv");
692 TEST_ENV(&float_env32, "fnsave", "frstor");
693
694 /* test for ffree */
695 for(i=0;i<5;i++)
696 asm volatile ("fldl %0" : : "m" (dtab[i]));
697 asm volatile("ffree %st(2)");
698 asm volatile ("fnstenv %0\n" : : "m" (float_env32));
699 asm volatile ("fninit");
700 printf("fptag=%04x\n", float_env32.fptag);
701 }
702
703
704 #define TEST_FCMOV(a, b, eflags, CC)\
705 {\
706 double res;\
707 asm("push %3\n"\
708 "popf\n"\
709 "fcmov" CC " %2, %0\n"\
710 : "=t" (res)\
711 : "0" (a), "u" (b), "g" (eflags));\
712 printf("fcmov%s eflags=0x%04x-> %f\n", \
713 CC, eflags, res);\
714 }
715
716 void test_fcmov(void)
717 {
718 double a, b;
719 int eflags, i;
720
721 a = 1.0;
722 b = 2.0;
723 for(i = 0; i < 4; i++) {
724 eflags = 0;
725 if (i & 1)
726 eflags |= CC_C;
727 if (i & 2)
728 eflags |= CC_Z;
729 TEST_FCMOV(a, b, eflags, "b");
730 TEST_FCMOV(a, b, eflags, "e");
731 TEST_FCMOV(a, b, eflags, "be");
732 TEST_FCMOV(a, b, eflags, "nb");
733 TEST_FCMOV(a, b, eflags, "ne");
734 TEST_FCMOV(a, b, eflags, "nbe");
735 }
736 TEST_FCMOV(a, b, 0, "u");
737 TEST_FCMOV(a, b, CC_P, "u");
738 TEST_FCMOV(a, b, 0, "nu");
739 TEST_FCMOV(a, b, CC_P, "nu");
740 }
741
742 void test_floats(void)
743 {
744 test_fops(2, 3);
745 test_fops(1.4, -5);
746 test_fcmp(2, -1);
747 test_fcmp(2, 2);
748 test_fcmp(2, 3);
749 test_fcvt(0.5);
750 test_fcvt(-0.5);
751 test_fcvt(1.0/7.0);
752 test_fcvt(-1.0/9.0);
753 test_fcvt(32768);
754 test_fcvt(-1e20);
755 test_fconst();
756 test_fbcd(1234567890123456);
757 test_fbcd(-123451234567890);
758 test_fenv();
759 if (TEST_CMOV) {
760 test_fcmov();
761 }
762 }
763
764 /**********************************************/
765
766 #define TEST_BCD(op, op0, cc_in, cc_mask)\
767 {\
768 int res, flags;\
769 res = op0;\
770 flags = cc_in;\
771 asm ("push %3\n\t"\
772 "popf\n\t"\
773 #op "\n\t"\
774 "pushf\n\t"\
775 "popl %1\n\t"\
776 : "=a" (res), "=g" (flags)\
777 : "0" (res), "1" (flags));\
778 printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
779 #op, op0, res, cc_in, flags & cc_mask);\
780 }
781
782 void test_bcd(void)
783 {
784 TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
785 TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
786 TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
787 TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
788 TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
789 TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
790 TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
791 TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
792 TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
793 TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
794 TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
795 TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
796 TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
797
798 TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
799 TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
800 TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
801 TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
802 TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
803 TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
804 TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
805 TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
806 TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
807 TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
808 TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
809 TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
810 TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
811
812 TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
813 TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
814 TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
815 TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
816 TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
817 TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
818 TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
819 TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
820
821 TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
822 TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
823 TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
824 TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
825 TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
826 TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
827 TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
828 TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
829
830 TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
831 TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
832 }
833
834 #define TEST_XCHG(op, size, opconst)\
835 {\
836 int op0, op1;\
837 op0 = 0x12345678;\
838 op1 = 0xfbca7654;\
839 asm(#op " %" size "0, %" size "1" \
840 : "=q" (op0), opconst (op1) \
841 : "0" (op0), "1" (op1));\
842 printf("%-10s A=%08x B=%08x\n",\
843 #op, op0, op1);\
844 }
845
846 #define TEST_CMPXCHG(op, size, opconst, eax)\
847 {\
848 int op0, op1;\
849 op0 = 0x12345678;\
850 op1 = 0xfbca7654;\
851 asm(#op " %" size "0, %" size "1" \
852 : "=q" (op0), opconst (op1) \
853 : "0" (op0), "1" (op1), "a" (eax));\
854 printf("%-10s EAX=%08x A=%08x C=%08x\n",\
855 #op, eax, op0, op1);\
856 }
857
858 void test_xchg(void)
859 {
860 TEST_XCHG(xchgl, "", "=q");
861 TEST_XCHG(xchgw, "w", "=q");
862 TEST_XCHG(xchgb, "b", "=q");
863
864 TEST_XCHG(xchgl, "", "=m");
865 TEST_XCHG(xchgw, "w", "=m");
866 TEST_XCHG(xchgb, "b", "=m");
867
868 TEST_XCHG(xaddl, "", "=q");
869 TEST_XCHG(xaddw, "w", "=q");
870 TEST_XCHG(xaddb, "b", "=q");
871
872 {
873 int res;
874 res = 0x12345678;
875 asm("xaddl %1, %0" : "=r" (res) : "0" (res));
876 printf("xaddl same res=%08x\n", res);
877 }
878
879 TEST_XCHG(xaddl, "", "=m");
880 TEST_XCHG(xaddw, "w", "=m");
881 TEST_XCHG(xaddb, "b", "=m");
882
883 TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
884 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
885 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
886
887 TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
888 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
889 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
890
891 TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
892 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
893 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
894
895 TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
896 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
897 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
898
899 {
900 uint64_t op0, op1, op2;
901 int i, eflags;
902
903 for(i = 0; i < 2; i++) {
904 op0 = 0x123456789abcd;
905 if (i == 0)
906 op1 = 0xfbca765423456;
907 else
908 op1 = op0;
909 op2 = 0x6532432432434;
910 asm("cmpxchg8b %1\n"
911 "pushf\n"
912 "popl %2\n"
913 : "=A" (op0), "=m" (op1), "=g" (eflags)
914 : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
915 printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n",
916 op0, op1, eflags & CC_Z);
917 }
918 }
919 }
920
921 /**********************************************/
922 /* segmentation tests */
923
924 #include <asm/ldt.h>
925 #include <linux/unistd.h>
926 #include <linux/version.h>
927
928 _syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
929
930 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
931 #define modify_ldt_ldt_s user_desc
932 #endif
933
934 uint8_t seg_data1[4096];
935 uint8_t seg_data2[4096];
936
937 #define MK_SEL(n) (((n) << 3) | 7)
938
939 #define TEST_LR(op, size, seg, mask)\
940 {\
941 int res, res2;\
942 res = 0x12345678;\
943 asm (op " %" size "2, %" size "0\n" \
944 "movl $0, %1\n"\
945 "jnz 1f\n"\
946 "movl $1, %1\n"\
947 "1:\n"\
948 : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
949 printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
950 }
951
952 /* NOTE: we use Linux modify_ldt syscall */
953 void test_segs(void)
954 {
955 struct modify_ldt_ldt_s ldt;
956 long long ldt_table[3];
957 int res, res2;
958 char tmp;
959 struct {
960 uint32_t offset;
961 uint16_t seg;
962 } __attribute__((packed)) segoff;
963
964 ldt.entry_number = 1;
965 ldt.base_addr = (unsigned long)&seg_data1;
966 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
967 ldt.seg_32bit = 1;
968 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
969 ldt.read_exec_only = 0;
970 ldt.limit_in_pages = 1;
971 ldt.seg_not_present = 0;
972 ldt.useable = 1;
973 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
974
975 ldt.entry_number = 2;
976 ldt.base_addr = (unsigned long)&seg_data2;
977 ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
978 ldt.seg_32bit = 1;
979 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
980 ldt.read_exec_only = 0;
981 ldt.limit_in_pages = 1;
982 ldt.seg_not_present = 0;
983 ldt.useable = 1;
984 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
985
986 modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
987 #if 0
988 {
989 int i;
990 for(i=0;i<3;i++)
991 printf("%d: %016Lx\n", i, ldt_table[i]);
992 }
993 #endif
994 /* do some tests with fs or gs */
995 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
996
997 seg_data1[1] = 0xaa;
998 seg_data2[1] = 0x55;
999
1000 asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
1001 printf("FS[1] = %02x\n", res);
1002
1003 asm volatile ("pushl %%gs\n"
1004 "movl %1, %%gs\n"
1005 "gs movzbl 0x1, %0\n"
1006 "popl %%gs\n"
1007 : "=r" (res)
1008 : "r" (MK_SEL(2)));
1009 printf("GS[1] = %02x\n", res);
1010
1011 /* tests with ds/ss (implicit segment case) */
1012 tmp = 0xa5;
1013 asm volatile ("pushl %%ebp\n\t"
1014 "pushl %%ds\n\t"
1015 "movl %2, %%ds\n\t"
1016 "movl %3, %%ebp\n\t"
1017 "movzbl 0x1, %0\n\t"
1018 "movzbl (%%ebp), %1\n\t"
1019 "popl %%ds\n\t"
1020 "popl %%ebp\n\t"
1021 : "=r" (res), "=r" (res2)
1022 : "r" (MK_SEL(1)), "r" (&tmp));
1023 printf("DS[1] = %02x\n", res);
1024 printf("SS[tmp] = %02x\n", res2);
1025
1026 segoff.seg = MK_SEL(2);
1027 segoff.offset = 0xabcdef12;
1028 asm volatile("lfs %2, %0\n\t"
1029 "movl %%fs, %1\n\t"
1030 : "=r" (res), "=g" (res2)
1031 : "m" (segoff));
1032 printf("FS:reg = %04x:%08x\n", res2, res);
1033
1034 TEST_LR("larw", "w", MK_SEL(2), 0x0100);
1035 TEST_LR("larl", "", MK_SEL(2), 0x0100);
1036 TEST_LR("lslw", "w", MK_SEL(2), 0);
1037 TEST_LR("lsll", "", MK_SEL(2), 0);
1038
1039 TEST_LR("larw", "w", 0xfff8, 0);
1040 TEST_LR("larl", "", 0xfff8, 0);
1041 TEST_LR("lslw", "w", 0xfff8, 0);
1042 TEST_LR("lsll", "", 0xfff8, 0);
1043 }
1044
1045 /* 16 bit code test */
1046 extern char code16_start, code16_end;
1047 extern char code16_func1;
1048 extern char code16_func2;
1049 extern char code16_func3;
1050
1051 void test_code16(void)
1052 {
1053 struct modify_ldt_ldt_s ldt;
1054 int res, res2;
1055
1056 /* build a code segment */
1057 ldt.entry_number = 1;
1058 ldt.base_addr = (unsigned long)&code16_start;
1059 ldt.limit = &code16_end - &code16_start;
1060 ldt.seg_32bit = 0;
1061 ldt.contents = MODIFY_LDT_CONTENTS_CODE;
1062 ldt.read_exec_only = 0;
1063 ldt.limit_in_pages = 0;
1064 ldt.seg_not_present = 0;
1065 ldt.useable = 1;
1066 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1067
1068 /* call the first function */
1069 asm volatile ("lcall %1, %2"
1070 : "=a" (res)
1071 : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1072 printf("func1() = 0x%08x\n", res);
1073 asm volatile ("lcall %2, %3"
1074 : "=a" (res), "=c" (res2)
1075 : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1076 printf("func2() = 0x%08x spdec=%d\n", res, res2);
1077 asm volatile ("lcall %1, %2"
1078 : "=a" (res)
1079 : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1080 printf("func3() = 0x%08x\n", res);
1081 }
1082
1083 extern char func_lret32;
1084 extern char func_iret32;
1085
1086 void test_misc(void)
1087 {
1088 char table[256];
1089 int res, i;
1090
1091 for(i=0;i<256;i++) table[i] = 256 - i;
1092 res = 0x12345678;
1093 asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1094 printf("xlat: EAX=%08x\n", res);
1095
1096 asm volatile ("pushl %%cs ; call %1"
1097 : "=a" (res)
1098 : "m" (func_lret32): "memory", "cc");
1099 printf("func_lret32=%x\n", res);
1100
1101 asm volatile ("pushfl ; pushl %%cs ; call %1"
1102 : "=a" (res)
1103 : "m" (func_iret32): "memory", "cc");
1104 printf("func_iret32=%x\n", res);
1105
1106 /* specific popl test */
1107 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1108 : "=g" (res));
1109 printf("popl esp=%x\n", res);
1110
1111 /* specific popw test */
1112 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1113 : "=g" (res));
1114 printf("popw esp=%x\n", res);
1115 }
1116
1117 uint8_t str_buffer[4096];
1118
1119 #define TEST_STRING1(OP, size, DF, REP)\
1120 {\
1121 int esi, edi, eax, ecx, eflags;\
1122 \
1123 esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1124 edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1125 eax = 0x12345678;\
1126 ecx = 17;\
1127 \
1128 asm volatile ("pushl $0\n\t"\
1129 "popf\n\t"\
1130 DF "\n\t"\
1131 REP #OP size "\n\t"\
1132 "cld\n\t"\
1133 "pushf\n\t"\
1134 "popl %4\n\t"\
1135 : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1136 : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1137 printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
1138 REP #OP size, esi, edi, eax, ecx,\
1139 eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
1140 }
1141
1142 #define TEST_STRING(OP, REP)\
1143 TEST_STRING1(OP, "b", "", REP);\
1144 TEST_STRING1(OP, "w", "", REP);\
1145 TEST_STRING1(OP, "l", "", REP);\
1146 TEST_STRING1(OP, "b", "std", REP);\
1147 TEST_STRING1(OP, "w", "std", REP);\
1148 TEST_STRING1(OP, "l", "std", REP)
1149
1150 void test_string(void)
1151 {
1152 int i;
1153 for(i = 0;i < sizeof(str_buffer); i++)
1154 str_buffer[i] = i + 0x56;
1155 TEST_STRING(stos, "");
1156 TEST_STRING(stos, "rep ");
1157 TEST_STRING(lods, ""); /* to verify stos */
1158 TEST_STRING(lods, "rep ");
1159 TEST_STRING(movs, "");
1160 TEST_STRING(movs, "rep ");
1161 TEST_STRING(lods, ""); /* to verify stos */
1162
1163 /* XXX: better tests */
1164 TEST_STRING(scas, "");
1165 TEST_STRING(scas, "repz ");
1166 TEST_STRING(scas, "repnz ");
1167 TEST_STRING(cmps, "");
1168 TEST_STRING(cmps, "repz ");
1169 TEST_STRING(cmps, "repnz ");
1170 }
1171
1172 /* VM86 test */
1173
1174 static inline void set_bit(uint8_t *a, unsigned int bit)
1175 {
1176 a[bit / 8] |= (1 << (bit % 8));
1177 }
1178
1179 static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1180 {
1181 return (uint8_t *)((seg << 4) + (reg & 0xffff));
1182 }
1183
1184 static inline void pushw(struct vm86_regs *r, int val)
1185 {
1186 r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1187 *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1188 }
1189
1190 #undef __syscall_return
1191 #define __syscall_return(type, res) \
1192 do { \
1193 return (type) (res); \
1194 } while (0)
1195
1196 _syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
1197
1198 extern char vm86_code_start;
1199 extern char vm86_code_end;
1200
1201 #define VM86_CODE_CS 0x100
1202 #define VM86_CODE_IP 0x100
1203
1204 void test_vm86(void)
1205 {
1206 struct vm86plus_struct ctx;
1207 struct vm86_regs *r;
1208 uint8_t *vm86_mem;
1209 int seg, ret;
1210
1211 vm86_mem = mmap((void *)0x00000000, 0x110000,
1212 PROT_WRITE | PROT_READ | PROT_EXEC,
1213 MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1214 if (vm86_mem == MAP_FAILED) {
1215 printf("ERROR: could not map vm86 memory");
1216 return;
1217 }
1218 memset(&ctx, 0, sizeof(ctx));
1219
1220 /* init basic registers */
1221 r = &ctx.regs;
1222 r->eip = VM86_CODE_IP;
1223 r->esp = 0xfffe;
1224 seg = VM86_CODE_CS;
1225 r->cs = seg;
1226 r->ss = seg;
1227 r->ds = seg;
1228 r->es = seg;
1229 r->fs = seg;
1230 r->gs = seg;
1231 r->eflags = VIF_MASK;
1232
1233 /* move code to proper address. We use the same layout as a .com
1234 dos program. */
1235 memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
1236 &vm86_code_start, &vm86_code_end - &vm86_code_start);
1237
1238 /* mark int 0x21 as being emulated */
1239 set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1240
1241 for(;;) {
1242 ret = vm86(VM86_ENTER, &ctx);
1243 switch(VM86_TYPE(ret)) {
1244 case VM86_INTx:
1245 {
1246 int int_num, ah, v;
1247
1248 int_num = VM86_ARG(ret);
1249 if (int_num != 0x21)
1250 goto unknown_int;
1251 ah = (r->eax >> 8) & 0xff;
1252 switch(ah) {
1253 case 0x00: /* exit */
1254 goto the_end;
1255 case 0x02: /* write char */
1256 {
1257 uint8_t c = r->edx;
1258 putchar(c);
1259 }
1260 break;
1261 case 0x09: /* write string */
1262 {
1263 uint8_t c, *ptr;
1264 ptr = seg_to_linear(r->ds, r->edx);
1265 for(;;) {
1266 c = *ptr++;
1267 if (c == '$')
1268 break;
1269 putchar(c);
1270 }
1271 r->eax = (r->eax & ~0xff) | '$';
1272 }
1273 break;
1274 case 0xff: /* extension: write eflags number in edx */
1275 v = (int)r->edx;
1276 #ifndef LINUX_VM86_IOPL_FIX
1277 v &= ~0x3000;
1278 #endif
1279 printf("%08x\n", v);
1280 break;
1281 default:
1282 unknown_int:
1283 printf("unsupported int 0x%02x\n", int_num);
1284 goto the_end;
1285 }
1286 }
1287 break;
1288 case VM86_SIGNAL:
1289 /* a signal came, we just ignore that */
1290 break;
1291 case VM86_STI:
1292 break;
1293 default:
1294 printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1295 goto the_end;
1296 }
1297 }
1298 the_end:
1299 printf("VM86 end\n");
1300 munmap(vm86_mem, 0x110000);
1301 }
1302
1303 /* exception tests */
1304 #ifndef REG_EAX
1305 #define REG_EAX EAX
1306 #define REG_EBX EBX
1307 #define REG_ECX ECX
1308 #define REG_EDX EDX
1309 #define REG_ESI ESI
1310 #define REG_EDI EDI
1311 #define REG_EBP EBP
1312 #define REG_ESP ESP
1313 #define REG_EIP EIP
1314 #define REG_EFL EFL
1315 #define REG_TRAPNO TRAPNO
1316 #define REG_ERR ERR
1317 #endif
1318
1319 jmp_buf jmp_env;
1320 int v1;
1321 int tab[2];
1322
1323 void sig_handler(int sig, siginfo_t *info, void *puc)
1324 {
1325 struct ucontext *uc = puc;
1326
1327 printf("si_signo=%d si_errno=%d si_code=%d",
1328 info->si_signo, info->si_errno, info->si_code);
1329 printf(" si_addr=0x%08lx",
1330 (unsigned long)info->si_addr);
1331 printf("\n");
1332
1333 printf("trapno=0x%02x err=0x%08x",
1334 uc->uc_mcontext.gregs[REG_TRAPNO],
1335 uc->uc_mcontext.gregs[REG_ERR]);
1336 printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
1337 printf("\n");
1338 longjmp(jmp_env, 1);
1339 }
1340
1341 void test_exceptions(void)
1342 {
1343 struct modify_ldt_ldt_s ldt;
1344 struct sigaction act;
1345 volatile int val;
1346
1347 act.sa_sigaction = sig_handler;
1348 sigemptyset(&act.sa_mask);
1349 act.sa_flags = SA_SIGINFO;
1350 sigaction(SIGFPE, &act, NULL);
1351 sigaction(SIGILL, &act, NULL);
1352 sigaction(SIGSEGV, &act, NULL);
1353 sigaction(SIGBUS, &act, NULL);
1354 sigaction(SIGTRAP, &act, NULL);
1355
1356 /* test division by zero reporting */
1357 printf("DIVZ exception:\n");
1358 if (setjmp(jmp_env) == 0) {
1359 /* now divide by zero */
1360 v1 = 0;
1361 v1 = 2 / v1;
1362 }
1363
1364 printf("BOUND exception:\n");
1365 if (setjmp(jmp_env) == 0) {
1366 /* bound exception */
1367 tab[0] = 1;
1368 tab[1] = 10;
1369 asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
1370 }
1371
1372 printf("segment exceptions:\n");
1373 if (setjmp(jmp_env) == 0) {
1374 /* load an invalid segment */
1375 asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1376 }
1377 if (setjmp(jmp_env) == 0) {
1378 /* null data segment is valid */
1379 asm volatile ("movl %0, %%fs" : : "r" (3));
1380 /* null stack segment */
1381 asm volatile ("movl %0, %%ss" : : "r" (3));
1382 }
1383
1384 ldt.entry_number = 1;
1385 ldt.base_addr = (unsigned long)&seg_data1;
1386 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1387 ldt.seg_32bit = 1;
1388 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1389 ldt.read_exec_only = 0;
1390 ldt.limit_in_pages = 1;
1391 ldt.seg_not_present = 1;
1392 ldt.useable = 1;
1393 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1394
1395 if (setjmp(jmp_env) == 0) {
1396 /* segment not present */
1397 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1398 }
1399
1400 /* test SEGV reporting */
1401 printf("PF exception:\n");
1402 if (setjmp(jmp_env) == 0) {
1403 val = 1;
1404 /* we add a nop to test a weird PC retrieval case */
1405 asm volatile ("nop");
1406 /* now store in an invalid address */
1407 *(char *)0x1234 = 1;
1408 }
1409
1410 /* test SEGV reporting */
1411 printf("PF exception:\n");
1412 if (setjmp(jmp_env) == 0) {
1413 val = 1;
1414 /* read from an invalid address */
1415 v1 = *(char *)0x1234;
1416 }
1417
1418 /* test illegal instruction reporting */
1419 printf("UD2 exception:\n");
1420 if (setjmp(jmp_env) == 0) {
1421 /* now execute an invalid instruction */
1422 asm volatile("ud2");
1423 }
1424 printf("lock nop exception:\n");
1425 if (setjmp(jmp_env) == 0) {
1426 /* now execute an invalid instruction */
1427 asm volatile("lock nop");
1428 }
1429
1430 printf("INT exception:\n");
1431 if (setjmp(jmp_env) == 0) {
1432 asm volatile ("int $0xfd");
1433 }
1434 if (setjmp(jmp_env) == 0) {
1435 asm volatile ("int $0x01");
1436 }
1437 if (setjmp(jmp_env) == 0) {
1438 asm volatile (".byte 0xcd, 0x03");
1439 }
1440 if (setjmp(jmp_env) == 0) {
1441 asm volatile ("int $0x04");
1442 }
1443 if (setjmp(jmp_env) == 0) {
1444 asm volatile ("int $0x05");
1445 }
1446
1447 printf("INT3 exception:\n");
1448 if (setjmp(jmp_env) == 0) {
1449 asm volatile ("int3");
1450 }
1451
1452 printf("CLI exception:\n");
1453 if (setjmp(jmp_env) == 0) {
1454 asm volatile ("cli");
1455 }
1456
1457 printf("STI exception:\n");
1458 if (setjmp(jmp_env) == 0) {
1459 asm volatile ("cli");
1460 }
1461
1462 printf("INTO exception:\n");
1463 if (setjmp(jmp_env) == 0) {
1464 /* overflow exception */
1465 asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1466 }
1467
1468 printf("OUTB exception:\n");
1469 if (setjmp(jmp_env) == 0) {
1470 asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1471 }
1472
1473 printf("INB exception:\n");
1474 if (setjmp(jmp_env) == 0) {
1475 asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1476 }
1477
1478 printf("REP OUTSB exception:\n");
1479 if (setjmp(jmp_env) == 0) {
1480 asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1481 }
1482
1483 printf("REP INSB exception:\n");
1484 if (setjmp(jmp_env) == 0) {
1485 asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1486 }
1487
1488 printf("HLT exception:\n");
1489 if (setjmp(jmp_env) == 0) {
1490 asm volatile ("hlt");
1491 }
1492
1493 printf("single step exception:\n");
1494 val = 0;
1495 if (setjmp(jmp_env) == 0) {
1496 asm volatile ("pushf\n"
1497 "orl $0x00100, (%%esp)\n"
1498 "popf\n"
1499 "movl $0xabcd, %0\n"
1500 "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1501 }
1502 printf("val=0x%x\n", val);
1503 }
1504
1505 /* specific precise single step test */
1506 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1507 {
1508 struct ucontext *uc = puc;
1509 printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
1510 }
1511
1512 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
1513 uint8_t sstep_buf2[4];
1514
1515 void test_single_step(void)
1516 {
1517 struct sigaction act;
1518 volatile int val;
1519 int i;
1520
1521 val = 0;
1522 act.sa_sigaction = sig_trap_handler;
1523 sigemptyset(&act.sa_mask);
1524 act.sa_flags = SA_SIGINFO;
1525 sigaction(SIGTRAP, &act, NULL);
1526 asm volatile ("pushf\n"
1527 "orl $0x00100, (%%esp)\n"
1528 "popf\n"
1529 "movl $0xabcd, %0\n"
1530
1531 /* jmp test */
1532 "movl $3, %%ecx\n"
1533 "1:\n"
1534 "addl $1, %0\n"
1535 "decl %%ecx\n"
1536 "jnz 1b\n"
1537
1538 /* movsb: the single step should stop at each movsb iteration */
1539 "movl $sstep_buf1, %%esi\n"
1540 "movl $sstep_buf2, %%edi\n"
1541 "movl $0, %%ecx\n"
1542 "rep movsb\n"
1543 "movl $3, %%ecx\n"
1544 "rep movsb\n"
1545 "movl $1, %%ecx\n"
1546 "rep movsb\n"
1547
1548 /* cmpsb: the single step should stop at each cmpsb iteration */
1549 "movl $sstep_buf1, %%esi\n"
1550 "movl $sstep_buf2, %%edi\n"
1551 "movl $0, %%ecx\n"
1552 "rep cmpsb\n"
1553 "movl $4, %%ecx\n"
1554 "rep cmpsb\n"
1555
1556 /* getpid() syscall: single step should skip one
1557 instruction */
1558 "movl $20, %%eax\n"
1559 "int $0x80\n"
1560 "movl $0, %%eax\n"
1561
1562 /* when modifying SS, trace is not done on the next
1563 instruction */
1564 "movl %%ss, %%ecx\n"
1565 "movl %%ecx, %%ss\n"
1566 "addl $1, %0\n"
1567 "movl $1, %%eax\n"
1568 "movl %%ecx, %%ss\n"
1569 "jmp 1f\n"
1570 "addl $1, %0\n"
1571 "1:\n"
1572 "movl $1, %%eax\n"
1573 "pushl %%ecx\n"
1574 "popl %%ss\n"
1575 "addl $1, %0\n"
1576 "movl $1, %%eax\n"
1577
1578 "pushf\n"
1579 "andl $~0x00100, (%%esp)\n"
1580 "popf\n"
1581 : "=m" (val)
1582 :
1583 : "cc", "memory", "eax", "ecx", "esi", "edi");
1584 printf("val=%d\n", val);
1585 for(i = 0; i < 4; i++)
1586 printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
1587 }
1588
1589 /* self modifying code test */
1590 uint8_t code[] = {
1591 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
1592 0xc3, /* ret */
1593 };
1594
1595 asm("smc_code2:\n"
1596 "movl 4(%esp), %eax\n"
1597 "movl %eax, smc_patch_addr2 + 1\n"
1598 "nop\n"
1599 "nop\n"
1600 "nop\n"
1601 "nop\n"
1602 "nop\n"
1603 "nop\n"
1604 "nop\n"
1605 "nop\n"
1606 "smc_patch_addr2:\n"
1607 "movl $1, %eax\n"
1608 "ret\n");
1609
1610 typedef int FuncType(void);
1611 extern int smc_code2(int);
1612 void test_self_modifying_code(void)
1613 {
1614 int i;
1615
1616 printf("self modifying code:\n");
1617 printf("func1 = 0x%x\n", ((FuncType *)code)());
1618 for(i = 2; i <= 4; i++) {
1619 code[1] = i;
1620 printf("func%d = 0x%x\n", i, ((FuncType *)code)());
1621 }
1622
1623 /* more difficult test : the modified code is just after the
1624 modifying instruction. It is forbidden in Intel specs, but it
1625 is used by old DOS programs */
1626 for(i = 2; i <= 4; i++) {
1627 printf("smc_code2(%d) = %d\n", i, smc_code2(i));
1628 }
1629 }
1630
1631 int enter_stack[4096];
1632
1633 #define TEST_ENTER(size, stack_type, level)\
1634 {\
1635 int esp_save, esp_val, ebp_val, ebp_save, i;\
1636 stack_type *ptr, *stack_end, *stack_ptr;\
1637 memset(enter_stack, 0, sizeof(enter_stack));\
1638 stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
1639 ebp_val = (long)stack_ptr;\
1640 for(i=1;i<=32;i++)\
1641 *--stack_ptr = i;\
1642 esp_val = (long)stack_ptr;\
1643 asm("movl %%esp, %[esp_save]\n"\
1644 "movl %%ebp, %[ebp_save]\n"\
1645 "movl %[esp_val], %%esp\n"\
1646 "movl %[ebp_val], %%ebp\n"\
1647 "enter" size " $12, $" #level "\n"\
1648 "movl %%esp, %[esp_val]\n"\
1649 "movl %%ebp, %[ebp_val]\n"\
1650 "movl %[esp_save], %%esp\n"\
1651 "movl %[ebp_save], %%ebp\n"\
1652 : [esp_save] "=r" (esp_save),\
1653 [ebp_save] "=r" (ebp_save),\
1654 [esp_val] "=r" (esp_val),\
1655 [ebp_val] "=r" (ebp_val)\
1656 : "[esp_val]" (esp_val),\
1657 "[ebp_val]" (ebp_val));\
1658 printf("level=%d:\n", level);\
1659 printf("esp_val=0x%08lx\n", esp_val - (long)stack_end);\
1660 printf("ebp_val=0x%08lx\n", ebp_val - (long)stack_end);\
1661 for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
1662 printf("%08x\n", ptr[0]);\
1663 }
1664
1665 static void test_enter(void)
1666 {
1667 TEST_ENTER("l", uint32_t, 0);
1668 TEST_ENTER("l", uint32_t, 1);
1669 TEST_ENTER("l", uint32_t, 2);
1670 TEST_ENTER("l", uint32_t, 31);
1671
1672 TEST_ENTER("w", uint16_t, 0);
1673 TEST_ENTER("w", uint16_t, 1);
1674 TEST_ENTER("w", uint16_t, 2);
1675 TEST_ENTER("w", uint16_t, 31);
1676 }
1677
1678 #ifdef TEST_SSE
1679
1680 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
1681 typedef int __m128 __attribute__ ((__mode__(__V4SF__)));
1682
1683 typedef union {
1684 double d[2];
1685 float s[4];
1686 uint32_t l[4];
1687 uint64_t q[2];
1688 __m128 dq;
1689 } XMMReg;
1690
1691 static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1692 { 0x456723c698694873, 0xdc515cff944a58ec },
1693 { 0x1f297ccd58bad7ab, 0x41f21efba9e3e146 },
1694 { 0x007c62c2085427f8, 0x231be9e8cde7438d },
1695 { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
1696 };
1697
1698 #define SSE_OP(op)\
1699 {\
1700 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1701 printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
1702 #op,\
1703 a.q[1], a.q[0],\
1704 b.q[1], b.q[0],\
1705 r.q[1], r.q[0]);\
1706 }
1707
1708 #define SSE_OP2(op)\
1709 {\
1710 int i;\
1711 for(i=0;i<2;i++) {\
1712 a.q[0] = test_values[2*i][0];\
1713 a.q[1] = test_values[2*i][1];\
1714 b.q[0] = test_values[2*i+1][0];\
1715 b.q[1] = test_values[2*i+1][1];\
1716 SSE_OP(op);\
1717 }\
1718 }
1719
1720 #define MMX_OP2(op)\
1721 {\
1722 int i;\
1723 for(i=0;i<2;i++) {\
1724 a.q[0] = test_values[2*i][0];\
1725 b.q[0] = test_values[2*i+1][0];\
1726 asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
1727 printf("%-9s: a=%016llx b=%016llx r=%016llx\n",\
1728 #op,\
1729 a.q[0],\
1730 b.q[0],\
1731 r.q[0]);\
1732 }\
1733 SSE_OP2(op);\
1734 }
1735
1736 #define SHUF_OP(op, ib)\
1737 {\
1738 a.q[0] = test_values[0][0];\
1739 a.q[1] = test_values[0][1];\
1740 b.q[0] = test_values[1][0];\
1741 b.q[1] = test_values[1][1];\
1742 asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1743 printf("%-9s: a=%016llx%016llx b=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
1744 #op,\
1745 a.q[1], a.q[0],\
1746 b.q[1], b.q[0],\
1747 ib,\
1748 r.q[1], r.q[0]);\
1749 }
1750
1751 #define PSHUF_OP(op, ib)\
1752 {\
1753 int i;\
1754 for(i=0;i<2;i++) {\
1755 a.q[0] = test_values[2*i][0];\
1756 a.q[1] = test_values[2*i][1];\
1757 asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
1758 printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
1759 #op,\
1760 a.q[1], a.q[0],\
1761 ib,\
1762 r.q[1], r.q[0]);\
1763 }\
1764 }
1765
1766 #define SHIFT_IM(op, ib)\
1767 {\
1768 int i;\
1769 for(i=0;i<2;i++) {\
1770 a.q[0] = test_values[2*i][0];\
1771 a.q[1] = test_values[2*i][1];\
1772 asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
1773 printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
1774 #op,\
1775 a.q[1], a.q[0],\
1776 ib,\
1777 r.q[1], r.q[0]);\
1778 }\
1779 }
1780
1781 #define SHIFT_OP(op, ib)\
1782 {\
1783 int i;\
1784 SHIFT_IM(op, ib);\
1785 for(i=0;i<2;i++) {\
1786 a.q[0] = test_values[2*i][0];\
1787 a.q[1] = test_values[2*i][1];\
1788 b.q[0] = ib;\
1789 b.q[1] = 0;\
1790 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1791 printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
1792 #op,\
1793 a.q[1], a.q[0],\
1794 b.q[1], b.q[0],\
1795 r.q[1], r.q[0]);\
1796 }\
1797 }
1798
1799 #define MOVMSK(op)\
1800 {\
1801 int i, reg;\
1802 for(i=0;i<2;i++) {\
1803 a.q[0] = test_values[2*i][0];\
1804 a.q[1] = test_values[2*i][1];\
1805 asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
1806 printf("%-9s: a=%016llx%016llx r=%08x\n",\
1807 #op,\
1808 a.q[1], a.q[0],\
1809 reg);\
1810 }\
1811 }
1812
1813 #define SSE_OPS(a) \
1814 SSE_OP(a ## ps);\
1815 SSE_OP(a ## ss);
1816
1817 #define SSE_OPD(a) \
1818 SSE_OP(a ## pd);\
1819 SSE_OP(a ## sd);
1820
1821 #define SSE_COMI(op, field)\
1822 {\
1823 unsigned int eflags;\
1824 XMMReg a, b;\
1825 a.field[0] = a1;\
1826 b.field[0] = b1;\
1827 asm volatile (#op " %2, %1\n"\
1828 "pushf\n"\
1829 "pop %0\n"\
1830 : "=m" (eflags)\
1831 : "x" (a.dq), "x" (b.dq));\
1832 printf("%-9s: a=%f b=%f cc=%04x\n",\
1833 #op, a1, b1,\
1834 eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
1835 }
1836
1837 void test_sse_comi(double a1, double b1)
1838 {
1839 SSE_COMI(ucomiss, s);
1840 SSE_COMI(ucomisd, d);
1841 SSE_COMI(comiss, s);
1842 SSE_COMI(comisd, d);
1843 }
1844
1845 #define CVT_OP_XMM(op)\
1846 {\
1847 asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
1848 printf("%-9s: a=%016llx%016llx r=%016llx%016llx\n",\
1849 #op,\
1850 a.q[1], a.q[0],\
1851 r.q[1], r.q[0]);\
1852 }
1853
1854 #define CVT_OP_XMM2MMX(op)\
1855 {\
1856 asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq));\
1857 printf("%-9s: a=%016llx%016llx r=%016llx\n",\
1858 #op,\
1859 a.q[1], a.q[0],\
1860 r.q[0]);\
1861 }
1862
1863 #define CVT_OP_MMX2XMM(op)\
1864 {\
1865 asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
1866 printf("%-9s: a=%016llx r=%016llx%016llx\n",\
1867 #op,\
1868 a.q[0],\
1869 r.q[1], r.q[0]);\
1870 }
1871
1872 #define CVT_OP_REG2XMM(op)\
1873 {\
1874 asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
1875 printf("%-9s: a=%08x r=%016llx%016llx\n",\
1876 #op,\
1877 a.l[0],\
1878 r.q[1], r.q[0]);\
1879 }
1880
1881 #define CVT_OP_XMM2REG(op)\
1882 {\
1883 asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
1884 printf("%-9s: a=%016llx%016llx r=%08x\n",\
1885 #op,\
1886 a.q[1], a.q[0],\
1887 r.l[0]);\
1888 }
1889
1890 struct fpxstate {
1891 uint16_t fpuc;
1892 uint16_t fpus;
1893 uint16_t fptag;
1894 uint16_t fop;
1895 uint32_t fpuip;
1896 uint16_t cs_sel;
1897 uint16_t dummy0;
1898 uint32_t fpudp;
1899 uint16_t ds_sel;
1900 uint16_t dummy1;
1901 uint32_t mxcsr;
1902 uint32_t mxcsr_mask;
1903 uint8_t fpregs1[8 * 16];
1904 uint8_t xmm_regs[8 * 16];
1905 uint8_t dummy2[224];
1906 };
1907
1908 static struct fpxstate fpx_state __attribute__((aligned(16)));
1909 static struct fpxstate fpx_state2 __attribute__((aligned(16)));
1910
1911 void test_fxsave(void)
1912 {
1913 struct fpxstate *fp = &fpx_state;
1914 struct fpxstate *fp2 = &fpx_state2;
1915 int i;
1916 XMMReg a, b;
1917 a.q[0] = test_values[0][0];
1918 a.q[1] = test_values[0][1];
1919 b.q[0] = test_values[1][0];
1920 b.q[1] = test_values[1][1];
1921
1922 asm("movdqa %2, %%xmm0\n"
1923 "movdqa %3, %%xmm7\n"
1924 " fld1\n"
1925 " fldpi\n"
1926 " fldln2\n"
1927 " fxsave %0\n"
1928 " fxrstor %0\n"
1929 " fxsave %1\n"
1930 " fninit\n"
1931 : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
1932 : "m" (a), "m" (b));
1933 printf("fpuc=%04x\n", fp->fpuc);
1934 printf("fpus=%04x\n", fp->fpus);
1935 printf("fptag=%04x\n", fp->fptag);
1936 for(i = 0; i < 3; i++) {
1937 printf("ST%d: %016llx %04x\n",
1938 i,
1939 *(uint64_t *)&fp->fpregs1[i * 16],
1940 *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
1941 }
1942 printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
1943 for(i = 0; i < 8; i++) {
1944 printf("xmm%d: %016llx%016llx\n",
1945 i,
1946 *(uint64_t *)&fp->xmm_regs[i * 16],
1947 *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
1948 }
1949 }
1950
1951 void test_sse(void)
1952 {
1953 XMMReg r, a, b;
1954
1955 MMX_OP2(punpcklbw);
1956 MMX_OP2(punpcklwd);
1957 MMX_OP2(punpckldq);
1958 MMX_OP2(packsswb);
1959 MMX_OP2(pcmpgtb);
1960 MMX_OP2(pcmpgtw);
1961 MMX_OP2(pcmpgtd);
1962 MMX_OP2(packuswb);
1963 MMX_OP2(punpckhbw);
1964 MMX_OP2(punpckhwd);
1965 MMX_OP2(punpckhdq);
1966 MMX_OP2(packssdw);
1967 MMX_OP2(pcmpeqb);
1968 MMX_OP2(pcmpeqw);
1969 MMX_OP2(pcmpeqd);
1970
1971 MMX_OP2(paddq);
1972 MMX_OP2(pmullw);
1973 MMX_OP2(psubusb);
1974 MMX_OP2(psubusw);
1975 MMX_OP2(pminub);
1976 MMX_OP2(pand);
1977 MMX_OP2(paddusb);
1978 MMX_OP2(paddusw);
1979 MMX_OP2(pmaxub);
1980 MMX_OP2(pandn);
1981
1982 MMX_OP2(pmulhuw);
1983 MMX_OP2(pmulhw);
1984
1985 MMX_OP2(psubsb);
1986 MMX_OP2(psubsw);
1987 MMX_OP2(pminsw);
1988 MMX_OP2(por);
1989 MMX_OP2(paddsb);
1990 MMX_OP2(paddsw);
1991 MMX_OP2(pmaxsw);
1992 MMX_OP2(pxor);
1993 MMX_OP2(pmuludq);
1994 MMX_OP2(pmaddwd);
1995 MMX_OP2(psadbw);
1996 MMX_OP2(psubb);
1997 MMX_OP2(psubw);
1998 MMX_OP2(psubd);
1999 MMX_OP2(psubq);
2000 MMX_OP2(paddb);
2001 MMX_OP2(paddw);
2002 MMX_OP2(paddd);
2003
2004 MMX_OP2(pavgb);
2005 MMX_OP2(pavgw);
2006
2007 asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
2008 printf("%-9s: r=%016llx\n", "pinsrw", r.q[0]);
2009
2010 asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
2011 printf("%-9s: r=%016llx%016llx\n", "pinsrw", r.q[1], r.q[0]);
2012
2013 a.q[0] = test_values[0][0];
2014 a.q[1] = test_values[0][1];
2015 asm volatile ("pextrw $1, %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2016 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2017
2018 asm volatile ("pextrw $5, %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2019 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2020
2021 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2022 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2023
2024 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2025 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2026
2027 {
2028 r.q[0] = -1;
2029 r.q[1] = -1;
2030
2031 a.q[0] = test_values[0][0];
2032 a.q[1] = test_values[0][1];
2033 b.q[0] = test_values[1][0];
2034 b.q[1] = test_values[1][1];
2035 asm volatile("maskmovq %1, %0" :
2036 : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2037 : "memory");
2038 printf("%-9s: r=%016llx a=%016llx b=%016llx\n",
2039 "maskmov",
2040 r.q[0],
2041 a.q[0],
2042 b.q[0]);
2043 asm volatile("maskmovdqu %1, %0" :
2044 : "x" (a.dq), "x" (b.dq), "D" (&r)
2045 : "memory");
2046 printf("%-9s: r=%016llx%016llx a=%016llx%016llx b=%016llx%016llx\n",
2047 "maskmov",
2048 r.q[1], r.q[0],
2049 a.q[1], a.q[0],
2050 b.q[1], b.q[0]);
2051 }
2052
2053 asm volatile ("emms");
2054
2055 SSE_OP2(punpcklqdq);
2056 SSE_OP2(punpckhqdq);
2057 SSE_OP2(andps);
2058 SSE_OP2(andpd);
2059 SSE_OP2(andnps);
2060 SSE_OP2(andnpd);
2061 SSE_OP2(orps);
2062 SSE_OP2(orpd);
2063 SSE_OP2(xorps);
2064 SSE_OP2(xorpd);
2065
2066 SSE_OP2(unpcklps);
2067 SSE_OP2(unpcklpd);
2068 SSE_OP2(unpckhps);
2069 SSE_OP2(unpckhpd);
2070
2071 SHUF_OP(shufps, 0x78);
2072 SHUF_OP(shufpd, 0x02);
2073
2074 PSHUF_OP(pshufd, 0x78);
2075 PSHUF_OP(pshuflw, 0x78);
2076 PSHUF_OP(pshufhw, 0x78);
2077
2078 SHIFT_OP(psrlw, 7);
2079 SHIFT_OP(psrlw, 16);
2080 SHIFT_OP(psraw, 7);
2081 SHIFT_OP(psraw, 16);
2082 SHIFT_OP(psllw, 7);
2083 SHIFT_OP(psllw, 16);
2084
2085 SHIFT_OP(psrld, 7);
2086 SHIFT_OP(psrld, 32);
2087 SHIFT_OP(psrad, 7);
2088 SHIFT_OP(psrad, 32);
2089 SHIFT_OP(pslld, 7);
2090 SHIFT_OP(pslld, 32);
2091
2092 SHIFT_OP(psrlq, 7);
2093 SHIFT_OP(psrlq, 32);
2094 SHIFT_OP(psllq, 7);
2095 SHIFT_OP(psllq, 32);
2096
2097 SHIFT_IM(psrldq, 16);
2098 SHIFT_IM(psrldq, 7);
2099 SHIFT_IM(pslldq, 16);
2100 SHIFT_IM(pslldq, 7);
2101
2102 MOVMSK(movmskps);
2103 MOVMSK(movmskpd);
2104
2105 /* FPU specific ops */
2106
2107 {
2108 uint32_t mxcsr;
2109 asm volatile("stmxcsr %0" : "=m" (mxcsr));
2110 printf("mxcsr=%08x\n", mxcsr & 0x1f80);
2111 asm volatile("ldmxcsr %0" : : "m" (mxcsr));
2112 }
2113
2114 test_sse_comi(2, -1);
2115 test_sse_comi(2, 2);
2116 test_sse_comi(2, 3);
2117
2118 a.s[0] = 2.7;
2119 a.s[1] = 3.4;
2120 a.s[2] = 4;
2121 a.s[3] = -6.3;
2122 b.s[0] = 45.7;
2123 b.s[1] = 353.4;
2124 b.s[2] = 4;
2125 b.s[3] = 56.3;
2126 SSE_OPS(add);
2127 SSE_OPS(mul);
2128 SSE_OPS(sub);
2129 SSE_OPS(min);
2130 SSE_OPS(div);
2131 SSE_OPS(max);
2132 SSE_OPS(sqrt);
2133 SSE_OPS(cmpeq);
2134 SSE_OPS(cmplt);
2135 SSE_OPS(cmple);
2136 SSE_OPS(cmpunord);
2137 SSE_OPS(cmpneq);
2138 SSE_OPS(cmpnlt);
2139 SSE_OPS(cmpnle);
2140 SSE_OPS(cmpord);
2141
2142 a.d[0] = 2.7;
2143 a.d[1] = -3.4;
2144 b.d[0] = 45.7;
2145 b.d[1] = -53.4;
2146 SSE_OPD(add);
2147 SSE_OPD(mul);
2148 SSE_OPD(sub);
2149 SSE_OPD(min);
2150 SSE_OPD(div);
2151 SSE_OPD(max);
2152 SSE_OPD(sqrt);
2153 SSE_OPD(cmpeq);
2154 SSE_OPD(cmplt);
2155 SSE_OPD(cmple);
2156 SSE_OPD(cmpunord);
2157 SSE_OPD(cmpneq);
2158 SSE_OPD(cmpnlt);
2159 SSE_OPD(cmpnle);
2160 SSE_OPD(cmpord);
2161
2162 /* float to float/int */
2163 a.s[0] = 2.7;
2164 a.s[1] = 3.4;
2165 a.s[2] = 4;
2166 a.s[3] = -6.3;
2167 CVT_OP_XMM(cvtps2pd);
2168 CVT_OP_XMM(cvtss2sd);
2169 CVT_OP_XMM2MMX(cvtps2pi);
2170 CVT_OP_XMM2MMX(cvttps2pi);
2171 CVT_OP_XMM2REG(cvtss2si);
2172 CVT_OP_XMM2REG(cvttss2si);
2173 CVT_OP_XMM(cvtps2dq);
2174 CVT_OP_XMM(cvttps2dq);
2175
2176 a.d[0] = 2.6;
2177 a.d[1] = -3.4;
2178 CVT_OP_XMM(cvtpd2ps);
2179 CVT_OP_XMM(cvtsd2ss);
2180 CVT_OP_XMM2MMX(cvtpd2pi);
2181 CVT_OP_XMM2MMX(cvttpd2pi);
2182 CVT_OP_XMM2REG(cvtsd2si);
2183 CVT_OP_XMM2REG(cvttsd2si);
2184 CVT_OP_XMM(cvtpd2dq);
2185 CVT_OP_XMM(cvttpd2dq);
2186
2187 /* int to float */
2188 a.l[0] = -6;
2189 a.l[1] = 2;
2190 a.l[2] = 100;
2191 a.l[3] = -60000;
2192 CVT_OP_MMX2XMM(cvtpi2ps);
2193 CVT_OP_MMX2XMM(cvtpi2pd);
2194 CVT_OP_REG2XMM(cvtsi2ss);
2195 CVT_OP_REG2XMM(cvtsi2sd);
2196 CVT_OP_XMM(cvtdq2ps);
2197 CVT_OP_XMM(cvtdq2pd);
2198
2199 /* XXX: test PNI insns */
2200 #if 0
2201 SSE_OP2(movshdup);
2202 #endif
2203 asm volatile ("emms");
2204 }
2205
2206 #endif
2207
2208 static void *call_end __init_call = NULL;
2209
2210 int main(int argc, char **argv)
2211 {
2212 void **ptr;
2213 void (*func)(void);
2214
2215 ptr = &call_start + 1;
2216 while (*ptr != NULL) {
2217 func = *ptr++;
2218 func();
2219 }
2220 test_bsx();
2221 test_mul();
2222 test_jcc();
2223 test_floats();
2224 test_bcd();
2225 test_xchg();
2226 test_string();
2227 test_misc();
2228 test_lea();
2229 test_segs();
2230 test_code16();
2231 #ifdef TEST_VM86
2232 test_vm86();
2233 #endif
2234 test_exceptions();
2235 test_self_modifying_code();
2236 test_single_step();
2237 test_enter();
2238 #ifdef TEST_SSE
2239 test_sse();
2240 test_fxsave();
2241 #endif
2242 return 0;
2243 }
Mirror of https://git.qemu.org/git/qemu.git