2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/workqueue.h>
17 #include <linux/libnvdimm.h>
18 #include <linux/vmalloc.h>
19 #include <linux/device.h>
20 #include <linux/module.h>
21 #include <linux/mutex.h>
22 #include <linux/ndctl.h>
23 #include <linux/sizes.h>
24 #include <linux/list.h>
25 #include <linux/slab.h>
30 #include "nfit_test.h"
31 #include "../watermark.h"
33 #include <asm/mcsafe_test.h>
36 * Generate an NFIT table to describe the following topology:
38 * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
40 * (a) (b) DIMM BLK-REGION
41 * +----------+--------------+----------+---------+
42 * +------+ | blk2.0 | pm0.0 | blk2.1 | pm1.0 | 0 region2
43 * | imc0 +--+- - - - - region0 - - - -+----------+ +
44 * +--+---+ | blk3.0 | pm0.0 | blk3.1 | pm1.0 | 1 region3
45 * | +----------+--------------v----------v v
49 * | +-------------------------^----------^ ^
50 * +--+---+ | blk4.0 | pm1.0 | 2 region4
51 * | imc1 +--+-------------------------+----------+ +
52 * +------+ | blk5.0 | pm1.0 | 3 region5
53 * +-------------------------+----------+-+-------+
57 * +--+---+ (Hotplug DIMM)
58 * | +----------------------------------------------+
59 * +--+---+ | blk6.0/pm7.0 | 4 region6/7
60 * | imc0 +--+----------------------------------------------+
64 * *) In this layout we have four dimms and two memory controllers in one
65 * socket. Each unique interface (BLK or PMEM) to DPA space
66 * is identified by a region device with a dynamically assigned id.
68 * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
69 * A single PMEM namespace "pm0.0" is created using half of the
70 * REGION0 SPA-range. REGION0 spans dimm0 and dimm1. PMEM namespace
71 * allocate from from the bottom of a region. The unallocated
72 * portion of REGION0 aliases with REGION2 and REGION3. That
73 * unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
74 * "blk3.0") starting at the base of each DIMM to offset (a) in those
75 * DIMMs. "pm0.0", "blk2.0" and "blk3.0" are free-form readable
76 * names that can be assigned to a namespace.
78 * *) In the last portion of dimm0 and dimm1 we have an interleaved
79 * SPA range, REGION1, that spans those two dimms as well as dimm2
80 * and dimm3. Some of REGION1 allocated to a PMEM namespace named
81 * "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
82 * dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
85 * *) The portion of dimm2 and dimm3 that do not participate in the
86 * REGION1 interleaved SPA range (i.e. the DPA address below offset
87 * (b) are also included in the "blk4.0" and "blk5.0" namespaces.
88 * Note, that BLK namespaces need not be contiguous in DPA-space, and
89 * can consume aliased capacity from multiple interleave sets.
91 * BUS1: Legacy NVDIMM (single contiguous range)
94 * +---------------------+
95 * |---------------------|
97 * |---------------------|
98 * +---------------------+
100 * *) A NFIT-table may describe a simple system-physical-address range
101 * with no BLK aliasing. This type of region may optionally
102 * reference an NVDIMM.
109 NUM_SPA
= NUM_PM
+ NUM_DCR
+ NUM_BDW
,
110 NUM_MEM
= NUM_DCR
+ NUM_BDW
+ 2 /* spa0 iset */
111 + 4 /* spa1 iset */ + 1 /* spa11 iset */,
113 LABEL_SIZE
= SZ_128K
,
114 SPA_VCD_SIZE
= SZ_4M
,
115 SPA0_SIZE
= DIMM_SIZE
,
116 SPA1_SIZE
= DIMM_SIZE
*2,
117 SPA2_SIZE
= DIMM_SIZE
,
120 NUM_NFITS
= 2, /* permit testing multiple NFITs per system */
123 struct nfit_test_dcr
{
126 __u8 aperature
[BDW_SIZE
];
129 #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
130 (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
131 | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
133 static u32 handle
[] = {
134 [0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
135 [1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
136 [2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
137 [3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
138 [4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
139 [5] = NFIT_DIMM_HANDLE(1, 0, 0, 0, 0),
140 [6] = NFIT_DIMM_HANDLE(1, 0, 0, 0, 1),
143 static unsigned long dimm_fail_cmd_flags
[ARRAY_SIZE(handle
)];
144 static int dimm_fail_cmd_code
[ARRAY_SIZE(handle
)];
146 static const struct nd_intel_smart smart_def
= {
147 .flags
= ND_INTEL_SMART_HEALTH_VALID
148 | ND_INTEL_SMART_SPARES_VALID
149 | ND_INTEL_SMART_ALARM_VALID
150 | ND_INTEL_SMART_USED_VALID
151 | ND_INTEL_SMART_SHUTDOWN_VALID
152 | ND_INTEL_SMART_SHUTDOWN_COUNT_VALID
153 | ND_INTEL_SMART_MTEMP_VALID
154 | ND_INTEL_SMART_CTEMP_VALID
,
155 .health
= ND_INTEL_SMART_NON_CRITICAL_HEALTH
,
156 .media_temperature
= 23 * 16,
157 .ctrl_temperature
= 25 * 16,
158 .pmic_temperature
= 40 * 16,
160 .alarm_flags
= ND_INTEL_SMART_SPARE_TRIP
161 | ND_INTEL_SMART_TEMP_TRIP
,
165 .shutdown_count
= 42,
169 struct nfit_test_fw
{
170 enum intel_fw_update_state state
;
178 struct acpi_nfit_desc acpi_desc
;
179 struct platform_device pdev
;
180 struct list_head resources
;
189 dma_addr_t
*dimm_dma
;
191 dma_addr_t
*flush_dma
;
193 dma_addr_t
*label_dma
;
195 dma_addr_t
*spa_set_dma
;
196 struct nfit_test_dcr
**dcr
;
198 int (*alloc
)(struct nfit_test
*t
);
199 void (*setup
)(struct nfit_test
*t
);
201 union acpi_object
**_fit
;
204 struct nd_cmd_ars_status
*ars_status
;
205 unsigned long deadline
;
208 struct device
*dimm_dev
[ARRAY_SIZE(handle
)];
209 struct nd_intel_smart
*smart
;
210 struct nd_intel_smart_threshold
*smart_threshold
;
211 struct badrange badrange
;
212 struct work_struct work
;
213 struct nfit_test_fw
*fw
;
216 static struct workqueue_struct
*nfit_wq
;
218 static struct nfit_test
*to_nfit_test(struct device
*dev
)
220 struct platform_device
*pdev
= to_platform_device(dev
);
222 return container_of(pdev
, struct nfit_test
, pdev
);
225 static int nd_intel_test_get_fw_info(struct nfit_test
*t
,
226 struct nd_intel_fw_info
*nd_cmd
, unsigned int buf_len
,
229 struct device
*dev
= &t
->pdev
.dev
;
230 struct nfit_test_fw
*fw
= &t
->fw
[idx
];
232 dev_dbg(dev
, "%s(nfit_test: %p nd_cmd: %p, buf_len: %u, idx: %d\n",
233 __func__
, t
, nd_cmd
, buf_len
, idx
);
235 if (buf_len
< sizeof(*nd_cmd
))
239 nd_cmd
->storage_size
= INTEL_FW_STORAGE_SIZE
;
240 nd_cmd
->max_send_len
= INTEL_FW_MAX_SEND_LEN
;
241 nd_cmd
->query_interval
= INTEL_FW_QUERY_INTERVAL
;
242 nd_cmd
->max_query_time
= INTEL_FW_QUERY_MAX_TIME
;
243 nd_cmd
->update_cap
= 0;
244 nd_cmd
->fis_version
= INTEL_FW_FIS_VERSION
;
245 nd_cmd
->run_version
= 0;
246 nd_cmd
->updated_version
= fw
->version
;
251 static int nd_intel_test_start_update(struct nfit_test
*t
,
252 struct nd_intel_fw_start
*nd_cmd
, unsigned int buf_len
,
255 struct device
*dev
= &t
->pdev
.dev
;
256 struct nfit_test_fw
*fw
= &t
->fw
[idx
];
258 dev_dbg(dev
, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
259 __func__
, t
, nd_cmd
, buf_len
, idx
);
261 if (buf_len
< sizeof(*nd_cmd
))
264 if (fw
->state
!= FW_STATE_NEW
) {
265 /* extended status, FW update in progress */
266 nd_cmd
->status
= 0x10007;
270 fw
->state
= FW_STATE_IN_PROGRESS
;
272 fw
->size_received
= 0;
274 nd_cmd
->context
= fw
->context
;
276 dev_dbg(dev
, "%s: context issued: %#x\n", __func__
, nd_cmd
->context
);
281 static int nd_intel_test_send_data(struct nfit_test
*t
,
282 struct nd_intel_fw_send_data
*nd_cmd
, unsigned int buf_len
,
285 struct device
*dev
= &t
->pdev
.dev
;
286 struct nfit_test_fw
*fw
= &t
->fw
[idx
];
287 u32
*status
= (u32
*)&nd_cmd
->data
[nd_cmd
->length
];
289 dev_dbg(dev
, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
290 __func__
, t
, nd_cmd
, buf_len
, idx
);
292 if (buf_len
< sizeof(*nd_cmd
))
296 dev_dbg(dev
, "%s: cmd->status: %#x\n", __func__
, *status
);
297 dev_dbg(dev
, "%s: cmd->data[0]: %#x\n", __func__
, nd_cmd
->data
[0]);
298 dev_dbg(dev
, "%s: cmd->data[%u]: %#x\n", __func__
, nd_cmd
->length
-1,
299 nd_cmd
->data
[nd_cmd
->length
-1]);
301 if (fw
->state
!= FW_STATE_IN_PROGRESS
) {
302 dev_dbg(dev
, "%s: not in IN_PROGRESS state\n", __func__
);
307 if (nd_cmd
->context
!= fw
->context
) {
308 dev_dbg(dev
, "%s: incorrect context: in: %#x correct: %#x\n",
309 __func__
, nd_cmd
->context
, fw
->context
);
315 * check offset + len > size of fw storage
316 * check length is > max send length
318 if (nd_cmd
->offset
+ nd_cmd
->length
> INTEL_FW_STORAGE_SIZE
||
319 nd_cmd
->length
> INTEL_FW_MAX_SEND_LEN
) {
321 dev_dbg(dev
, "%s: buffer boundary violation\n", __func__
);
325 fw
->size_received
+= nd_cmd
->length
;
326 dev_dbg(dev
, "%s: copying %u bytes, %u bytes so far\n",
327 __func__
, nd_cmd
->length
, fw
->size_received
);
332 static int nd_intel_test_finish_fw(struct nfit_test
*t
,
333 struct nd_intel_fw_finish_update
*nd_cmd
,
334 unsigned int buf_len
, int idx
)
336 struct device
*dev
= &t
->pdev
.dev
;
337 struct nfit_test_fw
*fw
= &t
->fw
[idx
];
339 dev_dbg(dev
, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
340 __func__
, t
, nd_cmd
, buf_len
, idx
);
342 if (fw
->state
== FW_STATE_UPDATED
) {
343 /* update already done, need cold boot */
344 nd_cmd
->status
= 0x20007;
348 dev_dbg(dev
, "%s: context: %#x ctrl_flags: %#x\n",
349 __func__
, nd_cmd
->context
, nd_cmd
->ctrl_flags
);
351 switch (nd_cmd
->ctrl_flags
) {
353 if (nd_cmd
->context
!= fw
->context
) {
354 dev_dbg(dev
, "%s: incorrect context: in: %#x correct: %#x\n",
355 __func__
, nd_cmd
->context
,
357 nd_cmd
->status
= 0x10007;
361 fw
->state
= FW_STATE_VERIFY
;
362 /* set 1 second of time for firmware "update" */
363 fw
->end_time
= jiffies
+ HZ
;
367 fw
->size_received
= 0;
368 /* successfully aborted status */
369 nd_cmd
->status
= 0x40007;
370 fw
->state
= FW_STATE_NEW
;
371 dev_dbg(dev
, "%s: abort successful\n", __func__
);
374 default: /* bad control flag */
375 dev_warn(dev
, "%s: unknown control flag: %#x\n",
376 __func__
, nd_cmd
->ctrl_flags
);
383 static int nd_intel_test_finish_query(struct nfit_test
*t
,
384 struct nd_intel_fw_finish_query
*nd_cmd
,
385 unsigned int buf_len
, int idx
)
387 struct device
*dev
= &t
->pdev
.dev
;
388 struct nfit_test_fw
*fw
= &t
->fw
[idx
];
390 dev_dbg(dev
, "%s(nfit_test: %p nd_cmd: %p buf_len: %u idx: %d)\n",
391 __func__
, t
, nd_cmd
, buf_len
, idx
);
393 if (buf_len
< sizeof(*nd_cmd
))
396 if (nd_cmd
->context
!= fw
->context
) {
397 dev_dbg(dev
, "%s: incorrect context: in: %#x correct: %#x\n",
398 __func__
, nd_cmd
->context
, fw
->context
);
399 nd_cmd
->status
= 0x10007;
403 dev_dbg(dev
, "%s context: %#x\n", __func__
, nd_cmd
->context
);
407 nd_cmd
->updated_fw_rev
= 0;
409 dev_dbg(dev
, "%s: new state\n", __func__
);
412 case FW_STATE_IN_PROGRESS
:
413 /* sequencing error */
414 nd_cmd
->status
= 0x40007;
415 nd_cmd
->updated_fw_rev
= 0;
416 dev_dbg(dev
, "%s: sequence error\n", __func__
);
419 case FW_STATE_VERIFY
:
420 if (time_is_after_jiffies64(fw
->end_time
)) {
421 nd_cmd
->updated_fw_rev
= 0;
422 nd_cmd
->status
= 0x20007;
423 dev_dbg(dev
, "%s: still verifying\n", __func__
);
427 dev_dbg(dev
, "%s: transition out verify\n", __func__
);
428 fw
->state
= FW_STATE_UPDATED
;
429 /* we are going to fall through if it's "done" */
430 case FW_STATE_UPDATED
:
432 /* bogus test version */
433 fw
->version
= nd_cmd
->updated_fw_rev
=
434 INTEL_FW_FAKE_VERSION
;
435 dev_dbg(dev
, "%s: updated\n", __func__
);
438 default: /* we should never get here */
445 static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size
*nd_cmd
,
446 unsigned int buf_len
)
448 if (buf_len
< sizeof(*nd_cmd
))
452 nd_cmd
->config_size
= LABEL_SIZE
;
453 nd_cmd
->max_xfer
= SZ_4K
;
458 static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
459 *nd_cmd
, unsigned int buf_len
, void *label
)
461 unsigned int len
, offset
= nd_cmd
->in_offset
;
464 if (buf_len
< sizeof(*nd_cmd
))
466 if (offset
>= LABEL_SIZE
)
468 if (nd_cmd
->in_length
+ sizeof(*nd_cmd
) > buf_len
)
472 len
= min(nd_cmd
->in_length
, LABEL_SIZE
- offset
);
473 memcpy(nd_cmd
->out_buf
, label
+ offset
, len
);
474 rc
= buf_len
- sizeof(*nd_cmd
) - len
;
479 static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr
*nd_cmd
,
480 unsigned int buf_len
, void *label
)
482 unsigned int len
, offset
= nd_cmd
->in_offset
;
486 if (buf_len
< sizeof(*nd_cmd
))
488 if (offset
>= LABEL_SIZE
)
490 if (nd_cmd
->in_length
+ sizeof(*nd_cmd
) + 4 > buf_len
)
493 status
= (void *)nd_cmd
+ nd_cmd
->in_length
+ sizeof(*nd_cmd
);
495 len
= min(nd_cmd
->in_length
, LABEL_SIZE
- offset
);
496 memcpy(label
+ offset
, nd_cmd
->in_buf
, len
);
497 rc
= buf_len
- sizeof(*nd_cmd
) - (len
+ 4);
502 #define NFIT_TEST_CLEAR_ERR_UNIT 256
504 static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap
*nd_cmd
,
505 unsigned int buf_len
)
509 if (buf_len
< sizeof(*nd_cmd
))
512 /* for testing, only store up to n records that fit within 4k */
513 ars_recs
= SZ_4K
/ sizeof(struct nd_ars_record
);
515 nd_cmd
->max_ars_out
= sizeof(struct nd_cmd_ars_status
)
516 + ars_recs
* sizeof(struct nd_ars_record
);
517 nd_cmd
->status
= (ND_ARS_PERSISTENT
| ND_ARS_VOLATILE
) << 16;
518 nd_cmd
->clear_err_unit
= NFIT_TEST_CLEAR_ERR_UNIT
;
523 static void post_ars_status(struct ars_state
*ars_state
,
524 struct badrange
*badrange
, u64 addr
, u64 len
)
526 struct nd_cmd_ars_status
*ars_status
;
527 struct nd_ars_record
*ars_record
;
528 struct badrange_entry
*be
;
529 u64 end
= addr
+ len
- 1;
532 ars_state
->deadline
= jiffies
+ 1*HZ
;
533 ars_status
= ars_state
->ars_status
;
534 ars_status
->status
= 0;
535 ars_status
->address
= addr
;
536 ars_status
->length
= len
;
537 ars_status
->type
= ND_ARS_PERSISTENT
;
539 spin_lock(&badrange
->lock
);
540 list_for_each_entry(be
, &badrange
->list
, list
) {
541 u64 be_end
= be
->start
+ be
->length
- 1;
544 /* skip entries outside the range */
545 if (be_end
< addr
|| be
->start
> end
)
548 rstart
= (be
->start
< addr
) ? addr
: be
->start
;
549 rend
= (be_end
< end
) ? be_end
: end
;
550 ars_record
= &ars_status
->records
[i
];
551 ars_record
->handle
= 0;
552 ars_record
->err_address
= rstart
;
553 ars_record
->length
= rend
- rstart
+ 1;
556 spin_unlock(&badrange
->lock
);
557 ars_status
->num_records
= i
;
558 ars_status
->out_length
= sizeof(struct nd_cmd_ars_status
)
559 + i
* sizeof(struct nd_ars_record
);
562 static int nfit_test_cmd_ars_start(struct nfit_test
*t
,
563 struct ars_state
*ars_state
,
564 struct nd_cmd_ars_start
*ars_start
, unsigned int buf_len
,
567 if (buf_len
< sizeof(*ars_start
))
570 spin_lock(&ars_state
->lock
);
571 if (time_before(jiffies
, ars_state
->deadline
)) {
572 ars_start
->status
= NFIT_ARS_START_BUSY
;
575 ars_start
->status
= 0;
576 ars_start
->scrub_time
= 1;
577 post_ars_status(ars_state
, &t
->badrange
, ars_start
->address
,
581 spin_unlock(&ars_state
->lock
);
586 static int nfit_test_cmd_ars_status(struct ars_state
*ars_state
,
587 struct nd_cmd_ars_status
*ars_status
, unsigned int buf_len
,
590 if (buf_len
< ars_state
->ars_status
->out_length
)
593 spin_lock(&ars_state
->lock
);
594 if (time_before(jiffies
, ars_state
->deadline
)) {
595 memset(ars_status
, 0, buf_len
);
596 ars_status
->status
= NFIT_ARS_STATUS_BUSY
;
597 ars_status
->out_length
= sizeof(*ars_status
);
600 memcpy(ars_status
, ars_state
->ars_status
,
601 ars_state
->ars_status
->out_length
);
604 spin_unlock(&ars_state
->lock
);
608 static int nfit_test_cmd_clear_error(struct nfit_test
*t
,
609 struct nd_cmd_clear_error
*clear_err
,
610 unsigned int buf_len
, int *cmd_rc
)
612 const u64 mask
= NFIT_TEST_CLEAR_ERR_UNIT
- 1;
613 if (buf_len
< sizeof(*clear_err
))
616 if ((clear_err
->address
& mask
) || (clear_err
->length
& mask
))
619 badrange_forget(&t
->badrange
, clear_err
->address
, clear_err
->length
);
620 clear_err
->status
= 0;
621 clear_err
->cleared
= clear_err
->length
;
626 struct region_search_spa
{
628 struct nd_region
*region
;
631 static int is_region_device(struct device
*dev
)
633 return !strncmp(dev
->kobj
.name
, "region", 6);
636 static int nfit_test_search_region_spa(struct device
*dev
, void *data
)
638 struct region_search_spa
*ctx
= data
;
639 struct nd_region
*nd_region
;
640 resource_size_t ndr_end
;
642 if (!is_region_device(dev
))
645 nd_region
= to_nd_region(dev
);
646 ndr_end
= nd_region
->ndr_start
+ nd_region
->ndr_size
;
648 if (ctx
->addr
>= nd_region
->ndr_start
&& ctx
->addr
< ndr_end
) {
649 ctx
->region
= nd_region
;
656 static int nfit_test_search_spa(struct nvdimm_bus
*bus
,
657 struct nd_cmd_translate_spa
*spa
)
660 struct nd_region
*nd_region
= NULL
;
661 struct nvdimm
*nvdimm
= NULL
;
662 struct nd_mapping
*nd_mapping
= NULL
;
663 struct region_search_spa ctx
= {
669 ret
= device_for_each_child(&bus
->dev
, &ctx
,
670 nfit_test_search_region_spa
);
675 nd_region
= ctx
.region
;
677 dpa
= ctx
.addr
- nd_region
->ndr_start
;
680 * last dimm is selected for test
682 nd_mapping
= &nd_region
->mapping
[nd_region
->ndr_mappings
- 1];
683 nvdimm
= nd_mapping
->nvdimm
;
685 spa
->devices
[0].nfit_device_handle
= handle
[nvdimm
->id
];
686 spa
->num_nvdimms
= 1;
687 spa
->devices
[0].dpa
= dpa
;
692 static int nfit_test_cmd_translate_spa(struct nvdimm_bus
*bus
,
693 struct nd_cmd_translate_spa
*spa
, unsigned int buf_len
)
695 if (buf_len
< spa
->translate_length
)
698 if (nfit_test_search_spa(bus
, spa
) < 0 || !spa
->num_nvdimms
)
704 static int nfit_test_cmd_smart(struct nd_intel_smart
*smart
, unsigned int buf_len
,
705 struct nd_intel_smart
*smart_data
)
707 if (buf_len
< sizeof(*smart
))
709 memcpy(smart
, smart_data
, sizeof(*smart
));
713 static int nfit_test_cmd_smart_threshold(
714 struct nd_intel_smart_threshold
*out
,
715 unsigned int buf_len
,
716 struct nd_intel_smart_threshold
*smart_t
)
718 if (buf_len
< sizeof(*smart_t
))
720 memcpy(out
, smart_t
, sizeof(*smart_t
));
724 static void smart_notify(struct device
*bus_dev
,
725 struct device
*dimm_dev
, struct nd_intel_smart
*smart
,
726 struct nd_intel_smart_threshold
*thresh
)
728 dev_dbg(dimm_dev
, "%s: alarm: %#x spares: %d (%d) mtemp: %d (%d) ctemp: %d (%d)\n",
729 __func__
, thresh
->alarm_control
, thresh
->spares
,
730 smart
->spares
, thresh
->media_temperature
,
731 smart
->media_temperature
, thresh
->ctrl_temperature
,
732 smart
->ctrl_temperature
);
733 if (((thresh
->alarm_control
& ND_INTEL_SMART_SPARE_TRIP
)
736 || ((thresh
->alarm_control
& ND_INTEL_SMART_TEMP_TRIP
)
737 && smart
->media_temperature
738 >= thresh
->media_temperature
)
739 || ((thresh
->alarm_control
& ND_INTEL_SMART_CTEMP_TRIP
)
740 && smart
->ctrl_temperature
741 >= thresh
->ctrl_temperature
)
742 || (smart
->health
!= ND_INTEL_SMART_NON_CRITICAL_HEALTH
)
743 || (smart
->shutdown_state
!= 0)) {
744 device_lock(bus_dev
);
745 __acpi_nvdimm_notify(dimm_dev
, 0x81);
746 device_unlock(bus_dev
);
750 static int nfit_test_cmd_smart_set_threshold(
751 struct nd_intel_smart_set_threshold
*in
,
752 unsigned int buf_len
,
753 struct nd_intel_smart_threshold
*thresh
,
754 struct nd_intel_smart
*smart
,
755 struct device
*bus_dev
, struct device
*dimm_dev
)
759 size
= sizeof(*in
) - 4;
762 memcpy(thresh
->data
, in
, size
);
764 smart_notify(bus_dev
, dimm_dev
, smart
, thresh
);
769 static int nfit_test_cmd_smart_inject(
770 struct nd_intel_smart_inject
*inj
,
771 unsigned int buf_len
,
772 struct nd_intel_smart_threshold
*thresh
,
773 struct nd_intel_smart
*smart
,
774 struct device
*bus_dev
, struct device
*dimm_dev
)
776 if (buf_len
!= sizeof(*inj
))
779 if (inj
->flags
& ND_INTEL_SMART_INJECT_MTEMP
) {
780 if (inj
->mtemp_enable
)
781 smart
->media_temperature
= inj
->media_temperature
;
783 smart
->media_temperature
= smart_def
.media_temperature
;
785 if (inj
->flags
& ND_INTEL_SMART_INJECT_SPARE
) {
786 if (inj
->spare_enable
)
787 smart
->spares
= inj
->spares
;
789 smart
->spares
= smart_def
.spares
;
791 if (inj
->flags
& ND_INTEL_SMART_INJECT_FATAL
) {
792 if (inj
->fatal_enable
)
793 smart
->health
= ND_INTEL_SMART_FATAL_HEALTH
;
795 smart
->health
= ND_INTEL_SMART_NON_CRITICAL_HEALTH
;
797 if (inj
->flags
& ND_INTEL_SMART_INJECT_SHUTDOWN
) {
798 if (inj
->unsafe_shutdown_enable
) {
799 smart
->shutdown_state
= 1;
800 smart
->shutdown_count
++;
802 smart
->shutdown_state
= 0;
805 smart_notify(bus_dev
, dimm_dev
, smart
, thresh
);
810 static void uc_error_notify(struct work_struct
*work
)
812 struct nfit_test
*t
= container_of(work
, typeof(*t
), work
);
814 __acpi_nfit_notify(&t
->pdev
.dev
, t
, NFIT_NOTIFY_UC_MEMORY_ERROR
);
817 static int nfit_test_cmd_ars_error_inject(struct nfit_test
*t
,
818 struct nd_cmd_ars_err_inj
*err_inj
, unsigned int buf_len
)
822 if (buf_len
!= sizeof(*err_inj
)) {
827 if (err_inj
->err_inj_spa_range_length
<= 0) {
832 rc
= badrange_add(&t
->badrange
, err_inj
->err_inj_spa_range_base
,
833 err_inj
->err_inj_spa_range_length
);
837 if (err_inj
->err_inj_options
& (1 << ND_ARS_ERR_INJ_OPT_NOTIFY
))
838 queue_work(nfit_wq
, &t
->work
);
844 err_inj
->status
= NFIT_ARS_INJECT_INVALID
;
848 static int nfit_test_cmd_ars_inject_clear(struct nfit_test
*t
,
849 struct nd_cmd_ars_err_inj_clr
*err_clr
, unsigned int buf_len
)
853 if (buf_len
!= sizeof(*err_clr
)) {
858 if (err_clr
->err_inj_clr_spa_range_length
<= 0) {
863 badrange_forget(&t
->badrange
, err_clr
->err_inj_clr_spa_range_base
,
864 err_clr
->err_inj_clr_spa_range_length
);
870 err_clr
->status
= NFIT_ARS_INJECT_INVALID
;
874 static int nfit_test_cmd_ars_inject_status(struct nfit_test
*t
,
875 struct nd_cmd_ars_err_inj_stat
*err_stat
,
876 unsigned int buf_len
)
878 struct badrange_entry
*be
;
879 int max
= SZ_4K
/ sizeof(struct nd_error_stat_query_record
);
882 err_stat
->status
= 0;
883 spin_lock(&t
->badrange
.lock
);
884 list_for_each_entry(be
, &t
->badrange
.list
, list
) {
885 err_stat
->record
[i
].err_inj_stat_spa_range_base
= be
->start
;
886 err_stat
->record
[i
].err_inj_stat_spa_range_length
= be
->length
;
891 spin_unlock(&t
->badrange
.lock
);
892 err_stat
->inj_err_rec_count
= i
;
897 static int nd_intel_test_cmd_set_lss_status(struct nfit_test
*t
,
898 struct nd_intel_lss
*nd_cmd
, unsigned int buf_len
)
900 struct device
*dev
= &t
->pdev
.dev
;
902 if (buf_len
< sizeof(*nd_cmd
))
905 switch (nd_cmd
->enable
) {
908 dev_dbg(dev
, "%s: Latch System Shutdown Status disabled\n",
913 dev_dbg(dev
, "%s: Latch System Shutdown Status enabled\n",
917 dev_warn(dev
, "Unknown enable value: %#x\n", nd_cmd
->enable
);
918 nd_cmd
->status
= 0x3;
926 static int override_return_code(int dimm
, unsigned int func
, int rc
)
928 if ((1 << func
) & dimm_fail_cmd_flags
[dimm
]) {
929 if (dimm_fail_cmd_code
[dimm
])
930 return dimm_fail_cmd_code
[dimm
];
936 static int get_dimm(struct nfit_mem
*nfit_mem
, unsigned int func
)
940 /* lookup per-dimm data */
941 for (i
= 0; i
< ARRAY_SIZE(handle
); i
++)
942 if (__to_nfit_memdev(nfit_mem
)->device_handle
== handle
[i
])
944 if (i
>= ARRAY_SIZE(handle
))
949 static int nfit_test_ctl(struct nvdimm_bus_descriptor
*nd_desc
,
950 struct nvdimm
*nvdimm
, unsigned int cmd
, void *buf
,
951 unsigned int buf_len
, int *cmd_rc
)
953 struct acpi_nfit_desc
*acpi_desc
= to_acpi_desc(nd_desc
);
954 struct nfit_test
*t
= container_of(acpi_desc
, typeof(*t
), acpi_desc
);
955 unsigned int func
= cmd
;
956 int i
, rc
= 0, __cmd_rc
;
963 struct nfit_mem
*nfit_mem
= nvdimm_provider_data(nvdimm
);
964 unsigned long cmd_mask
= nvdimm_cmd_mask(nvdimm
);
969 if (cmd
== ND_CMD_CALL
) {
970 struct nd_cmd_pkg
*call_pkg
= buf
;
972 buf_len
= call_pkg
->nd_size_in
+ call_pkg
->nd_size_out
;
973 buf
= (void *) call_pkg
->nd_payload
;
974 func
= call_pkg
->nd_command
;
975 if (call_pkg
->nd_family
!= nfit_mem
->family
)
978 i
= get_dimm(nfit_mem
, func
);
983 case ND_INTEL_ENABLE_LSS_STATUS
:
984 rc
= nd_intel_test_cmd_set_lss_status(t
,
987 case ND_INTEL_FW_GET_INFO
:
988 rc
= nd_intel_test_get_fw_info(t
, buf
,
989 buf_len
, i
- t
->dcr_idx
);
991 case ND_INTEL_FW_START_UPDATE
:
992 rc
= nd_intel_test_start_update(t
, buf
,
993 buf_len
, i
- t
->dcr_idx
);
995 case ND_INTEL_FW_SEND_DATA
:
996 rc
= nd_intel_test_send_data(t
, buf
,
997 buf_len
, i
- t
->dcr_idx
);
999 case ND_INTEL_FW_FINISH_UPDATE
:
1000 rc
= nd_intel_test_finish_fw(t
, buf
,
1001 buf_len
, i
- t
->dcr_idx
);
1003 case ND_INTEL_FW_FINISH_QUERY
:
1004 rc
= nd_intel_test_finish_query(t
, buf
,
1005 buf_len
, i
- t
->dcr_idx
);
1007 case ND_INTEL_SMART
:
1008 rc
= nfit_test_cmd_smart(buf
, buf_len
,
1009 &t
->smart
[i
- t
->dcr_idx
]);
1011 case ND_INTEL_SMART_THRESHOLD
:
1012 rc
= nfit_test_cmd_smart_threshold(buf
,
1014 &t
->smart_threshold
[i
-
1017 case ND_INTEL_SMART_SET_THRESHOLD
:
1018 rc
= nfit_test_cmd_smart_set_threshold(buf
,
1020 &t
->smart_threshold
[i
-
1022 &t
->smart
[i
- t
->dcr_idx
],
1023 &t
->pdev
.dev
, t
->dimm_dev
[i
]);
1025 case ND_INTEL_SMART_INJECT
:
1026 rc
= nfit_test_cmd_smart_inject(buf
,
1028 &t
->smart_threshold
[i
-
1030 &t
->smart
[i
- t
->dcr_idx
],
1031 &t
->pdev
.dev
, t
->dimm_dev
[i
]);
1036 return override_return_code(i
, func
, rc
);
1039 if (!test_bit(cmd
, &cmd_mask
)
1040 || !test_bit(func
, &nfit_mem
->dsm_mask
))
1043 i
= get_dimm(nfit_mem
, func
);
1048 case ND_CMD_GET_CONFIG_SIZE
:
1049 rc
= nfit_test_cmd_get_config_size(buf
, buf_len
);
1051 case ND_CMD_GET_CONFIG_DATA
:
1052 rc
= nfit_test_cmd_get_config_data(buf
, buf_len
,
1053 t
->label
[i
- t
->dcr_idx
]);
1055 case ND_CMD_SET_CONFIG_DATA
:
1056 rc
= nfit_test_cmd_set_config_data(buf
, buf_len
,
1057 t
->label
[i
- t
->dcr_idx
]);
1062 return override_return_code(i
, func
, rc
);
1064 struct ars_state
*ars_state
= &t
->ars_state
;
1065 struct nd_cmd_pkg
*call_pkg
= buf
;
1070 if (cmd
== ND_CMD_CALL
) {
1071 func
= call_pkg
->nd_command
;
1073 buf_len
= call_pkg
->nd_size_in
+ call_pkg
->nd_size_out
;
1074 buf
= (void *) call_pkg
->nd_payload
;
1077 case NFIT_CMD_TRANSLATE_SPA
:
1078 rc
= nfit_test_cmd_translate_spa(
1079 acpi_desc
->nvdimm_bus
, buf
, buf_len
);
1081 case NFIT_CMD_ARS_INJECT_SET
:
1082 rc
= nfit_test_cmd_ars_error_inject(t
, buf
,
1085 case NFIT_CMD_ARS_INJECT_CLEAR
:
1086 rc
= nfit_test_cmd_ars_inject_clear(t
, buf
,
1089 case NFIT_CMD_ARS_INJECT_GET
:
1090 rc
= nfit_test_cmd_ars_inject_status(t
, buf
,
1098 if (!nd_desc
|| !test_bit(cmd
, &nd_desc
->cmd_mask
))
1102 case ND_CMD_ARS_CAP
:
1103 rc
= nfit_test_cmd_ars_cap(buf
, buf_len
);
1105 case ND_CMD_ARS_START
:
1106 rc
= nfit_test_cmd_ars_start(t
, ars_state
, buf
,
1109 case ND_CMD_ARS_STATUS
:
1110 rc
= nfit_test_cmd_ars_status(ars_state
, buf
, buf_len
,
1113 case ND_CMD_CLEAR_ERROR
:
1114 rc
= nfit_test_cmd_clear_error(t
, buf
, buf_len
, cmd_rc
);
1124 static DEFINE_SPINLOCK(nfit_test_lock
);
1125 static struct nfit_test
*instances
[NUM_NFITS
];
1127 static void release_nfit_res(void *data
)
1129 struct nfit_test_resource
*nfit_res
= data
;
1131 spin_lock(&nfit_test_lock
);
1132 list_del(&nfit_res
->list
);
1133 spin_unlock(&nfit_test_lock
);
1135 vfree(nfit_res
->buf
);
1139 static void *__test_alloc(struct nfit_test
*t
, size_t size
, dma_addr_t
*dma
,
1142 struct device
*dev
= &t
->pdev
.dev
;
1143 struct nfit_test_resource
*nfit_res
= kzalloc(sizeof(*nfit_res
),
1147 if (!buf
|| !nfit_res
)
1149 rc
= devm_add_action(dev
, release_nfit_res
, nfit_res
);
1152 INIT_LIST_HEAD(&nfit_res
->list
);
1153 memset(buf
, 0, size
);
1154 nfit_res
->dev
= dev
;
1155 nfit_res
->buf
= buf
;
1156 nfit_res
->res
.start
= *dma
;
1157 nfit_res
->res
.end
= *dma
+ size
- 1;
1158 nfit_res
->res
.name
= "NFIT";
1159 spin_lock_init(&nfit_res
->lock
);
1160 INIT_LIST_HEAD(&nfit_res
->requests
);
1161 spin_lock(&nfit_test_lock
);
1162 list_add(&nfit_res
->list
, &t
->resources
);
1163 spin_unlock(&nfit_test_lock
);
1165 return nfit_res
->buf
;
1173 static void *test_alloc(struct nfit_test
*t
, size_t size
, dma_addr_t
*dma
)
1175 void *buf
= vmalloc(size
);
1177 *dma
= (unsigned long) buf
;
1178 return __test_alloc(t
, size
, dma
, buf
);
1181 static struct nfit_test_resource
*nfit_test_lookup(resource_size_t addr
)
1185 for (i
= 0; i
< ARRAY_SIZE(instances
); i
++) {
1186 struct nfit_test_resource
*n
, *nfit_res
= NULL
;
1187 struct nfit_test
*t
= instances
[i
];
1191 spin_lock(&nfit_test_lock
);
1192 list_for_each_entry(n
, &t
->resources
, list
) {
1193 if (addr
>= n
->res
.start
&& (addr
< n
->res
.start
1194 + resource_size(&n
->res
))) {
1197 } else if (addr
>= (unsigned long) n
->buf
1198 && (addr
< (unsigned long) n
->buf
1199 + resource_size(&n
->res
))) {
1204 spin_unlock(&nfit_test_lock
);
1212 static int ars_state_init(struct device
*dev
, struct ars_state
*ars_state
)
1214 /* for testing, only store up to n records that fit within 4k */
1215 ars_state
->ars_status
= devm_kzalloc(dev
,
1216 sizeof(struct nd_cmd_ars_status
) + SZ_4K
, GFP_KERNEL
);
1217 if (!ars_state
->ars_status
)
1219 spin_lock_init(&ars_state
->lock
);
1223 static void put_dimms(void *data
)
1225 struct nfit_test
*t
= data
;
1228 for (i
= 0; i
< t
->num_dcr
; i
++)
1230 device_unregister(t
->dimm_dev
[i
]);
1233 static struct class *nfit_test_dimm
;
1235 static int dimm_name_to_id(struct device
*dev
)
1239 if (sscanf(dev_name(dev
), "test_dimm%d", &dimm
) != 1)
1244 static ssize_t
handle_show(struct device
*dev
, struct device_attribute
*attr
,
1247 int dimm
= dimm_name_to_id(dev
);
1252 return sprintf(buf
, "%#x\n", handle
[dimm
]);
1254 DEVICE_ATTR_RO(handle
);
1256 static ssize_t
fail_cmd_show(struct device
*dev
, struct device_attribute
*attr
,
1259 int dimm
= dimm_name_to_id(dev
);
1264 return sprintf(buf
, "%#lx\n", dimm_fail_cmd_flags
[dimm
]);
1267 static ssize_t
fail_cmd_store(struct device
*dev
, struct device_attribute
*attr
,
1268 const char *buf
, size_t size
)
1270 int dimm
= dimm_name_to_id(dev
);
1277 rc
= kstrtol(buf
, 0, &val
);
1281 dimm_fail_cmd_flags
[dimm
] = val
;
1284 static DEVICE_ATTR_RW(fail_cmd
);
1286 static ssize_t
fail_cmd_code_show(struct device
*dev
, struct device_attribute
*attr
,
1289 int dimm
= dimm_name_to_id(dev
);
1294 return sprintf(buf
, "%d\n", dimm_fail_cmd_code
[dimm
]);
1297 static ssize_t
fail_cmd_code_store(struct device
*dev
, struct device_attribute
*attr
,
1298 const char *buf
, size_t size
)
1300 int dimm
= dimm_name_to_id(dev
);
1307 rc
= kstrtol(buf
, 0, &val
);
1311 dimm_fail_cmd_code
[dimm
] = val
;
1314 static DEVICE_ATTR_RW(fail_cmd_code
);
1316 static struct attribute
*nfit_test_dimm_attributes
[] = {
1317 &dev_attr_fail_cmd
.attr
,
1318 &dev_attr_fail_cmd_code
.attr
,
1319 &dev_attr_handle
.attr
,
1323 static struct attribute_group nfit_test_dimm_attribute_group
= {
1324 .attrs
= nfit_test_dimm_attributes
,
1327 static const struct attribute_group
*nfit_test_dimm_attribute_groups
[] = {
1328 &nfit_test_dimm_attribute_group
,
1332 static int nfit_test_dimm_init(struct nfit_test
*t
)
1336 if (devm_add_action_or_reset(&t
->pdev
.dev
, put_dimms
, t
))
1338 for (i
= 0; i
< t
->num_dcr
; i
++) {
1339 t
->dimm_dev
[i
] = device_create_with_groups(nfit_test_dimm
,
1340 &t
->pdev
.dev
, 0, NULL
,
1341 nfit_test_dimm_attribute_groups
,
1342 "test_dimm%d", i
+ t
->dcr_idx
);
1343 if (!t
->dimm_dev
[i
])
1349 static void smart_init(struct nfit_test
*t
)
1352 const struct nd_intel_smart_threshold smart_t_data
= {
1353 .alarm_control
= ND_INTEL_SMART_SPARE_TRIP
1354 | ND_INTEL_SMART_TEMP_TRIP
,
1355 .media_temperature
= 40 * 16,
1356 .ctrl_temperature
= 30 * 16,
1360 for (i
= 0; i
< t
->num_dcr
; i
++) {
1361 memcpy(&t
->smart
[i
], &smart_def
, sizeof(smart_def
));
1362 memcpy(&t
->smart_threshold
[i
], &smart_t_data
,
1363 sizeof(smart_t_data
));
1367 static int nfit_test0_alloc(struct nfit_test
*t
)
1369 size_t nfit_size
= sizeof(struct acpi_nfit_system_address
) * NUM_SPA
1370 + sizeof(struct acpi_nfit_memory_map
) * NUM_MEM
1371 + sizeof(struct acpi_nfit_control_region
) * NUM_DCR
1372 + offsetof(struct acpi_nfit_control_region
,
1373 window_size
) * NUM_DCR
1374 + sizeof(struct acpi_nfit_data_region
) * NUM_BDW
1375 + (sizeof(struct acpi_nfit_flush_address
)
1376 + sizeof(u64
) * NUM_HINTS
) * NUM_DCR
1377 + sizeof(struct acpi_nfit_capabilities
);
1380 t
->nfit_buf
= test_alloc(t
, nfit_size
, &t
->nfit_dma
);
1383 t
->nfit_size
= nfit_size
;
1385 t
->spa_set
[0] = test_alloc(t
, SPA0_SIZE
, &t
->spa_set_dma
[0]);
1389 t
->spa_set
[1] = test_alloc(t
, SPA1_SIZE
, &t
->spa_set_dma
[1]);
1393 t
->spa_set
[2] = test_alloc(t
, SPA0_SIZE
, &t
->spa_set_dma
[2]);
1397 for (i
= 0; i
< t
->num_dcr
; i
++) {
1398 t
->dimm
[i
] = test_alloc(t
, DIMM_SIZE
, &t
->dimm_dma
[i
]);
1402 t
->label
[i
] = test_alloc(t
, LABEL_SIZE
, &t
->label_dma
[i
]);
1405 sprintf(t
->label
[i
], "label%d", i
);
1407 t
->flush
[i
] = test_alloc(t
, max(PAGE_SIZE
,
1408 sizeof(u64
) * NUM_HINTS
),
1414 for (i
= 0; i
< t
->num_dcr
; i
++) {
1415 t
->dcr
[i
] = test_alloc(t
, LABEL_SIZE
, &t
->dcr_dma
[i
]);
1420 t
->_fit
= test_alloc(t
, sizeof(union acpi_object
**), &t
->_fit_dma
);
1424 if (nfit_test_dimm_init(t
))
1427 return ars_state_init(&t
->pdev
.dev
, &t
->ars_state
);
1430 static int nfit_test1_alloc(struct nfit_test
*t
)
1432 size_t nfit_size
= sizeof(struct acpi_nfit_system_address
) * 2
1433 + sizeof(struct acpi_nfit_memory_map
) * 2
1434 + offsetof(struct acpi_nfit_control_region
, window_size
) * 2;
1437 t
->nfit_buf
= test_alloc(t
, nfit_size
, &t
->nfit_dma
);
1440 t
->nfit_size
= nfit_size
;
1442 t
->spa_set
[0] = test_alloc(t
, SPA2_SIZE
, &t
->spa_set_dma
[0]);
1446 for (i
= 0; i
< t
->num_dcr
; i
++) {
1447 t
->label
[i
] = test_alloc(t
, LABEL_SIZE
, &t
->label_dma
[i
]);
1450 sprintf(t
->label
[i
], "label%d", i
);
1453 t
->spa_set
[1] = test_alloc(t
, SPA_VCD_SIZE
, &t
->spa_set_dma
[1]);
1457 if (nfit_test_dimm_init(t
))
1460 return ars_state_init(&t
->pdev
.dev
, &t
->ars_state
);
1463 static void dcr_common_init(struct acpi_nfit_control_region
*dcr
)
1465 dcr
->vendor_id
= 0xabcd;
1467 dcr
->revision_id
= 1;
1468 dcr
->valid_fields
= 1;
1469 dcr
->manufacturing_location
= 0xa;
1470 dcr
->manufacturing_date
= cpu_to_be16(2016);
1473 static void nfit_test0_setup(struct nfit_test
*t
)
1475 const int flush_hint_size
= sizeof(struct acpi_nfit_flush_address
)
1476 + (sizeof(u64
) * NUM_HINTS
);
1477 struct acpi_nfit_desc
*acpi_desc
;
1478 struct acpi_nfit_memory_map
*memdev
;
1479 void *nfit_buf
= t
->nfit_buf
;
1480 struct acpi_nfit_system_address
*spa
;
1481 struct acpi_nfit_control_region
*dcr
;
1482 struct acpi_nfit_data_region
*bdw
;
1483 struct acpi_nfit_flush_address
*flush
;
1484 struct acpi_nfit_capabilities
*pcap
;
1485 unsigned int offset
= 0, i
;
1488 * spa0 (interleave first half of dimm0 and dimm1, note storage
1489 * does not actually alias the related block-data-window
1493 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1494 spa
->header
.length
= sizeof(*spa
);
1495 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_PM
), 16);
1496 spa
->range_index
= 0+1;
1497 spa
->address
= t
->spa_set_dma
[0];
1498 spa
->length
= SPA0_SIZE
;
1499 offset
+= spa
->header
.length
;
1502 * spa1 (interleave last half of the 4 DIMMS, note storage
1503 * does not actually alias the related block-data-window
1506 spa
= nfit_buf
+ offset
;
1507 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1508 spa
->header
.length
= sizeof(*spa
);
1509 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_PM
), 16);
1510 spa
->range_index
= 1+1;
1511 spa
->address
= t
->spa_set_dma
[1];
1512 spa
->length
= SPA1_SIZE
;
1513 offset
+= spa
->header
.length
;
1515 /* spa2 (dcr0) dimm0 */
1516 spa
= nfit_buf
+ offset
;
1517 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1518 spa
->header
.length
= sizeof(*spa
);
1519 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_DCR
), 16);
1520 spa
->range_index
= 2+1;
1521 spa
->address
= t
->dcr_dma
[0];
1522 spa
->length
= DCR_SIZE
;
1523 offset
+= spa
->header
.length
;
1525 /* spa3 (dcr1) dimm1 */
1526 spa
= nfit_buf
+ offset
;
1527 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1528 spa
->header
.length
= sizeof(*spa
);
1529 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_DCR
), 16);
1530 spa
->range_index
= 3+1;
1531 spa
->address
= t
->dcr_dma
[1];
1532 spa
->length
= DCR_SIZE
;
1533 offset
+= spa
->header
.length
;
1535 /* spa4 (dcr2) dimm2 */
1536 spa
= nfit_buf
+ offset
;
1537 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1538 spa
->header
.length
= sizeof(*spa
);
1539 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_DCR
), 16);
1540 spa
->range_index
= 4+1;
1541 spa
->address
= t
->dcr_dma
[2];
1542 spa
->length
= DCR_SIZE
;
1543 offset
+= spa
->header
.length
;
1545 /* spa5 (dcr3) dimm3 */
1546 spa
= nfit_buf
+ offset
;
1547 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1548 spa
->header
.length
= sizeof(*spa
);
1549 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_DCR
), 16);
1550 spa
->range_index
= 5+1;
1551 spa
->address
= t
->dcr_dma
[3];
1552 spa
->length
= DCR_SIZE
;
1553 offset
+= spa
->header
.length
;
1555 /* spa6 (bdw for dcr0) dimm0 */
1556 spa
= nfit_buf
+ offset
;
1557 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1558 spa
->header
.length
= sizeof(*spa
);
1559 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_BDW
), 16);
1560 spa
->range_index
= 6+1;
1561 spa
->address
= t
->dimm_dma
[0];
1562 spa
->length
= DIMM_SIZE
;
1563 offset
+= spa
->header
.length
;
1565 /* spa7 (bdw for dcr1) dimm1 */
1566 spa
= nfit_buf
+ offset
;
1567 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1568 spa
->header
.length
= sizeof(*spa
);
1569 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_BDW
), 16);
1570 spa
->range_index
= 7+1;
1571 spa
->address
= t
->dimm_dma
[1];
1572 spa
->length
= DIMM_SIZE
;
1573 offset
+= spa
->header
.length
;
1575 /* spa8 (bdw for dcr2) dimm2 */
1576 spa
= nfit_buf
+ offset
;
1577 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1578 spa
->header
.length
= sizeof(*spa
);
1579 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_BDW
), 16);
1580 spa
->range_index
= 8+1;
1581 spa
->address
= t
->dimm_dma
[2];
1582 spa
->length
= DIMM_SIZE
;
1583 offset
+= spa
->header
.length
;
1585 /* spa9 (bdw for dcr3) dimm3 */
1586 spa
= nfit_buf
+ offset
;
1587 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
1588 spa
->header
.length
= sizeof(*spa
);
1589 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_BDW
), 16);
1590 spa
->range_index
= 9+1;
1591 spa
->address
= t
->dimm_dma
[3];
1592 spa
->length
= DIMM_SIZE
;
1593 offset
+= spa
->header
.length
;
1595 /* mem-region0 (spa0, dimm0) */
1596 memdev
= nfit_buf
+ offset
;
1597 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1598 memdev
->header
.length
= sizeof(*memdev
);
1599 memdev
->device_handle
= handle
[0];
1600 memdev
->physical_id
= 0;
1601 memdev
->region_id
= 0;
1602 memdev
->range_index
= 0+1;
1603 memdev
->region_index
= 4+1;
1604 memdev
->region_size
= SPA0_SIZE
/2;
1605 memdev
->region_offset
= 1;
1606 memdev
->address
= 0;
1607 memdev
->interleave_index
= 0;
1608 memdev
->interleave_ways
= 2;
1609 offset
+= memdev
->header
.length
;
1611 /* mem-region1 (spa0, dimm1) */
1612 memdev
= nfit_buf
+ offset
;
1613 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1614 memdev
->header
.length
= sizeof(*memdev
);
1615 memdev
->device_handle
= handle
[1];
1616 memdev
->physical_id
= 1;
1617 memdev
->region_id
= 0;
1618 memdev
->range_index
= 0+1;
1619 memdev
->region_index
= 5+1;
1620 memdev
->region_size
= SPA0_SIZE
/2;
1621 memdev
->region_offset
= (1 << 8);
1622 memdev
->address
= 0;
1623 memdev
->interleave_index
= 0;
1624 memdev
->interleave_ways
= 2;
1625 memdev
->flags
= ACPI_NFIT_MEM_HEALTH_ENABLED
;
1626 offset
+= memdev
->header
.length
;
1628 /* mem-region2 (spa1, dimm0) */
1629 memdev
= nfit_buf
+ offset
;
1630 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1631 memdev
->header
.length
= sizeof(*memdev
);
1632 memdev
->device_handle
= handle
[0];
1633 memdev
->physical_id
= 0;
1634 memdev
->region_id
= 1;
1635 memdev
->range_index
= 1+1;
1636 memdev
->region_index
= 4+1;
1637 memdev
->region_size
= SPA1_SIZE
/4;
1638 memdev
->region_offset
= (1 << 16);
1639 memdev
->address
= SPA0_SIZE
/2;
1640 memdev
->interleave_index
= 0;
1641 memdev
->interleave_ways
= 4;
1642 memdev
->flags
= ACPI_NFIT_MEM_HEALTH_ENABLED
;
1643 offset
+= memdev
->header
.length
;
1645 /* mem-region3 (spa1, dimm1) */
1646 memdev
= nfit_buf
+ offset
;
1647 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1648 memdev
->header
.length
= sizeof(*memdev
);
1649 memdev
->device_handle
= handle
[1];
1650 memdev
->physical_id
= 1;
1651 memdev
->region_id
= 1;
1652 memdev
->range_index
= 1+1;
1653 memdev
->region_index
= 5+1;
1654 memdev
->region_size
= SPA1_SIZE
/4;
1655 memdev
->region_offset
= (1 << 24);
1656 memdev
->address
= SPA0_SIZE
/2;
1657 memdev
->interleave_index
= 0;
1658 memdev
->interleave_ways
= 4;
1659 offset
+= memdev
->header
.length
;
1661 /* mem-region4 (spa1, dimm2) */
1662 memdev
= nfit_buf
+ offset
;
1663 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1664 memdev
->header
.length
= sizeof(*memdev
);
1665 memdev
->device_handle
= handle
[2];
1666 memdev
->physical_id
= 2;
1667 memdev
->region_id
= 0;
1668 memdev
->range_index
= 1+1;
1669 memdev
->region_index
= 6+1;
1670 memdev
->region_size
= SPA1_SIZE
/4;
1671 memdev
->region_offset
= (1ULL << 32);
1672 memdev
->address
= SPA0_SIZE
/2;
1673 memdev
->interleave_index
= 0;
1674 memdev
->interleave_ways
= 4;
1675 memdev
->flags
= ACPI_NFIT_MEM_HEALTH_ENABLED
;
1676 offset
+= memdev
->header
.length
;
1678 /* mem-region5 (spa1, dimm3) */
1679 memdev
= nfit_buf
+ offset
;
1680 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1681 memdev
->header
.length
= sizeof(*memdev
);
1682 memdev
->device_handle
= handle
[3];
1683 memdev
->physical_id
= 3;
1684 memdev
->region_id
= 0;
1685 memdev
->range_index
= 1+1;
1686 memdev
->region_index
= 7+1;
1687 memdev
->region_size
= SPA1_SIZE
/4;
1688 memdev
->region_offset
= (1ULL << 40);
1689 memdev
->address
= SPA0_SIZE
/2;
1690 memdev
->interleave_index
= 0;
1691 memdev
->interleave_ways
= 4;
1692 offset
+= memdev
->header
.length
;
1694 /* mem-region6 (spa/dcr0, dimm0) */
1695 memdev
= nfit_buf
+ offset
;
1696 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1697 memdev
->header
.length
= sizeof(*memdev
);
1698 memdev
->device_handle
= handle
[0];
1699 memdev
->physical_id
= 0;
1700 memdev
->region_id
= 0;
1701 memdev
->range_index
= 2+1;
1702 memdev
->region_index
= 0+1;
1703 memdev
->region_size
= 0;
1704 memdev
->region_offset
= 0;
1705 memdev
->address
= 0;
1706 memdev
->interleave_index
= 0;
1707 memdev
->interleave_ways
= 1;
1708 offset
+= memdev
->header
.length
;
1710 /* mem-region7 (spa/dcr1, dimm1) */
1711 memdev
= nfit_buf
+ offset
;
1712 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1713 memdev
->header
.length
= sizeof(*memdev
);
1714 memdev
->device_handle
= handle
[1];
1715 memdev
->physical_id
= 1;
1716 memdev
->region_id
= 0;
1717 memdev
->range_index
= 3+1;
1718 memdev
->region_index
= 1+1;
1719 memdev
->region_size
= 0;
1720 memdev
->region_offset
= 0;
1721 memdev
->address
= 0;
1722 memdev
->interleave_index
= 0;
1723 memdev
->interleave_ways
= 1;
1724 offset
+= memdev
->header
.length
;
1726 /* mem-region8 (spa/dcr2, dimm2) */
1727 memdev
= nfit_buf
+ offset
;
1728 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1729 memdev
->header
.length
= sizeof(*memdev
);
1730 memdev
->device_handle
= handle
[2];
1731 memdev
->physical_id
= 2;
1732 memdev
->region_id
= 0;
1733 memdev
->range_index
= 4+1;
1734 memdev
->region_index
= 2+1;
1735 memdev
->region_size
= 0;
1736 memdev
->region_offset
= 0;
1737 memdev
->address
= 0;
1738 memdev
->interleave_index
= 0;
1739 memdev
->interleave_ways
= 1;
1740 offset
+= memdev
->header
.length
;
1742 /* mem-region9 (spa/dcr3, dimm3) */
1743 memdev
= nfit_buf
+ offset
;
1744 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1745 memdev
->header
.length
= sizeof(*memdev
);
1746 memdev
->device_handle
= handle
[3];
1747 memdev
->physical_id
= 3;
1748 memdev
->region_id
= 0;
1749 memdev
->range_index
= 5+1;
1750 memdev
->region_index
= 3+1;
1751 memdev
->region_size
= 0;
1752 memdev
->region_offset
= 0;
1753 memdev
->address
= 0;
1754 memdev
->interleave_index
= 0;
1755 memdev
->interleave_ways
= 1;
1756 offset
+= memdev
->header
.length
;
1758 /* mem-region10 (spa/bdw0, dimm0) */
1759 memdev
= nfit_buf
+ offset
;
1760 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1761 memdev
->header
.length
= sizeof(*memdev
);
1762 memdev
->device_handle
= handle
[0];
1763 memdev
->physical_id
= 0;
1764 memdev
->region_id
= 0;
1765 memdev
->range_index
= 6+1;
1766 memdev
->region_index
= 0+1;
1767 memdev
->region_size
= 0;
1768 memdev
->region_offset
= 0;
1769 memdev
->address
= 0;
1770 memdev
->interleave_index
= 0;
1771 memdev
->interleave_ways
= 1;
1772 offset
+= memdev
->header
.length
;
1774 /* mem-region11 (spa/bdw1, dimm1) */
1775 memdev
= nfit_buf
+ offset
;
1776 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1777 memdev
->header
.length
= sizeof(*memdev
);
1778 memdev
->device_handle
= handle
[1];
1779 memdev
->physical_id
= 1;
1780 memdev
->region_id
= 0;
1781 memdev
->range_index
= 7+1;
1782 memdev
->region_index
= 1+1;
1783 memdev
->region_size
= 0;
1784 memdev
->region_offset
= 0;
1785 memdev
->address
= 0;
1786 memdev
->interleave_index
= 0;
1787 memdev
->interleave_ways
= 1;
1788 offset
+= memdev
->header
.length
;
1790 /* mem-region12 (spa/bdw2, dimm2) */
1791 memdev
= nfit_buf
+ offset
;
1792 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1793 memdev
->header
.length
= sizeof(*memdev
);
1794 memdev
->device_handle
= handle
[2];
1795 memdev
->physical_id
= 2;
1796 memdev
->region_id
= 0;
1797 memdev
->range_index
= 8+1;
1798 memdev
->region_index
= 2+1;
1799 memdev
->region_size
= 0;
1800 memdev
->region_offset
= 0;
1801 memdev
->address
= 0;
1802 memdev
->interleave_index
= 0;
1803 memdev
->interleave_ways
= 1;
1804 offset
+= memdev
->header
.length
;
1806 /* mem-region13 (spa/dcr3, dimm3) */
1807 memdev
= nfit_buf
+ offset
;
1808 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
1809 memdev
->header
.length
= sizeof(*memdev
);
1810 memdev
->device_handle
= handle
[3];
1811 memdev
->physical_id
= 3;
1812 memdev
->region_id
= 0;
1813 memdev
->range_index
= 9+1;
1814 memdev
->region_index
= 3+1;
1815 memdev
->region_size
= 0;
1816 memdev
->region_offset
= 0;
1817 memdev
->address
= 0;
1818 memdev
->interleave_index
= 0;
1819 memdev
->interleave_ways
= 1;
1820 memdev
->flags
= ACPI_NFIT_MEM_HEALTH_ENABLED
;
1821 offset
+= memdev
->header
.length
;
1823 /* dcr-descriptor0: blk */
1824 dcr
= nfit_buf
+ offset
;
1825 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1826 dcr
->header
.length
= sizeof(*dcr
);
1827 dcr
->region_index
= 0+1;
1828 dcr_common_init(dcr
);
1829 dcr
->serial_number
= ~handle
[0];
1830 dcr
->code
= NFIT_FIC_BLK
;
1832 dcr
->window_size
= DCR_SIZE
;
1833 dcr
->command_offset
= 0;
1834 dcr
->command_size
= 8;
1835 dcr
->status_offset
= 8;
1836 dcr
->status_size
= 4;
1837 offset
+= dcr
->header
.length
;
1839 /* dcr-descriptor1: blk */
1840 dcr
= nfit_buf
+ offset
;
1841 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1842 dcr
->header
.length
= sizeof(*dcr
);
1843 dcr
->region_index
= 1+1;
1844 dcr_common_init(dcr
);
1845 dcr
->serial_number
= ~handle
[1];
1846 dcr
->code
= NFIT_FIC_BLK
;
1848 dcr
->window_size
= DCR_SIZE
;
1849 dcr
->command_offset
= 0;
1850 dcr
->command_size
= 8;
1851 dcr
->status_offset
= 8;
1852 dcr
->status_size
= 4;
1853 offset
+= dcr
->header
.length
;
1855 /* dcr-descriptor2: blk */
1856 dcr
= nfit_buf
+ offset
;
1857 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1858 dcr
->header
.length
= sizeof(*dcr
);
1859 dcr
->region_index
= 2+1;
1860 dcr_common_init(dcr
);
1861 dcr
->serial_number
= ~handle
[2];
1862 dcr
->code
= NFIT_FIC_BLK
;
1864 dcr
->window_size
= DCR_SIZE
;
1865 dcr
->command_offset
= 0;
1866 dcr
->command_size
= 8;
1867 dcr
->status_offset
= 8;
1868 dcr
->status_size
= 4;
1869 offset
+= dcr
->header
.length
;
1871 /* dcr-descriptor3: blk */
1872 dcr
= nfit_buf
+ offset
;
1873 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1874 dcr
->header
.length
= sizeof(*dcr
);
1875 dcr
->region_index
= 3+1;
1876 dcr_common_init(dcr
);
1877 dcr
->serial_number
= ~handle
[3];
1878 dcr
->code
= NFIT_FIC_BLK
;
1880 dcr
->window_size
= DCR_SIZE
;
1881 dcr
->command_offset
= 0;
1882 dcr
->command_size
= 8;
1883 dcr
->status_offset
= 8;
1884 dcr
->status_size
= 4;
1885 offset
+= dcr
->header
.length
;
1887 /* dcr-descriptor0: pmem */
1888 dcr
= nfit_buf
+ offset
;
1889 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1890 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
1892 dcr
->region_index
= 4+1;
1893 dcr_common_init(dcr
);
1894 dcr
->serial_number
= ~handle
[0];
1895 dcr
->code
= NFIT_FIC_BYTEN
;
1897 offset
+= dcr
->header
.length
;
1899 /* dcr-descriptor1: pmem */
1900 dcr
= nfit_buf
+ offset
;
1901 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1902 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
1904 dcr
->region_index
= 5+1;
1905 dcr_common_init(dcr
);
1906 dcr
->serial_number
= ~handle
[1];
1907 dcr
->code
= NFIT_FIC_BYTEN
;
1909 offset
+= dcr
->header
.length
;
1911 /* dcr-descriptor2: pmem */
1912 dcr
= nfit_buf
+ offset
;
1913 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1914 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
1916 dcr
->region_index
= 6+1;
1917 dcr_common_init(dcr
);
1918 dcr
->serial_number
= ~handle
[2];
1919 dcr
->code
= NFIT_FIC_BYTEN
;
1921 offset
+= dcr
->header
.length
;
1923 /* dcr-descriptor3: pmem */
1924 dcr
= nfit_buf
+ offset
;
1925 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
1926 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
1928 dcr
->region_index
= 7+1;
1929 dcr_common_init(dcr
);
1930 dcr
->serial_number
= ~handle
[3];
1931 dcr
->code
= NFIT_FIC_BYTEN
;
1933 offset
+= dcr
->header
.length
;
1935 /* bdw0 (spa/dcr0, dimm0) */
1936 bdw
= nfit_buf
+ offset
;
1937 bdw
->header
.type
= ACPI_NFIT_TYPE_DATA_REGION
;
1938 bdw
->header
.length
= sizeof(*bdw
);
1939 bdw
->region_index
= 0+1;
1942 bdw
->size
= BDW_SIZE
;
1943 bdw
->capacity
= DIMM_SIZE
;
1944 bdw
->start_address
= 0;
1945 offset
+= bdw
->header
.length
;
1947 /* bdw1 (spa/dcr1, dimm1) */
1948 bdw
= nfit_buf
+ offset
;
1949 bdw
->header
.type
= ACPI_NFIT_TYPE_DATA_REGION
;
1950 bdw
->header
.length
= sizeof(*bdw
);
1951 bdw
->region_index
= 1+1;
1954 bdw
->size
= BDW_SIZE
;
1955 bdw
->capacity
= DIMM_SIZE
;
1956 bdw
->start_address
= 0;
1957 offset
+= bdw
->header
.length
;
1959 /* bdw2 (spa/dcr2, dimm2) */
1960 bdw
= nfit_buf
+ offset
;
1961 bdw
->header
.type
= ACPI_NFIT_TYPE_DATA_REGION
;
1962 bdw
->header
.length
= sizeof(*bdw
);
1963 bdw
->region_index
= 2+1;
1966 bdw
->size
= BDW_SIZE
;
1967 bdw
->capacity
= DIMM_SIZE
;
1968 bdw
->start_address
= 0;
1969 offset
+= bdw
->header
.length
;
1971 /* bdw3 (spa/dcr3, dimm3) */
1972 bdw
= nfit_buf
+ offset
;
1973 bdw
->header
.type
= ACPI_NFIT_TYPE_DATA_REGION
;
1974 bdw
->header
.length
= sizeof(*bdw
);
1975 bdw
->region_index
= 3+1;
1978 bdw
->size
= BDW_SIZE
;
1979 bdw
->capacity
= DIMM_SIZE
;
1980 bdw
->start_address
= 0;
1981 offset
+= bdw
->header
.length
;
1983 /* flush0 (dimm0) */
1984 flush
= nfit_buf
+ offset
;
1985 flush
->header
.type
= ACPI_NFIT_TYPE_FLUSH_ADDRESS
;
1986 flush
->header
.length
= flush_hint_size
;
1987 flush
->device_handle
= handle
[0];
1988 flush
->hint_count
= NUM_HINTS
;
1989 for (i
= 0; i
< NUM_HINTS
; i
++)
1990 flush
->hint_address
[i
] = t
->flush_dma
[0] + i
* sizeof(u64
);
1991 offset
+= flush
->header
.length
;
1993 /* flush1 (dimm1) */
1994 flush
= nfit_buf
+ offset
;
1995 flush
->header
.type
= ACPI_NFIT_TYPE_FLUSH_ADDRESS
;
1996 flush
->header
.length
= flush_hint_size
;
1997 flush
->device_handle
= handle
[1];
1998 flush
->hint_count
= NUM_HINTS
;
1999 for (i
= 0; i
< NUM_HINTS
; i
++)
2000 flush
->hint_address
[i
] = t
->flush_dma
[1] + i
* sizeof(u64
);
2001 offset
+= flush
->header
.length
;
2003 /* flush2 (dimm2) */
2004 flush
= nfit_buf
+ offset
;
2005 flush
->header
.type
= ACPI_NFIT_TYPE_FLUSH_ADDRESS
;
2006 flush
->header
.length
= flush_hint_size
;
2007 flush
->device_handle
= handle
[2];
2008 flush
->hint_count
= NUM_HINTS
;
2009 for (i
= 0; i
< NUM_HINTS
; i
++)
2010 flush
->hint_address
[i
] = t
->flush_dma
[2] + i
* sizeof(u64
);
2011 offset
+= flush
->header
.length
;
2013 /* flush3 (dimm3) */
2014 flush
= nfit_buf
+ offset
;
2015 flush
->header
.type
= ACPI_NFIT_TYPE_FLUSH_ADDRESS
;
2016 flush
->header
.length
= flush_hint_size
;
2017 flush
->device_handle
= handle
[3];
2018 flush
->hint_count
= NUM_HINTS
;
2019 for (i
= 0; i
< NUM_HINTS
; i
++)
2020 flush
->hint_address
[i
] = t
->flush_dma
[3] + i
* sizeof(u64
);
2021 offset
+= flush
->header
.length
;
2023 /* platform capabilities */
2024 pcap
= nfit_buf
+ offset
;
2025 pcap
->header
.type
= ACPI_NFIT_TYPE_CAPABILITIES
;
2026 pcap
->header
.length
= sizeof(*pcap
);
2027 pcap
->highest_capability
= 1;
2028 pcap
->capabilities
= ACPI_NFIT_CAPABILITY_MEM_FLUSH
;
2029 offset
+= pcap
->header
.length
;
2031 if (t
->setup_hotplug
) {
2032 /* dcr-descriptor4: blk */
2033 dcr
= nfit_buf
+ offset
;
2034 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
2035 dcr
->header
.length
= sizeof(*dcr
);
2036 dcr
->region_index
= 8+1;
2037 dcr_common_init(dcr
);
2038 dcr
->serial_number
= ~handle
[4];
2039 dcr
->code
= NFIT_FIC_BLK
;
2041 dcr
->window_size
= DCR_SIZE
;
2042 dcr
->command_offset
= 0;
2043 dcr
->command_size
= 8;
2044 dcr
->status_offset
= 8;
2045 dcr
->status_size
= 4;
2046 offset
+= dcr
->header
.length
;
2048 /* dcr-descriptor4: pmem */
2049 dcr
= nfit_buf
+ offset
;
2050 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
2051 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
2053 dcr
->region_index
= 9+1;
2054 dcr_common_init(dcr
);
2055 dcr
->serial_number
= ~handle
[4];
2056 dcr
->code
= NFIT_FIC_BYTEN
;
2058 offset
+= dcr
->header
.length
;
2060 /* bdw4 (spa/dcr4, dimm4) */
2061 bdw
= nfit_buf
+ offset
;
2062 bdw
->header
.type
= ACPI_NFIT_TYPE_DATA_REGION
;
2063 bdw
->header
.length
= sizeof(*bdw
);
2064 bdw
->region_index
= 8+1;
2067 bdw
->size
= BDW_SIZE
;
2068 bdw
->capacity
= DIMM_SIZE
;
2069 bdw
->start_address
= 0;
2070 offset
+= bdw
->header
.length
;
2072 /* spa10 (dcr4) dimm4 */
2073 spa
= nfit_buf
+ offset
;
2074 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
2075 spa
->header
.length
= sizeof(*spa
);
2076 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_DCR
), 16);
2077 spa
->range_index
= 10+1;
2078 spa
->address
= t
->dcr_dma
[4];
2079 spa
->length
= DCR_SIZE
;
2080 offset
+= spa
->header
.length
;
2083 * spa11 (single-dimm interleave for hotplug, note storage
2084 * does not actually alias the related block-data-window
2087 spa
= nfit_buf
+ offset
;
2088 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
2089 spa
->header
.length
= sizeof(*spa
);
2090 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_PM
), 16);
2091 spa
->range_index
= 11+1;
2092 spa
->address
= t
->spa_set_dma
[2];
2093 spa
->length
= SPA0_SIZE
;
2094 offset
+= spa
->header
.length
;
2096 /* spa12 (bdw for dcr4) dimm4 */
2097 spa
= nfit_buf
+ offset
;
2098 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
2099 spa
->header
.length
= sizeof(*spa
);
2100 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_BDW
), 16);
2101 spa
->range_index
= 12+1;
2102 spa
->address
= t
->dimm_dma
[4];
2103 spa
->length
= DIMM_SIZE
;
2104 offset
+= spa
->header
.length
;
2106 /* mem-region14 (spa/dcr4, dimm4) */
2107 memdev
= nfit_buf
+ offset
;
2108 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
2109 memdev
->header
.length
= sizeof(*memdev
);
2110 memdev
->device_handle
= handle
[4];
2111 memdev
->physical_id
= 4;
2112 memdev
->region_id
= 0;
2113 memdev
->range_index
= 10+1;
2114 memdev
->region_index
= 8+1;
2115 memdev
->region_size
= 0;
2116 memdev
->region_offset
= 0;
2117 memdev
->address
= 0;
2118 memdev
->interleave_index
= 0;
2119 memdev
->interleave_ways
= 1;
2120 offset
+= memdev
->header
.length
;
2122 /* mem-region15 (spa11, dimm4) */
2123 memdev
= nfit_buf
+ offset
;
2124 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
2125 memdev
->header
.length
= sizeof(*memdev
);
2126 memdev
->device_handle
= handle
[4];
2127 memdev
->physical_id
= 4;
2128 memdev
->region_id
= 0;
2129 memdev
->range_index
= 11+1;
2130 memdev
->region_index
= 9+1;
2131 memdev
->region_size
= SPA0_SIZE
;
2132 memdev
->region_offset
= (1ULL << 48);
2133 memdev
->address
= 0;
2134 memdev
->interleave_index
= 0;
2135 memdev
->interleave_ways
= 1;
2136 memdev
->flags
= ACPI_NFIT_MEM_HEALTH_ENABLED
;
2137 offset
+= memdev
->header
.length
;
2139 /* mem-region16 (spa/bdw4, dimm4) */
2140 memdev
= nfit_buf
+ offset
;
2141 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
2142 memdev
->header
.length
= sizeof(*memdev
);
2143 memdev
->device_handle
= handle
[4];
2144 memdev
->physical_id
= 4;
2145 memdev
->region_id
= 0;
2146 memdev
->range_index
= 12+1;
2147 memdev
->region_index
= 8+1;
2148 memdev
->region_size
= 0;
2149 memdev
->region_offset
= 0;
2150 memdev
->address
= 0;
2151 memdev
->interleave_index
= 0;
2152 memdev
->interleave_ways
= 1;
2153 offset
+= memdev
->header
.length
;
2155 /* flush3 (dimm4) */
2156 flush
= nfit_buf
+ offset
;
2157 flush
->header
.type
= ACPI_NFIT_TYPE_FLUSH_ADDRESS
;
2158 flush
->header
.length
= flush_hint_size
;
2159 flush
->device_handle
= handle
[4];
2160 flush
->hint_count
= NUM_HINTS
;
2161 for (i
= 0; i
< NUM_HINTS
; i
++)
2162 flush
->hint_address
[i
] = t
->flush_dma
[4]
2164 offset
+= flush
->header
.length
;
2166 /* sanity check to make sure we've filled the buffer */
2167 WARN_ON(offset
!= t
->nfit_size
);
2170 t
->nfit_filled
= offset
;
2172 post_ars_status(&t
->ars_state
, &t
->badrange
, t
->spa_set_dma
[0],
2175 acpi_desc
= &t
->acpi_desc
;
2176 set_bit(ND_CMD_GET_CONFIG_SIZE
, &acpi_desc
->dimm_cmd_force_en
);
2177 set_bit(ND_CMD_GET_CONFIG_DATA
, &acpi_desc
->dimm_cmd_force_en
);
2178 set_bit(ND_CMD_SET_CONFIG_DATA
, &acpi_desc
->dimm_cmd_force_en
);
2179 set_bit(ND_INTEL_SMART
, &acpi_desc
->dimm_cmd_force_en
);
2180 set_bit(ND_INTEL_SMART_THRESHOLD
, &acpi_desc
->dimm_cmd_force_en
);
2181 set_bit(ND_INTEL_SMART_SET_THRESHOLD
, &acpi_desc
->dimm_cmd_force_en
);
2182 set_bit(ND_INTEL_SMART_INJECT
, &acpi_desc
->dimm_cmd_force_en
);
2183 set_bit(ND_CMD_ARS_CAP
, &acpi_desc
->bus_cmd_force_en
);
2184 set_bit(ND_CMD_ARS_START
, &acpi_desc
->bus_cmd_force_en
);
2185 set_bit(ND_CMD_ARS_STATUS
, &acpi_desc
->bus_cmd_force_en
);
2186 set_bit(ND_CMD_CLEAR_ERROR
, &acpi_desc
->bus_cmd_force_en
);
2187 set_bit(ND_CMD_CALL
, &acpi_desc
->bus_cmd_force_en
);
2188 set_bit(NFIT_CMD_TRANSLATE_SPA
, &acpi_desc
->bus_nfit_cmd_force_en
);
2189 set_bit(NFIT_CMD_ARS_INJECT_SET
, &acpi_desc
->bus_nfit_cmd_force_en
);
2190 set_bit(NFIT_CMD_ARS_INJECT_CLEAR
, &acpi_desc
->bus_nfit_cmd_force_en
);
2191 set_bit(NFIT_CMD_ARS_INJECT_GET
, &acpi_desc
->bus_nfit_cmd_force_en
);
2192 set_bit(ND_INTEL_FW_GET_INFO
, &acpi_desc
->dimm_cmd_force_en
);
2193 set_bit(ND_INTEL_FW_START_UPDATE
, &acpi_desc
->dimm_cmd_force_en
);
2194 set_bit(ND_INTEL_FW_SEND_DATA
, &acpi_desc
->dimm_cmd_force_en
);
2195 set_bit(ND_INTEL_FW_FINISH_UPDATE
, &acpi_desc
->dimm_cmd_force_en
);
2196 set_bit(ND_INTEL_FW_FINISH_QUERY
, &acpi_desc
->dimm_cmd_force_en
);
2197 set_bit(ND_INTEL_ENABLE_LSS_STATUS
, &acpi_desc
->dimm_cmd_force_en
);
2200 static void nfit_test1_setup(struct nfit_test
*t
)
2203 void *nfit_buf
= t
->nfit_buf
;
2204 struct acpi_nfit_memory_map
*memdev
;
2205 struct acpi_nfit_control_region
*dcr
;
2206 struct acpi_nfit_system_address
*spa
;
2207 struct acpi_nfit_desc
*acpi_desc
;
2210 /* spa0 (flat range with no bdw aliasing) */
2211 spa
= nfit_buf
+ offset
;
2212 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
2213 spa
->header
.length
= sizeof(*spa
);
2214 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_PM
), 16);
2215 spa
->range_index
= 0+1;
2216 spa
->address
= t
->spa_set_dma
[0];
2217 spa
->length
= SPA2_SIZE
;
2218 offset
+= spa
->header
.length
;
2220 /* virtual cd region */
2221 spa
= nfit_buf
+ offset
;
2222 spa
->header
.type
= ACPI_NFIT_TYPE_SYSTEM_ADDRESS
;
2223 spa
->header
.length
= sizeof(*spa
);
2224 memcpy(spa
->range_guid
, to_nfit_uuid(NFIT_SPA_VCD
), 16);
2225 spa
->range_index
= 0;
2226 spa
->address
= t
->spa_set_dma
[1];
2227 spa
->length
= SPA_VCD_SIZE
;
2228 offset
+= spa
->header
.length
;
2230 /* mem-region0 (spa0, dimm0) */
2231 memdev
= nfit_buf
+ offset
;
2232 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
2233 memdev
->header
.length
= sizeof(*memdev
);
2234 memdev
->device_handle
= handle
[5];
2235 memdev
->physical_id
= 0;
2236 memdev
->region_id
= 0;
2237 memdev
->range_index
= 0+1;
2238 memdev
->region_index
= 0+1;
2239 memdev
->region_size
= SPA2_SIZE
;
2240 memdev
->region_offset
= 0;
2241 memdev
->address
= 0;
2242 memdev
->interleave_index
= 0;
2243 memdev
->interleave_ways
= 1;
2244 memdev
->flags
= ACPI_NFIT_MEM_SAVE_FAILED
| ACPI_NFIT_MEM_RESTORE_FAILED
2245 | ACPI_NFIT_MEM_FLUSH_FAILED
| ACPI_NFIT_MEM_HEALTH_OBSERVED
2246 | ACPI_NFIT_MEM_NOT_ARMED
;
2247 offset
+= memdev
->header
.length
;
2249 /* dcr-descriptor0 */
2250 dcr
= nfit_buf
+ offset
;
2251 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
2252 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
2254 dcr
->region_index
= 0+1;
2255 dcr_common_init(dcr
);
2256 dcr
->serial_number
= ~handle
[5];
2257 dcr
->code
= NFIT_FIC_BYTE
;
2259 offset
+= dcr
->header
.length
;
2261 memdev
= nfit_buf
+ offset
;
2262 memdev
->header
.type
= ACPI_NFIT_TYPE_MEMORY_MAP
;
2263 memdev
->header
.length
= sizeof(*memdev
);
2264 memdev
->device_handle
= handle
[6];
2265 memdev
->physical_id
= 0;
2266 memdev
->region_id
= 0;
2267 memdev
->range_index
= 0;
2268 memdev
->region_index
= 0+2;
2269 memdev
->region_size
= SPA2_SIZE
;
2270 memdev
->region_offset
= 0;
2271 memdev
->address
= 0;
2272 memdev
->interleave_index
= 0;
2273 memdev
->interleave_ways
= 1;
2274 memdev
->flags
= ACPI_NFIT_MEM_MAP_FAILED
;
2275 offset
+= memdev
->header
.length
;
2277 /* dcr-descriptor1 */
2278 dcr
= nfit_buf
+ offset
;
2279 dcr
->header
.type
= ACPI_NFIT_TYPE_CONTROL_REGION
;
2280 dcr
->header
.length
= offsetof(struct acpi_nfit_control_region
,
2282 dcr
->region_index
= 0+2;
2283 dcr_common_init(dcr
);
2284 dcr
->serial_number
= ~handle
[6];
2285 dcr
->code
= NFIT_FIC_BYTE
;
2287 offset
+= dcr
->header
.length
;
2289 /* sanity check to make sure we've filled the buffer */
2290 WARN_ON(offset
!= t
->nfit_size
);
2292 t
->nfit_filled
= offset
;
2294 post_ars_status(&t
->ars_state
, &t
->badrange
, t
->spa_set_dma
[0],
2297 acpi_desc
= &t
->acpi_desc
;
2298 set_bit(ND_CMD_ARS_CAP
, &acpi_desc
->bus_cmd_force_en
);
2299 set_bit(ND_CMD_ARS_START
, &acpi_desc
->bus_cmd_force_en
);
2300 set_bit(ND_CMD_ARS_STATUS
, &acpi_desc
->bus_cmd_force_en
);
2301 set_bit(ND_CMD_CLEAR_ERROR
, &acpi_desc
->bus_cmd_force_en
);
2302 set_bit(ND_INTEL_ENABLE_LSS_STATUS
, &acpi_desc
->dimm_cmd_force_en
);
2303 set_bit(ND_CMD_GET_CONFIG_SIZE
, &acpi_desc
->dimm_cmd_force_en
);
2304 set_bit(ND_CMD_GET_CONFIG_DATA
, &acpi_desc
->dimm_cmd_force_en
);
2305 set_bit(ND_CMD_SET_CONFIG_DATA
, &acpi_desc
->dimm_cmd_force_en
);
2308 static int nfit_test_blk_do_io(struct nd_blk_region
*ndbr
, resource_size_t dpa
,
2309 void *iobuf
, u64 len
, int rw
)
2311 struct nfit_blk
*nfit_blk
= ndbr
->blk_provider_data
;
2312 struct nfit_blk_mmio
*mmio
= &nfit_blk
->mmio
[BDW
];
2313 struct nd_region
*nd_region
= &ndbr
->nd_region
;
2316 lane
= nd_region_acquire_lane(nd_region
);
2318 memcpy(mmio
->addr
.base
+ dpa
, iobuf
, len
);
2320 memcpy(iobuf
, mmio
->addr
.base
+ dpa
, len
);
2322 /* give us some some coverage of the arch_invalidate_pmem() API */
2323 arch_invalidate_pmem(mmio
->addr
.base
+ dpa
, len
);
2325 nd_region_release_lane(nd_region
, lane
);
2330 static unsigned long nfit_ctl_handle
;
2332 union acpi_object
*result
;
2334 static union acpi_object
*nfit_test_evaluate_dsm(acpi_handle handle
,
2335 const guid_t
*guid
, u64 rev
, u64 func
, union acpi_object
*argv4
)
2337 if (handle
!= &nfit_ctl_handle
)
2338 return ERR_PTR(-ENXIO
);
2343 static int setup_result(void *buf
, size_t size
)
2345 result
= kmalloc(sizeof(union acpi_object
) + size
, GFP_KERNEL
);
2348 result
->package
.type
= ACPI_TYPE_BUFFER
,
2349 result
->buffer
.pointer
= (void *) (result
+ 1);
2350 result
->buffer
.length
= size
;
2351 memcpy(result
->buffer
.pointer
, buf
, size
);
2352 memset(buf
, 0, size
);
2356 static int nfit_ctl_test(struct device
*dev
)
2359 struct nvdimm
*nvdimm
;
2360 struct acpi_device
*adev
;
2361 struct nfit_mem
*nfit_mem
;
2362 struct nd_ars_record
*record
;
2363 struct acpi_nfit_desc
*acpi_desc
;
2364 const u64 test_val
= 0x0123456789abcdefULL
;
2365 unsigned long mask
, cmd_size
, offset
;
2367 struct nd_cmd_get_config_size cfg_size
;
2368 struct nd_cmd_clear_error clear_err
;
2369 struct nd_cmd_ars_status ars_stat
;
2370 struct nd_cmd_ars_cap ars_cap
;
2371 char buf
[sizeof(struct nd_cmd_ars_status
)
2372 + sizeof(struct nd_ars_record
)];
2375 adev
= devm_kzalloc(dev
, sizeof(*adev
), GFP_KERNEL
);
2378 *adev
= (struct acpi_device
) {
2379 .handle
= &nfit_ctl_handle
,
2381 .init_name
= "test-adev",
2385 acpi_desc
= devm_kzalloc(dev
, sizeof(*acpi_desc
), GFP_KERNEL
);
2388 *acpi_desc
= (struct acpi_nfit_desc
) {
2390 .cmd_mask
= 1UL << ND_CMD_ARS_CAP
2391 | 1UL << ND_CMD_ARS_START
2392 | 1UL << ND_CMD_ARS_STATUS
2393 | 1UL << ND_CMD_CLEAR_ERROR
2394 | 1UL << ND_CMD_CALL
,
2395 .module
= THIS_MODULE
,
2396 .provider_name
= "ACPI.NFIT",
2397 .ndctl
= acpi_nfit_ctl
,
2398 .bus_dsm_mask
= 1UL << NFIT_CMD_TRANSLATE_SPA
2399 | 1UL << NFIT_CMD_ARS_INJECT_SET
2400 | 1UL << NFIT_CMD_ARS_INJECT_CLEAR
2401 | 1UL << NFIT_CMD_ARS_INJECT_GET
,
2406 nfit_mem
= devm_kzalloc(dev
, sizeof(*nfit_mem
), GFP_KERNEL
);
2410 mask
= 1UL << ND_CMD_SMART
| 1UL << ND_CMD_SMART_THRESHOLD
2411 | 1UL << ND_CMD_DIMM_FLAGS
| 1UL << ND_CMD_GET_CONFIG_SIZE
2412 | 1UL << ND_CMD_GET_CONFIG_DATA
| 1UL << ND_CMD_SET_CONFIG_DATA
2413 | 1UL << ND_CMD_VENDOR
;
2414 *nfit_mem
= (struct nfit_mem
) {
2416 .family
= NVDIMM_FAMILY_INTEL
,
2420 nvdimm
= devm_kzalloc(dev
, sizeof(*nvdimm
), GFP_KERNEL
);
2423 *nvdimm
= (struct nvdimm
) {
2424 .provider_data
= nfit_mem
,
2427 .init_name
= "test-dimm",
2432 /* basic checkout of a typical 'get config size' command */
2433 cmd_size
= sizeof(cmds
.cfg_size
);
2434 cmds
.cfg_size
= (struct nd_cmd_get_config_size
) {
2436 .config_size
= SZ_128K
,
2439 rc
= setup_result(cmds
.buf
, cmd_size
);
2442 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, nvdimm
, ND_CMD_GET_CONFIG_SIZE
,
2443 cmds
.buf
, cmd_size
, &cmd_rc
);
2445 if (rc
< 0 || cmd_rc
|| cmds
.cfg_size
.status
!= 0
2446 || cmds
.cfg_size
.config_size
!= SZ_128K
2447 || cmds
.cfg_size
.max_xfer
!= SZ_4K
) {
2448 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2449 __func__
, __LINE__
, rc
, cmd_rc
);
2454 /* test ars_status with zero output */
2455 cmd_size
= offsetof(struct nd_cmd_ars_status
, address
);
2456 cmds
.ars_stat
= (struct nd_cmd_ars_status
) {
2459 rc
= setup_result(cmds
.buf
, cmd_size
);
2462 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, NULL
, ND_CMD_ARS_STATUS
,
2463 cmds
.buf
, cmd_size
, &cmd_rc
);
2465 if (rc
< 0 || cmd_rc
) {
2466 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2467 __func__
, __LINE__
, rc
, cmd_rc
);
2472 /* test ars_cap with benign extended status */
2473 cmd_size
= sizeof(cmds
.ars_cap
);
2474 cmds
.ars_cap
= (struct nd_cmd_ars_cap
) {
2475 .status
= ND_ARS_PERSISTENT
<< 16,
2477 offset
= offsetof(struct nd_cmd_ars_cap
, status
);
2478 rc
= setup_result(cmds
.buf
+ offset
, cmd_size
- offset
);
2481 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, NULL
, ND_CMD_ARS_CAP
,
2482 cmds
.buf
, cmd_size
, &cmd_rc
);
2484 if (rc
< 0 || cmd_rc
) {
2485 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2486 __func__
, __LINE__
, rc
, cmd_rc
);
2491 /* test ars_status with 'status' trimmed from 'out_length' */
2492 cmd_size
= sizeof(cmds
.ars_stat
) + sizeof(struct nd_ars_record
);
2493 cmds
.ars_stat
= (struct nd_cmd_ars_status
) {
2494 .out_length
= cmd_size
- 4,
2496 record
= &cmds
.ars_stat
.records
[0];
2497 *record
= (struct nd_ars_record
) {
2500 rc
= setup_result(cmds
.buf
, cmd_size
);
2503 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, NULL
, ND_CMD_ARS_STATUS
,
2504 cmds
.buf
, cmd_size
, &cmd_rc
);
2506 if (rc
< 0 || cmd_rc
|| record
->length
!= test_val
) {
2507 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2508 __func__
, __LINE__
, rc
, cmd_rc
);
2513 /* test ars_status with 'Output (Size)' including 'status' */
2514 cmd_size
= sizeof(cmds
.ars_stat
) + sizeof(struct nd_ars_record
);
2515 cmds
.ars_stat
= (struct nd_cmd_ars_status
) {
2516 .out_length
= cmd_size
,
2518 record
= &cmds
.ars_stat
.records
[0];
2519 *record
= (struct nd_ars_record
) {
2522 rc
= setup_result(cmds
.buf
, cmd_size
);
2525 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, NULL
, ND_CMD_ARS_STATUS
,
2526 cmds
.buf
, cmd_size
, &cmd_rc
);
2528 if (rc
< 0 || cmd_rc
|| record
->length
!= test_val
) {
2529 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2530 __func__
, __LINE__
, rc
, cmd_rc
);
2535 /* test extended status for get_config_size results in failure */
2536 cmd_size
= sizeof(cmds
.cfg_size
);
2537 cmds
.cfg_size
= (struct nd_cmd_get_config_size
) {
2540 rc
= setup_result(cmds
.buf
, cmd_size
);
2543 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, nvdimm
, ND_CMD_GET_CONFIG_SIZE
,
2544 cmds
.buf
, cmd_size
, &cmd_rc
);
2546 if (rc
< 0 || cmd_rc
>= 0) {
2547 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2548 __func__
, __LINE__
, rc
, cmd_rc
);
2552 /* test clear error */
2553 cmd_size
= sizeof(cmds
.clear_err
);
2554 cmds
.clear_err
= (struct nd_cmd_clear_error
) {
2558 rc
= setup_result(cmds
.buf
, cmd_size
);
2561 rc
= acpi_nfit_ctl(&acpi_desc
->nd_desc
, NULL
, ND_CMD_CLEAR_ERROR
,
2562 cmds
.buf
, cmd_size
, &cmd_rc
);
2563 if (rc
< 0 || cmd_rc
) {
2564 dev_dbg(dev
, "%s: failed at: %d rc: %d cmd_rc: %d\n",
2565 __func__
, __LINE__
, rc
, cmd_rc
);
2572 static int nfit_test_probe(struct platform_device
*pdev
)
2574 struct nvdimm_bus_descriptor
*nd_desc
;
2575 struct acpi_nfit_desc
*acpi_desc
;
2576 struct device
*dev
= &pdev
->dev
;
2577 struct nfit_test
*nfit_test
;
2578 struct nfit_mem
*nfit_mem
;
2579 union acpi_object
*obj
;
2582 if (strcmp(dev_name(&pdev
->dev
), "nfit_test.0") == 0) {
2583 rc
= nfit_ctl_test(&pdev
->dev
);
2588 nfit_test
= to_nfit_test(&pdev
->dev
);
2591 if (nfit_test
->num_dcr
) {
2592 int num
= nfit_test
->num_dcr
;
2594 nfit_test
->dimm
= devm_kcalloc(dev
, num
, sizeof(void *),
2596 nfit_test
->dimm_dma
= devm_kcalloc(dev
, num
, sizeof(dma_addr_t
),
2598 nfit_test
->flush
= devm_kcalloc(dev
, num
, sizeof(void *),
2600 nfit_test
->flush_dma
= devm_kcalloc(dev
, num
, sizeof(dma_addr_t
),
2602 nfit_test
->label
= devm_kcalloc(dev
, num
, sizeof(void *),
2604 nfit_test
->label_dma
= devm_kcalloc(dev
, num
,
2605 sizeof(dma_addr_t
), GFP_KERNEL
);
2606 nfit_test
->dcr
= devm_kcalloc(dev
, num
,
2607 sizeof(struct nfit_test_dcr
*), GFP_KERNEL
);
2608 nfit_test
->dcr_dma
= devm_kcalloc(dev
, num
,
2609 sizeof(dma_addr_t
), GFP_KERNEL
);
2610 nfit_test
->smart
= devm_kcalloc(dev
, num
,
2611 sizeof(struct nd_intel_smart
), GFP_KERNEL
);
2612 nfit_test
->smart_threshold
= devm_kcalloc(dev
, num
,
2613 sizeof(struct nd_intel_smart_threshold
),
2615 nfit_test
->fw
= devm_kcalloc(dev
, num
,
2616 sizeof(struct nfit_test_fw
), GFP_KERNEL
);
2617 if (nfit_test
->dimm
&& nfit_test
->dimm_dma
&& nfit_test
->label
2618 && nfit_test
->label_dma
&& nfit_test
->dcr
2619 && nfit_test
->dcr_dma
&& nfit_test
->flush
2620 && nfit_test
->flush_dma
2627 if (nfit_test
->num_pm
) {
2628 int num
= nfit_test
->num_pm
;
2630 nfit_test
->spa_set
= devm_kcalloc(dev
, num
, sizeof(void *),
2632 nfit_test
->spa_set_dma
= devm_kcalloc(dev
, num
,
2633 sizeof(dma_addr_t
), GFP_KERNEL
);
2634 if (nfit_test
->spa_set
&& nfit_test
->spa_set_dma
)
2640 /* per-nfit specific alloc */
2641 if (nfit_test
->alloc(nfit_test
))
2644 nfit_test
->setup(nfit_test
);
2645 acpi_desc
= &nfit_test
->acpi_desc
;
2646 acpi_nfit_desc_init(acpi_desc
, &pdev
->dev
);
2647 acpi_desc
->blk_do_io
= nfit_test_blk_do_io
;
2648 nd_desc
= &acpi_desc
->nd_desc
;
2649 nd_desc
->provider_name
= NULL
;
2650 nd_desc
->module
= THIS_MODULE
;
2651 nd_desc
->ndctl
= nfit_test_ctl
;
2653 rc
= acpi_nfit_init(acpi_desc
, nfit_test
->nfit_buf
,
2654 nfit_test
->nfit_filled
);
2658 rc
= devm_add_action_or_reset(&pdev
->dev
, acpi_nfit_shutdown
, acpi_desc
);
2662 if (nfit_test
->setup
!= nfit_test0_setup
)
2665 nfit_test
->setup_hotplug
= 1;
2666 nfit_test
->setup(nfit_test
);
2668 obj
= kzalloc(sizeof(*obj
), GFP_KERNEL
);
2671 obj
->type
= ACPI_TYPE_BUFFER
;
2672 obj
->buffer
.length
= nfit_test
->nfit_size
;
2673 obj
->buffer
.pointer
= nfit_test
->nfit_buf
;
2674 *(nfit_test
->_fit
) = obj
;
2675 __acpi_nfit_notify(&pdev
->dev
, nfit_test
, 0x80);
2677 /* associate dimm devices with nfit_mem data for notification testing */
2678 mutex_lock(&acpi_desc
->init_mutex
);
2679 list_for_each_entry(nfit_mem
, &acpi_desc
->dimms
, list
) {
2680 u32 nfit_handle
= __to_nfit_memdev(nfit_mem
)->device_handle
;
2683 for (i
= 0; i
< ARRAY_SIZE(handle
); i
++)
2684 if (nfit_handle
== handle
[i
])
2685 dev_set_drvdata(nfit_test
->dimm_dev
[i
],
2688 mutex_unlock(&acpi_desc
->init_mutex
);
2693 static int nfit_test_remove(struct platform_device
*pdev
)
2698 static void nfit_test_release(struct device
*dev
)
2700 struct nfit_test
*nfit_test
= to_nfit_test(dev
);
2705 static const struct platform_device_id nfit_test_id
[] = {
2710 static struct platform_driver nfit_test_driver
= {
2711 .probe
= nfit_test_probe
,
2712 .remove
= nfit_test_remove
,
2714 .name
= KBUILD_MODNAME
,
2716 .id_table
= nfit_test_id
,
2719 static char mcsafe_buf
[PAGE_SIZE
] __attribute__((__aligned__(PAGE_SIZE
)));
2727 static void mcsafe_test_init(char *dst
, char *src
, size_t size
)
2731 memset(dst
, 0xff, size
);
2732 for (i
= 0; i
< size
; i
++)
2736 static bool mcsafe_test_validate(unsigned char *dst
, unsigned char *src
,
2737 size_t size
, unsigned long rem
)
2741 for (i
= 0; i
< size
- rem
; i
++)
2742 if (dst
[i
] != (unsigned char) i
) {
2743 pr_info_once("%s:%d: offset: %zd got: %#x expect: %#x\n",
2744 __func__
, __LINE__
, i
, dst
[i
],
2748 for (i
= size
- rem
; i
< size
; i
++)
2749 if (dst
[i
] != 0xffU
) {
2750 pr_info_once("%s:%d: offset: %zd got: %#x expect: 0xff\n",
2751 __func__
, __LINE__
, i
, dst
[i
]);
2757 void mcsafe_test(void)
2759 char *inject_desc
[] = { "none", "source", "destination" };
2762 if (IS_ENABLED(CONFIG_MCSAFE_TEST
)) {
2763 pr_info("%s: run...\n", __func__
);
2765 pr_info("%s: disabled, skip.\n", __func__
);
2769 for (inj
= INJECT_NONE
; inj
<= INJECT_DST
; inj
++) {
2772 pr_info("%s: inject: %s\n", __func__
, inject_desc
[inj
]);
2773 for (i
= 0; i
< 512; i
++) {
2774 unsigned long expect
, rem
;
2780 mcsafe_inject_src(NULL
);
2781 mcsafe_inject_dst(NULL
);
2782 dst
= &mcsafe_buf
[2048];
2783 src
= &mcsafe_buf
[1024 - i
];
2787 mcsafe_inject_src(&mcsafe_buf
[1024]);
2788 mcsafe_inject_dst(NULL
);
2789 dst
= &mcsafe_buf
[2048];
2790 src
= &mcsafe_buf
[1024 - i
];
2794 mcsafe_inject_src(NULL
);
2795 mcsafe_inject_dst(&mcsafe_buf
[2048]);
2796 dst
= &mcsafe_buf
[2048 - i
];
2797 src
= &mcsafe_buf
[1024];
2802 mcsafe_test_init(dst
, src
, 512);
2803 rem
= __memcpy_mcsafe(dst
, src
, 512);
2804 valid
= mcsafe_test_validate(dst
, src
, 512, expect
);
2805 if (rem
== expect
&& valid
)
2807 pr_info("%s: copy(%#lx, %#lx, %d) off: %d rem: %ld %s expect: %ld\n",
2809 ((unsigned long) dst
) & ~PAGE_MASK
,
2810 ((unsigned long ) src
) & ~PAGE_MASK
,
2811 512, i
, rem
, valid
? "valid" : "bad",
2816 mcsafe_inject_src(NULL
);
2817 mcsafe_inject_dst(NULL
);
2820 static __init
int nfit_test_init(void)
2830 nfit_test_setup(nfit_test_lookup
, nfit_test_evaluate_dsm
);
2832 nfit_wq
= create_singlethread_workqueue("nfit");
2836 nfit_test_dimm
= class_create(THIS_MODULE
, "nfit_test_dimm");
2837 if (IS_ERR(nfit_test_dimm
)) {
2838 rc
= PTR_ERR(nfit_test_dimm
);
2842 for (i
= 0; i
< NUM_NFITS
; i
++) {
2843 struct nfit_test
*nfit_test
;
2844 struct platform_device
*pdev
;
2846 nfit_test
= kzalloc(sizeof(*nfit_test
), GFP_KERNEL
);
2851 INIT_LIST_HEAD(&nfit_test
->resources
);
2852 badrange_init(&nfit_test
->badrange
);
2855 nfit_test
->num_pm
= NUM_PM
;
2856 nfit_test
->dcr_idx
= 0;
2857 nfit_test
->num_dcr
= NUM_DCR
;
2858 nfit_test
->alloc
= nfit_test0_alloc
;
2859 nfit_test
->setup
= nfit_test0_setup
;
2862 nfit_test
->num_pm
= 2;
2863 nfit_test
->dcr_idx
= NUM_DCR
;
2864 nfit_test
->num_dcr
= 2;
2865 nfit_test
->alloc
= nfit_test1_alloc
;
2866 nfit_test
->setup
= nfit_test1_setup
;
2872 pdev
= &nfit_test
->pdev
;
2873 pdev
->name
= KBUILD_MODNAME
;
2875 pdev
->dev
.release
= nfit_test_release
;
2876 rc
= platform_device_register(pdev
);
2878 put_device(&pdev
->dev
);
2881 get_device(&pdev
->dev
);
2883 rc
= dma_coerce_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2887 instances
[i
] = nfit_test
;
2888 INIT_WORK(&nfit_test
->work
, uc_error_notify
);
2891 rc
= platform_driver_register(&nfit_test_driver
);
2897 destroy_workqueue(nfit_wq
);
2898 for (i
= 0; i
< NUM_NFITS
; i
++)
2900 platform_device_unregister(&instances
[i
]->pdev
);
2901 nfit_test_teardown();
2902 for (i
= 0; i
< NUM_NFITS
; i
++)
2904 put_device(&instances
[i
]->pdev
.dev
);
2909 static __exit
void nfit_test_exit(void)
2913 flush_workqueue(nfit_wq
);
2914 destroy_workqueue(nfit_wq
);
2915 for (i
= 0; i
< NUM_NFITS
; i
++)
2916 platform_device_unregister(&instances
[i
]->pdev
);
2917 platform_driver_unregister(&nfit_test_driver
);
2918 nfit_test_teardown();
2920 for (i
= 0; i
< NUM_NFITS
; i
++)
2921 put_device(&instances
[i
]->pdev
.dev
);
2922 class_destroy(nfit_test_dimm
);
2925 module_init(nfit_test_init
);
2926 module_exit(nfit_test_exit
);
2927 MODULE_LICENSE("GPL v2");
2928 MODULE_AUTHOR("Intel Corporation");