1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015,2016 ARM Ltd.
6 * Author: Andre Przywara <andre.przywara@arm.com>
10 #include <linux/kvm.h>
11 #include <linux/kvm_host.h>
12 #include <linux/interrupt.h>
13 #include <linux/list.h>
14 #include <linux/uaccess.h>
15 #include <linux/list_sort.h>
17 #include <linux/irqchip/arm-gic-v3.h>
19 #include <asm/kvm_emulate.h>
20 #include <asm/kvm_arm.h>
21 #include <asm/kvm_mmu.h>
24 #include "vgic-mmio.h"
26 static int vgic_its_save_tables_v0(struct vgic_its
*its
);
27 static int vgic_its_restore_tables_v0(struct vgic_its
*its
);
28 static int vgic_its_commit_v0(struct vgic_its
*its
);
29 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
30 struct kvm_vcpu
*filter_vcpu
, bool needs_inv
);
33 * Creates a new (reference to a) struct vgic_irq for a given LPI.
34 * If this LPI is already mapped on another ITS, we increase its refcount
35 * and return a pointer to the existing structure.
36 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
37 * This function returns a pointer to the _unlocked_ structure.
39 static struct vgic_irq
*vgic_add_lpi(struct kvm
*kvm
, u32 intid
,
40 struct kvm_vcpu
*vcpu
)
42 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
43 struct vgic_irq
*irq
= vgic_get_irq(kvm
, NULL
, intid
), *oldirq
;
47 /* In this case there is no put, since we keep the reference. */
51 irq
= kzalloc(sizeof(struct vgic_irq
), GFP_KERNEL
);
53 return ERR_PTR(-ENOMEM
);
55 INIT_LIST_HEAD(&irq
->lpi_list
);
56 INIT_LIST_HEAD(&irq
->ap_list
);
57 raw_spin_lock_init(&irq
->irq_lock
);
59 irq
->config
= VGIC_CONFIG_EDGE
;
60 kref_init(&irq
->refcount
);
62 irq
->target_vcpu
= vcpu
;
65 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
68 * There could be a race with another vgic_add_lpi(), so we need to
69 * check that we don't add a second list entry with the same LPI.
71 list_for_each_entry(oldirq
, &dist
->lpi_list_head
, lpi_list
) {
72 if (oldirq
->intid
!= intid
)
75 /* Someone was faster with adding this LPI, lets use that. */
80 * This increases the refcount, the caller is expected to
81 * call vgic_put_irq() on the returned pointer once it's
82 * finished with the IRQ.
84 vgic_get_irq_kref(irq
);
89 list_add_tail(&irq
->lpi_list
, &dist
->lpi_list_head
);
90 dist
->lpi_list_count
++;
93 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
96 * We "cache" the configuration table entries in our struct vgic_irq's.
97 * However we only have those structs for mapped IRQs, so we read in
98 * the respective config data from memory here upon mapping the LPI.
100 ret
= update_lpi_config(kvm
, irq
, NULL
, false);
104 ret
= vgic_v3_lpi_sync_pending_status(kvm
, irq
);
112 struct list_head dev_list
;
114 /* the head for the list of ITTEs */
115 struct list_head itt_head
;
116 u32 num_eventid_bits
;
121 #define COLLECTION_NOT_MAPPED ((u32)~0)
123 struct its_collection
{
124 struct list_head coll_list
;
130 #define its_is_collection_mapped(coll) ((coll) && \
131 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
134 struct list_head ite_list
;
136 struct vgic_irq
*irq
;
137 struct its_collection
*collection
;
141 struct vgic_translation_cache_entry
{
142 struct list_head entry
;
146 struct vgic_irq
*irq
;
150 * struct vgic_its_abi - ITS abi ops and settings
151 * @cte_esz: collection table entry size
152 * @dte_esz: device table entry size
153 * @ite_esz: interrupt translation table entry size
154 * @save tables: save the ITS tables into guest RAM
155 * @restore_tables: restore the ITS internal structs from tables
156 * stored in guest RAM
157 * @commit: initialize the registers which expose the ABI settings,
158 * especially the entry sizes
160 struct vgic_its_abi
{
164 int (*save_tables
)(struct vgic_its
*its
);
165 int (*restore_tables
)(struct vgic_its
*its
);
166 int (*commit
)(struct vgic_its
*its
);
170 #define ESZ_MAX ABI_0_ESZ
172 static const struct vgic_its_abi its_table_abi_versions
[] = {
174 .cte_esz
= ABI_0_ESZ
,
175 .dte_esz
= ABI_0_ESZ
,
176 .ite_esz
= ABI_0_ESZ
,
177 .save_tables
= vgic_its_save_tables_v0
,
178 .restore_tables
= vgic_its_restore_tables_v0
,
179 .commit
= vgic_its_commit_v0
,
183 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
185 inline const struct vgic_its_abi
*vgic_its_get_abi(struct vgic_its
*its
)
187 return &its_table_abi_versions
[its
->abi_rev
];
190 static int vgic_its_set_abi(struct vgic_its
*its
, u32 rev
)
192 const struct vgic_its_abi
*abi
;
195 abi
= vgic_its_get_abi(its
);
196 return abi
->commit(its
);
200 * Find and returns a device in the device table for an ITS.
201 * Must be called with the its_lock mutex held.
203 static struct its_device
*find_its_device(struct vgic_its
*its
, u32 device_id
)
205 struct its_device
*device
;
207 list_for_each_entry(device
, &its
->device_list
, dev_list
)
208 if (device_id
== device
->device_id
)
215 * Find and returns an interrupt translation table entry (ITTE) for a given
216 * Device ID/Event ID pair on an ITS.
217 * Must be called with the its_lock mutex held.
219 static struct its_ite
*find_ite(struct vgic_its
*its
, u32 device_id
,
222 struct its_device
*device
;
225 device
= find_its_device(its
, device_id
);
229 list_for_each_entry(ite
, &device
->itt_head
, ite_list
)
230 if (ite
->event_id
== event_id
)
236 /* To be used as an iterator this macro misses the enclosing parentheses */
237 #define for_each_lpi_its(dev, ite, its) \
238 list_for_each_entry(dev, &(its)->device_list, dev_list) \
239 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
241 #define GIC_LPI_OFFSET 8192
243 #define VITS_TYPER_IDBITS 16
244 #define VITS_TYPER_DEVBITS 16
245 #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
246 #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
249 * Finds and returns a collection in the ITS collection table.
250 * Must be called with the its_lock mutex held.
252 static struct its_collection
*find_collection(struct vgic_its
*its
, int coll_id
)
254 struct its_collection
*collection
;
256 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
257 if (coll_id
== collection
->collection_id
)
264 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
265 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
268 * Reads the configuration data for a given LPI from guest memory and
269 * updates the fields in struct vgic_irq.
270 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
271 * VCPU. Unconditionally applies if filter_vcpu is NULL.
273 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
274 struct kvm_vcpu
*filter_vcpu
, bool needs_inv
)
276 u64 propbase
= GICR_PROPBASER_ADDRESS(kvm
->arch
.vgic
.propbaser
);
281 ret
= kvm_read_guest_lock(kvm
, propbase
+ irq
->intid
- GIC_LPI_OFFSET
,
287 raw_spin_lock_irqsave(&irq
->irq_lock
, flags
);
289 if (!filter_vcpu
|| filter_vcpu
== irq
->target_vcpu
) {
290 irq
->priority
= LPI_PROP_PRIORITY(prop
);
291 irq
->enabled
= LPI_PROP_ENABLE_BIT(prop
);
294 vgic_queue_irq_unlock(kvm
, irq
, flags
);
299 raw_spin_unlock_irqrestore(&irq
->irq_lock
, flags
);
302 return its_prop_update_vlpi(irq
->host_irq
, prop
, needs_inv
);
308 * Create a snapshot of the current LPIs targeting @vcpu, so that we can
309 * enumerate those LPIs without holding any lock.
310 * Returns their number and puts the kmalloc'ed array into intid_ptr.
312 int vgic_copy_lpi_list(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
, u32
**intid_ptr
)
314 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
315 struct vgic_irq
*irq
;
318 int irq_count
, i
= 0;
321 * There is an obvious race between allocating the array and LPIs
322 * being mapped/unmapped. If we ended up here as a result of a
323 * command, we're safe (locks are held, preventing another
324 * command). If coming from another path (such as enabling LPIs),
325 * we must be careful not to overrun the array.
327 irq_count
= READ_ONCE(dist
->lpi_list_count
);
328 intids
= kmalloc_array(irq_count
, sizeof(intids
[0]), GFP_KERNEL
);
332 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
333 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
336 /* We don't need to "get" the IRQ, as we hold the list lock. */
337 if (vcpu
&& irq
->target_vcpu
!= vcpu
)
339 intids
[i
++] = irq
->intid
;
341 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
347 static int update_affinity(struct vgic_irq
*irq
, struct kvm_vcpu
*vcpu
)
352 raw_spin_lock_irqsave(&irq
->irq_lock
, flags
);
353 irq
->target_vcpu
= vcpu
;
354 raw_spin_unlock_irqrestore(&irq
->irq_lock
, flags
);
357 struct its_vlpi_map map
;
359 ret
= its_get_vlpi(irq
->host_irq
, &map
);
364 atomic_dec(&map
.vpe
->vlpi_count
);
365 map
.vpe
= &vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
;
366 atomic_inc(&map
.vpe
->vlpi_count
);
368 ret
= its_map_vlpi(irq
->host_irq
, &map
);
375 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
376 * is targeting) to the VGIC's view, which deals with target VCPUs.
377 * Needs to be called whenever either the collection for a LPIs has
378 * changed or the collection itself got retargeted.
380 static void update_affinity_ite(struct kvm
*kvm
, struct its_ite
*ite
)
382 struct kvm_vcpu
*vcpu
;
384 if (!its_is_collection_mapped(ite
->collection
))
387 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
388 update_affinity(ite
->irq
, vcpu
);
392 * Updates the target VCPU for every LPI targeting this collection.
393 * Must be called with the its_lock mutex held.
395 static void update_affinity_collection(struct kvm
*kvm
, struct vgic_its
*its
,
396 struct its_collection
*coll
)
398 struct its_device
*device
;
401 for_each_lpi_its(device
, ite
, its
) {
402 if (!ite
->collection
|| coll
!= ite
->collection
)
405 update_affinity_ite(kvm
, ite
);
409 static u32
max_lpis_propbaser(u64 propbaser
)
411 int nr_idbits
= (propbaser
& 0x1f) + 1;
413 return 1U << min(nr_idbits
, INTERRUPT_ID_BITS_ITS
);
417 * Sync the pending table pending bit of LPIs targeting @vcpu
418 * with our own data structures. This relies on the LPI being
421 static int its_sync_lpi_pending_table(struct kvm_vcpu
*vcpu
)
423 gpa_t pendbase
= GICR_PENDBASER_ADDRESS(vcpu
->arch
.vgic_cpu
.pendbaser
);
424 struct vgic_irq
*irq
;
425 int last_byte_offset
= -1;
432 nr_irqs
= vgic_copy_lpi_list(vcpu
->kvm
, vcpu
, &intids
);
436 for (i
= 0; i
< nr_irqs
; i
++) {
437 int byte_offset
, bit_nr
;
439 byte_offset
= intids
[i
] / BITS_PER_BYTE
;
440 bit_nr
= intids
[i
] % BITS_PER_BYTE
;
443 * For contiguously allocated LPIs chances are we just read
444 * this very same byte in the last iteration. Reuse that.
446 if (byte_offset
!= last_byte_offset
) {
447 ret
= kvm_read_guest_lock(vcpu
->kvm
,
448 pendbase
+ byte_offset
,
454 last_byte_offset
= byte_offset
;
457 irq
= vgic_get_irq(vcpu
->kvm
, NULL
, intids
[i
]);
458 raw_spin_lock_irqsave(&irq
->irq_lock
, flags
);
459 irq
->pending_latch
= pendmask
& (1U << bit_nr
);
460 vgic_queue_irq_unlock(vcpu
->kvm
, irq
, flags
);
461 vgic_put_irq(vcpu
->kvm
, irq
);
469 static unsigned long vgic_mmio_read_its_typer(struct kvm
*kvm
,
470 struct vgic_its
*its
,
471 gpa_t addr
, unsigned int len
)
473 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
474 u64 reg
= GITS_TYPER_PLPIS
;
477 * We use linear CPU numbers for redistributor addressing,
478 * so GITS_TYPER.PTA is 0.
479 * Also we force all PROPBASER registers to be the same, so
480 * CommonLPIAff is 0 as well.
481 * To avoid memory waste in the guest, we keep the number of IDBits and
482 * DevBits low - as least for the time being.
484 reg
|= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS
, 5) << GITS_TYPER_DEVBITS_SHIFT
;
485 reg
|= GIC_ENCODE_SZ(VITS_TYPER_IDBITS
, 5) << GITS_TYPER_IDBITS_SHIFT
;
486 reg
|= GIC_ENCODE_SZ(abi
->ite_esz
, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT
;
488 return extract_bytes(reg
, addr
& 7, len
);
491 static unsigned long vgic_mmio_read_its_iidr(struct kvm
*kvm
,
492 struct vgic_its
*its
,
493 gpa_t addr
, unsigned int len
)
497 val
= (its
->abi_rev
<< GITS_IIDR_REV_SHIFT
) & GITS_IIDR_REV_MASK
;
498 val
|= (PRODUCT_ID_KVM
<< GITS_IIDR_PRODUCTID_SHIFT
) | IMPLEMENTER_ARM
;
502 static int vgic_mmio_uaccess_write_its_iidr(struct kvm
*kvm
,
503 struct vgic_its
*its
,
504 gpa_t addr
, unsigned int len
,
507 u32 rev
= GITS_IIDR_REV(val
);
509 if (rev
>= NR_ITS_ABIS
)
511 return vgic_its_set_abi(its
, rev
);
514 static unsigned long vgic_mmio_read_its_idregs(struct kvm
*kvm
,
515 struct vgic_its
*its
,
516 gpa_t addr
, unsigned int len
)
518 switch (addr
& 0xffff) {
520 return 0x92; /* part number, bits[7:0] */
522 return 0xb4; /* part number, bits[11:8] */
524 return GIC_PIDR2_ARCH_GICv3
| 0x0b;
526 return 0x40; /* This is a 64K software visible page */
527 /* The following are the ID registers for (any) GIC. */
541 static struct vgic_irq
*__vgic_its_check_cache(struct vgic_dist
*dist
,
543 u32 devid
, u32 eventid
)
545 struct vgic_translation_cache_entry
*cte
;
547 list_for_each_entry(cte
, &dist
->lpi_translation_cache
, entry
) {
549 * If we hit a NULL entry, there is nothing after this
555 if (cte
->db
!= db
|| cte
->devid
!= devid
||
556 cte
->eventid
!= eventid
)
560 * Move this entry to the head, as it is the most
563 if (!list_is_first(&cte
->entry
, &dist
->lpi_translation_cache
))
564 list_move(&cte
->entry
, &dist
->lpi_translation_cache
);
572 static struct vgic_irq
*vgic_its_check_cache(struct kvm
*kvm
, phys_addr_t db
,
573 u32 devid
, u32 eventid
)
575 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
576 struct vgic_irq
*irq
;
579 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
580 irq
= __vgic_its_check_cache(dist
, db
, devid
, eventid
);
581 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
586 static void vgic_its_cache_translation(struct kvm
*kvm
, struct vgic_its
*its
,
587 u32 devid
, u32 eventid
,
588 struct vgic_irq
*irq
)
590 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
591 struct vgic_translation_cache_entry
*cte
;
595 /* Do not cache a directly injected interrupt */
599 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
601 if (unlikely(list_empty(&dist
->lpi_translation_cache
)))
605 * We could have raced with another CPU caching the same
606 * translation behind our back, so let's check it is not in
609 db
= its
->vgic_its_base
+ GITS_TRANSLATER
;
610 if (__vgic_its_check_cache(dist
, db
, devid
, eventid
))
613 /* Always reuse the last entry (LRU policy) */
614 cte
= list_last_entry(&dist
->lpi_translation_cache
,
615 typeof(*cte
), entry
);
618 * Caching the translation implies having an extra reference
619 * to the interrupt, so drop the potential reference on what
620 * was in the cache, and increment it on the new interrupt.
623 __vgic_put_lpi_locked(kvm
, cte
->irq
);
625 vgic_get_irq_kref(irq
);
629 cte
->eventid
= eventid
;
632 /* Move the new translation to the head of the list */
633 list_move(&cte
->entry
, &dist
->lpi_translation_cache
);
636 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
639 void vgic_its_invalidate_cache(struct kvm
*kvm
)
641 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
642 struct vgic_translation_cache_entry
*cte
;
645 raw_spin_lock_irqsave(&dist
->lpi_list_lock
, flags
);
647 list_for_each_entry(cte
, &dist
->lpi_translation_cache
, entry
) {
649 * If we hit a NULL entry, there is nothing after this
655 __vgic_put_lpi_locked(kvm
, cte
->irq
);
659 raw_spin_unlock_irqrestore(&dist
->lpi_list_lock
, flags
);
662 int vgic_its_resolve_lpi(struct kvm
*kvm
, struct vgic_its
*its
,
663 u32 devid
, u32 eventid
, struct vgic_irq
**irq
)
665 struct kvm_vcpu
*vcpu
;
671 ite
= find_ite(its
, devid
, eventid
);
672 if (!ite
|| !its_is_collection_mapped(ite
->collection
))
673 return E_ITS_INT_UNMAPPED_INTERRUPT
;
675 vcpu
= kvm_get_vcpu(kvm
, ite
->collection
->target_addr
);
677 return E_ITS_INT_UNMAPPED_INTERRUPT
;
679 if (!vcpu
->arch
.vgic_cpu
.lpis_enabled
)
682 vgic_its_cache_translation(kvm
, its
, devid
, eventid
, ite
->irq
);
688 struct vgic_its
*vgic_msi_to_its(struct kvm
*kvm
, struct kvm_msi
*msi
)
691 struct kvm_io_device
*kvm_io_dev
;
692 struct vgic_io_device
*iodev
;
694 if (!vgic_has_its(kvm
))
695 return ERR_PTR(-ENODEV
);
697 if (!(msi
->flags
& KVM_MSI_VALID_DEVID
))
698 return ERR_PTR(-EINVAL
);
700 address
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
702 kvm_io_dev
= kvm_io_bus_get_dev(kvm
, KVM_MMIO_BUS
, address
);
704 return ERR_PTR(-EINVAL
);
706 if (kvm_io_dev
->ops
!= &kvm_io_gic_ops
)
707 return ERR_PTR(-EINVAL
);
709 iodev
= container_of(kvm_io_dev
, struct vgic_io_device
, dev
);
710 if (iodev
->iodev_type
!= IODEV_ITS
)
711 return ERR_PTR(-EINVAL
);
717 * Find the target VCPU and the LPI number for a given devid/eventid pair
718 * and make this IRQ pending, possibly injecting it.
719 * Must be called with the its_lock mutex held.
720 * Returns 0 on success, a positive error value for any ITS mapping
721 * related errors and negative error values for generic errors.
723 static int vgic_its_trigger_msi(struct kvm
*kvm
, struct vgic_its
*its
,
724 u32 devid
, u32 eventid
)
726 struct vgic_irq
*irq
= NULL
;
730 err
= vgic_its_resolve_lpi(kvm
, its
, devid
, eventid
, &irq
);
735 return irq_set_irqchip_state(irq
->host_irq
,
736 IRQCHIP_STATE_PENDING
, true);
738 raw_spin_lock_irqsave(&irq
->irq_lock
, flags
);
739 irq
->pending_latch
= true;
740 vgic_queue_irq_unlock(kvm
, irq
, flags
);
745 int vgic_its_inject_cached_translation(struct kvm
*kvm
, struct kvm_msi
*msi
)
747 struct vgic_irq
*irq
;
751 db
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
752 irq
= vgic_its_check_cache(kvm
, db
, msi
->devid
, msi
->data
);
757 raw_spin_lock_irqsave(&irq
->irq_lock
, flags
);
758 irq
->pending_latch
= true;
759 vgic_queue_irq_unlock(kvm
, irq
, flags
);
765 * Queries the KVM IO bus framework to get the ITS pointer from the given
767 * We then call vgic_its_trigger_msi() with the decoded data.
768 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
770 int vgic_its_inject_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
772 struct vgic_its
*its
;
775 if (!vgic_its_inject_cached_translation(kvm
, msi
))
778 its
= vgic_msi_to_its(kvm
, msi
);
782 mutex_lock(&its
->its_lock
);
783 ret
= vgic_its_trigger_msi(kvm
, its
, msi
->devid
, msi
->data
);
784 mutex_unlock(&its
->its_lock
);
790 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
791 * if the guest has blocked the MSI. So we map any LPI mapping
792 * related error to that.
800 /* Requires the its_lock to be held. */
801 static void its_free_ite(struct kvm
*kvm
, struct its_ite
*ite
)
803 list_del(&ite
->ite_list
);
805 /* This put matches the get in vgic_add_lpi. */
808 WARN_ON(its_unmap_vlpi(ite
->irq
->host_irq
));
810 vgic_put_irq(kvm
, ite
->irq
);
816 static u64
its_cmd_mask_field(u64
*its_cmd
, int word
, int shift
, int size
)
818 return (le64_to_cpu(its_cmd
[word
]) >> shift
) & (BIT_ULL(size
) - 1);
821 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
822 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
823 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
824 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
825 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
826 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
827 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
828 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
829 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
832 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
833 * Must be called with the its_lock mutex held.
835 static int vgic_its_cmd_handle_discard(struct kvm
*kvm
, struct vgic_its
*its
,
838 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
839 u32 event_id
= its_cmd_get_id(its_cmd
);
842 ite
= find_ite(its
, device_id
, event_id
);
843 if (ite
&& its_is_collection_mapped(ite
->collection
)) {
845 * Though the spec talks about removing the pending state, we
846 * don't bother here since we clear the ITTE anyway and the
847 * pending state is a property of the ITTE struct.
849 vgic_its_invalidate_cache(kvm
);
851 its_free_ite(kvm
, ite
);
855 return E_ITS_DISCARD_UNMAPPED_INTERRUPT
;
859 * The MOVI command moves an ITTE to a different collection.
860 * Must be called with the its_lock mutex held.
862 static int vgic_its_cmd_handle_movi(struct kvm
*kvm
, struct vgic_its
*its
,
865 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
866 u32 event_id
= its_cmd_get_id(its_cmd
);
867 u32 coll_id
= its_cmd_get_collection(its_cmd
);
868 struct kvm_vcpu
*vcpu
;
870 struct its_collection
*collection
;
872 ite
= find_ite(its
, device_id
, event_id
);
874 return E_ITS_MOVI_UNMAPPED_INTERRUPT
;
876 if (!its_is_collection_mapped(ite
->collection
))
877 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
879 collection
= find_collection(its
, coll_id
);
880 if (!its_is_collection_mapped(collection
))
881 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
883 ite
->collection
= collection
;
884 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
886 vgic_its_invalidate_cache(kvm
);
888 return update_affinity(ite
->irq
, vcpu
);
892 * Check whether an ID can be stored into the corresponding guest table.
893 * For a direct table this is pretty easy, but gets a bit nasty for
894 * indirect tables. We check whether the resulting guest physical address
895 * is actually valid (covered by a memslot and guest accessible).
896 * For this we have to read the respective first level entry.
898 static bool vgic_its_check_id(struct vgic_its
*its
, u64 baser
, u32 id
,
901 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
902 u64 indirect_ptr
, type
= GITS_BASER_TYPE(baser
);
903 phys_addr_t base
= GITS_BASER_ADDR_48_to_52(baser
);
904 int esz
= GITS_BASER_ENTRY_SIZE(baser
);
910 case GITS_BASER_TYPE_DEVICE
:
911 if (id
>= BIT_ULL(VITS_TYPER_DEVBITS
))
914 case GITS_BASER_TYPE_COLLECTION
:
915 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
916 if (id
>= BIT_ULL(16))
923 if (!(baser
& GITS_BASER_INDIRECT
)) {
926 if (id
>= (l1_tbl_size
/ esz
))
929 addr
= base
+ id
* esz
;
930 gfn
= addr
>> PAGE_SHIFT
;
938 /* calculate and check the index into the 1st level */
939 index
= id
/ (SZ_64K
/ esz
);
940 if (index
>= (l1_tbl_size
/ sizeof(u64
)))
943 /* Each 1st level entry is represented by a 64-bit value. */
944 if (kvm_read_guest_lock(its
->dev
->kvm
,
945 base
+ index
* sizeof(indirect_ptr
),
946 &indirect_ptr
, sizeof(indirect_ptr
)))
949 indirect_ptr
= le64_to_cpu(indirect_ptr
);
951 /* check the valid bit of the first level entry */
952 if (!(indirect_ptr
& BIT_ULL(63)))
955 /* Mask the guest physical address and calculate the frame number. */
956 indirect_ptr
&= GENMASK_ULL(51, 16);
958 /* Find the address of the actual entry */
959 index
= id
% (SZ_64K
/ esz
);
960 indirect_ptr
+= index
* esz
;
961 gfn
= indirect_ptr
>> PAGE_SHIFT
;
964 *eaddr
= indirect_ptr
;
967 idx
= srcu_read_lock(&its
->dev
->kvm
->srcu
);
968 ret
= kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
969 srcu_read_unlock(&its
->dev
->kvm
->srcu
, idx
);
973 static int vgic_its_alloc_collection(struct vgic_its
*its
,
974 struct its_collection
**colp
,
977 struct its_collection
*collection
;
979 if (!vgic_its_check_id(its
, its
->baser_coll_table
, coll_id
, NULL
))
980 return E_ITS_MAPC_COLLECTION_OOR
;
982 collection
= kzalloc(sizeof(*collection
), GFP_KERNEL
);
986 collection
->collection_id
= coll_id
;
987 collection
->target_addr
= COLLECTION_NOT_MAPPED
;
989 list_add_tail(&collection
->coll_list
, &its
->collection_list
);
995 static void vgic_its_free_collection(struct vgic_its
*its
, u32 coll_id
)
997 struct its_collection
*collection
;
998 struct its_device
*device
;
1002 * Clearing the mapping for that collection ID removes the
1003 * entry from the list. If there wasn't any before, we can
1006 collection
= find_collection(its
, coll_id
);
1010 for_each_lpi_its(device
, ite
, its
)
1011 if (ite
->collection
&&
1012 ite
->collection
->collection_id
== coll_id
)
1013 ite
->collection
= NULL
;
1015 list_del(&collection
->coll_list
);
1019 /* Must be called with its_lock mutex held */
1020 static struct its_ite
*vgic_its_alloc_ite(struct its_device
*device
,
1021 struct its_collection
*collection
,
1024 struct its_ite
*ite
;
1026 ite
= kzalloc(sizeof(*ite
), GFP_KERNEL
);
1028 return ERR_PTR(-ENOMEM
);
1030 ite
->event_id
= event_id
;
1031 ite
->collection
= collection
;
1033 list_add_tail(&ite
->ite_list
, &device
->itt_head
);
1038 * The MAPTI and MAPI commands map LPIs to ITTEs.
1039 * Must be called with its_lock mutex held.
1041 static int vgic_its_cmd_handle_mapi(struct kvm
*kvm
, struct vgic_its
*its
,
1044 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1045 u32 event_id
= its_cmd_get_id(its_cmd
);
1046 u32 coll_id
= its_cmd_get_collection(its_cmd
);
1047 struct its_ite
*ite
;
1048 struct kvm_vcpu
*vcpu
= NULL
;
1049 struct its_device
*device
;
1050 struct its_collection
*collection
, *new_coll
= NULL
;
1051 struct vgic_irq
*irq
;
1054 device
= find_its_device(its
, device_id
);
1056 return E_ITS_MAPTI_UNMAPPED_DEVICE
;
1058 if (event_id
>= BIT_ULL(device
->num_eventid_bits
))
1059 return E_ITS_MAPTI_ID_OOR
;
1061 if (its_cmd_get_command(its_cmd
) == GITS_CMD_MAPTI
)
1062 lpi_nr
= its_cmd_get_physical_id(its_cmd
);
1065 if (lpi_nr
< GIC_LPI_OFFSET
||
1066 lpi_nr
>= max_lpis_propbaser(kvm
->arch
.vgic
.propbaser
))
1067 return E_ITS_MAPTI_PHYSICALID_OOR
;
1069 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
1070 if (find_ite(its
, device_id
, event_id
))
1073 collection
= find_collection(its
, coll_id
);
1075 int ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
1078 new_coll
= collection
;
1081 ite
= vgic_its_alloc_ite(device
, collection
, event_id
);
1084 vgic_its_free_collection(its
, coll_id
);
1085 return PTR_ERR(ite
);
1088 if (its_is_collection_mapped(collection
))
1089 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1091 irq
= vgic_add_lpi(kvm
, lpi_nr
, vcpu
);
1094 vgic_its_free_collection(its
, coll_id
);
1095 its_free_ite(kvm
, ite
);
1096 return PTR_ERR(irq
);
1103 /* Requires the its_lock to be held. */
1104 static void vgic_its_free_device(struct kvm
*kvm
, struct its_device
*device
)
1106 struct its_ite
*ite
, *temp
;
1109 * The spec says that unmapping a device with still valid
1110 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
1111 * since we cannot leave the memory unreferenced.
1113 list_for_each_entry_safe(ite
, temp
, &device
->itt_head
, ite_list
)
1114 its_free_ite(kvm
, ite
);
1116 vgic_its_invalidate_cache(kvm
);
1118 list_del(&device
->dev_list
);
1122 /* its lock must be held */
1123 static void vgic_its_free_device_list(struct kvm
*kvm
, struct vgic_its
*its
)
1125 struct its_device
*cur
, *temp
;
1127 list_for_each_entry_safe(cur
, temp
, &its
->device_list
, dev_list
)
1128 vgic_its_free_device(kvm
, cur
);
1131 /* its lock must be held */
1132 static void vgic_its_free_collection_list(struct kvm
*kvm
, struct vgic_its
*its
)
1134 struct its_collection
*cur
, *temp
;
1136 list_for_each_entry_safe(cur
, temp
, &its
->collection_list
, coll_list
)
1137 vgic_its_free_collection(its
, cur
->collection_id
);
1140 /* Must be called with its_lock mutex held */
1141 static struct its_device
*vgic_its_alloc_device(struct vgic_its
*its
,
1142 u32 device_id
, gpa_t itt_addr
,
1143 u8 num_eventid_bits
)
1145 struct its_device
*device
;
1147 device
= kzalloc(sizeof(*device
), GFP_KERNEL
);
1149 return ERR_PTR(-ENOMEM
);
1151 device
->device_id
= device_id
;
1152 device
->itt_addr
= itt_addr
;
1153 device
->num_eventid_bits
= num_eventid_bits
;
1154 INIT_LIST_HEAD(&device
->itt_head
);
1156 list_add_tail(&device
->dev_list
, &its
->device_list
);
1161 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
1162 * Must be called with the its_lock mutex held.
1164 static int vgic_its_cmd_handle_mapd(struct kvm
*kvm
, struct vgic_its
*its
,
1167 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1168 bool valid
= its_cmd_get_validbit(its_cmd
);
1169 u8 num_eventid_bits
= its_cmd_get_size(its_cmd
);
1170 gpa_t itt_addr
= its_cmd_get_ittaddr(its_cmd
);
1171 struct its_device
*device
;
1173 if (!vgic_its_check_id(its
, its
->baser_device_table
, device_id
, NULL
))
1174 return E_ITS_MAPD_DEVICE_OOR
;
1176 if (valid
&& num_eventid_bits
> VITS_TYPER_IDBITS
)
1177 return E_ITS_MAPD_ITTSIZE_OOR
;
1179 device
= find_its_device(its
, device_id
);
1182 * The spec says that calling MAPD on an already mapped device
1183 * invalidates all cached data for this device. We implement this
1184 * by removing the mapping and re-establishing it.
1187 vgic_its_free_device(kvm
, device
);
1190 * The spec does not say whether unmapping a not-mapped device
1191 * is an error, so we are done in any case.
1196 device
= vgic_its_alloc_device(its
, device_id
, itt_addr
,
1199 return PTR_ERR_OR_ZERO(device
);
1203 * The MAPC command maps collection IDs to redistributors.
1204 * Must be called with the its_lock mutex held.
1206 static int vgic_its_cmd_handle_mapc(struct kvm
*kvm
, struct vgic_its
*its
,
1211 struct its_collection
*collection
;
1214 valid
= its_cmd_get_validbit(its_cmd
);
1215 coll_id
= its_cmd_get_collection(its_cmd
);
1216 target_addr
= its_cmd_get_target_addr(its_cmd
);
1218 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
1219 return E_ITS_MAPC_PROCNUM_OOR
;
1222 vgic_its_free_collection(its
, coll_id
);
1223 vgic_its_invalidate_cache(kvm
);
1225 collection
= find_collection(its
, coll_id
);
1230 ret
= vgic_its_alloc_collection(its
, &collection
,
1234 collection
->target_addr
= target_addr
;
1236 collection
->target_addr
= target_addr
;
1237 update_affinity_collection(kvm
, its
, collection
);
1245 * The CLEAR command removes the pending state for a particular LPI.
1246 * Must be called with the its_lock mutex held.
1248 static int vgic_its_cmd_handle_clear(struct kvm
*kvm
, struct vgic_its
*its
,
1251 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1252 u32 event_id
= its_cmd_get_id(its_cmd
);
1253 struct its_ite
*ite
;
1256 ite
= find_ite(its
, device_id
, event_id
);
1258 return E_ITS_CLEAR_UNMAPPED_INTERRUPT
;
1260 ite
->irq
->pending_latch
= false;
1263 return irq_set_irqchip_state(ite
->irq
->host_irq
,
1264 IRQCHIP_STATE_PENDING
, false);
1270 * The INV command syncs the configuration bits from the memory table.
1271 * Must be called with the its_lock mutex held.
1273 static int vgic_its_cmd_handle_inv(struct kvm
*kvm
, struct vgic_its
*its
,
1276 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
1277 u32 event_id
= its_cmd_get_id(its_cmd
);
1278 struct its_ite
*ite
;
1281 ite
= find_ite(its
, device_id
, event_id
);
1283 return E_ITS_INV_UNMAPPED_INTERRUPT
;
1285 return update_lpi_config(kvm
, ite
->irq
, NULL
, true);
1289 * The INVALL command requests flushing of all IRQ data in this collection.
1290 * Find the VCPU mapped to that collection, then iterate over the VM's list
1291 * of mapped LPIs and update the configuration for each IRQ which targets
1292 * the specified vcpu. The configuration will be read from the in-memory
1293 * configuration table.
1294 * Must be called with the its_lock mutex held.
1296 static int vgic_its_cmd_handle_invall(struct kvm
*kvm
, struct vgic_its
*its
,
1299 u32 coll_id
= its_cmd_get_collection(its_cmd
);
1300 struct its_collection
*collection
;
1301 struct kvm_vcpu
*vcpu
;
1302 struct vgic_irq
*irq
;
1306 collection
= find_collection(its
, coll_id
);
1307 if (!its_is_collection_mapped(collection
))
1308 return E_ITS_INVALL_UNMAPPED_COLLECTION
;
1310 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
1312 irq_count
= vgic_copy_lpi_list(kvm
, vcpu
, &intids
);
1316 for (i
= 0; i
< irq_count
; i
++) {
1317 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
1320 update_lpi_config(kvm
, irq
, vcpu
, false);
1321 vgic_put_irq(kvm
, irq
);
1326 if (vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
.its_vm
)
1327 its_invall_vpe(&vcpu
->arch
.vgic_cpu
.vgic_v3
.its_vpe
);
1333 * The MOVALL command moves the pending state of all IRQs targeting one
1334 * redistributor to another. We don't hold the pending state in the VCPUs,
1335 * but in the IRQs instead, so there is really not much to do for us here.
1336 * However the spec says that no IRQ must target the old redistributor
1337 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1338 * This command affects all LPIs in the system that target that redistributor.
1340 static int vgic_its_cmd_handle_movall(struct kvm
*kvm
, struct vgic_its
*its
,
1343 u32 target1_addr
= its_cmd_get_target_addr(its_cmd
);
1344 u32 target2_addr
= its_cmd_mask_field(its_cmd
, 3, 16, 32);
1345 struct kvm_vcpu
*vcpu1
, *vcpu2
;
1346 struct vgic_irq
*irq
;
1350 if (target1_addr
>= atomic_read(&kvm
->online_vcpus
) ||
1351 target2_addr
>= atomic_read(&kvm
->online_vcpus
))
1352 return E_ITS_MOVALL_PROCNUM_OOR
;
1354 if (target1_addr
== target2_addr
)
1357 vcpu1
= kvm_get_vcpu(kvm
, target1_addr
);
1358 vcpu2
= kvm_get_vcpu(kvm
, target2_addr
);
1360 irq_count
= vgic_copy_lpi_list(kvm
, vcpu1
, &intids
);
1364 for (i
= 0; i
< irq_count
; i
++) {
1365 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
1367 update_affinity(irq
, vcpu2
);
1369 vgic_put_irq(kvm
, irq
);
1372 vgic_its_invalidate_cache(kvm
);
1379 * The INT command injects the LPI associated with that DevID/EvID pair.
1380 * Must be called with the its_lock mutex held.
1382 static int vgic_its_cmd_handle_int(struct kvm
*kvm
, struct vgic_its
*its
,
1385 u32 msi_data
= its_cmd_get_id(its_cmd
);
1386 u64 msi_devid
= its_cmd_get_deviceid(its_cmd
);
1388 return vgic_its_trigger_msi(kvm
, its
, msi_devid
, msi_data
);
1392 * This function is called with the its_cmd lock held, but the ITS data
1393 * structure lock dropped.
1395 static int vgic_its_handle_command(struct kvm
*kvm
, struct vgic_its
*its
,
1400 mutex_lock(&its
->its_lock
);
1401 switch (its_cmd_get_command(its_cmd
)) {
1403 ret
= vgic_its_cmd_handle_mapd(kvm
, its
, its_cmd
);
1406 ret
= vgic_its_cmd_handle_mapc(kvm
, its
, its_cmd
);
1409 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1411 case GITS_CMD_MAPTI
:
1412 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1415 ret
= vgic_its_cmd_handle_movi(kvm
, its
, its_cmd
);
1417 case GITS_CMD_DISCARD
:
1418 ret
= vgic_its_cmd_handle_discard(kvm
, its
, its_cmd
);
1420 case GITS_CMD_CLEAR
:
1421 ret
= vgic_its_cmd_handle_clear(kvm
, its
, its_cmd
);
1423 case GITS_CMD_MOVALL
:
1424 ret
= vgic_its_cmd_handle_movall(kvm
, its
, its_cmd
);
1427 ret
= vgic_its_cmd_handle_int(kvm
, its
, its_cmd
);
1430 ret
= vgic_its_cmd_handle_inv(kvm
, its
, its_cmd
);
1432 case GITS_CMD_INVALL
:
1433 ret
= vgic_its_cmd_handle_invall(kvm
, its
, its_cmd
);
1436 /* we ignore this command: we are in sync all of the time */
1440 mutex_unlock(&its
->its_lock
);
1445 static u64
vgic_sanitise_its_baser(u64 reg
)
1447 reg
= vgic_sanitise_field(reg
, GITS_BASER_SHAREABILITY_MASK
,
1448 GITS_BASER_SHAREABILITY_SHIFT
,
1449 vgic_sanitise_shareability
);
1450 reg
= vgic_sanitise_field(reg
, GITS_BASER_INNER_CACHEABILITY_MASK
,
1451 GITS_BASER_INNER_CACHEABILITY_SHIFT
,
1452 vgic_sanitise_inner_cacheability
);
1453 reg
= vgic_sanitise_field(reg
, GITS_BASER_OUTER_CACHEABILITY_MASK
,
1454 GITS_BASER_OUTER_CACHEABILITY_SHIFT
,
1455 vgic_sanitise_outer_cacheability
);
1457 /* We support only one (ITS) page size: 64K */
1458 reg
= (reg
& ~GITS_BASER_PAGE_SIZE_MASK
) | GITS_BASER_PAGE_SIZE_64K
;
1463 static u64
vgic_sanitise_its_cbaser(u64 reg
)
1465 reg
= vgic_sanitise_field(reg
, GITS_CBASER_SHAREABILITY_MASK
,
1466 GITS_CBASER_SHAREABILITY_SHIFT
,
1467 vgic_sanitise_shareability
);
1468 reg
= vgic_sanitise_field(reg
, GITS_CBASER_INNER_CACHEABILITY_MASK
,
1469 GITS_CBASER_INNER_CACHEABILITY_SHIFT
,
1470 vgic_sanitise_inner_cacheability
);
1471 reg
= vgic_sanitise_field(reg
, GITS_CBASER_OUTER_CACHEABILITY_MASK
,
1472 GITS_CBASER_OUTER_CACHEABILITY_SHIFT
,
1473 vgic_sanitise_outer_cacheability
);
1475 /* Sanitise the physical address to be 64k aligned. */
1476 reg
&= ~GENMASK_ULL(15, 12);
1481 static unsigned long vgic_mmio_read_its_cbaser(struct kvm
*kvm
,
1482 struct vgic_its
*its
,
1483 gpa_t addr
, unsigned int len
)
1485 return extract_bytes(its
->cbaser
, addr
& 7, len
);
1488 static void vgic_mmio_write_its_cbaser(struct kvm
*kvm
, struct vgic_its
*its
,
1489 gpa_t addr
, unsigned int len
,
1492 /* When GITS_CTLR.Enable is 1, this register is RO. */
1496 mutex_lock(&its
->cmd_lock
);
1497 its
->cbaser
= update_64bit_reg(its
->cbaser
, addr
& 7, len
, val
);
1498 its
->cbaser
= vgic_sanitise_its_cbaser(its
->cbaser
);
1501 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1502 * it to CREADR to make sure we start with an empty command buffer.
1504 its
->cwriter
= its
->creadr
;
1505 mutex_unlock(&its
->cmd_lock
);
1508 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1509 #define ITS_CMD_SIZE 32
1510 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1512 /* Must be called with the cmd_lock held. */
1513 static void vgic_its_process_commands(struct kvm
*kvm
, struct vgic_its
*its
)
1518 /* Commands are only processed when the ITS is enabled. */
1522 cbaser
= GITS_CBASER_ADDRESS(its
->cbaser
);
1524 while (its
->cwriter
!= its
->creadr
) {
1525 int ret
= kvm_read_guest_lock(kvm
, cbaser
+ its
->creadr
,
1526 cmd_buf
, ITS_CMD_SIZE
);
1528 * If kvm_read_guest() fails, this could be due to the guest
1529 * programming a bogus value in CBASER or something else going
1530 * wrong from which we cannot easily recover.
1531 * According to section 6.3.2 in the GICv3 spec we can just
1532 * ignore that command then.
1535 vgic_its_handle_command(kvm
, its
, cmd_buf
);
1537 its
->creadr
+= ITS_CMD_SIZE
;
1538 if (its
->creadr
== ITS_CMD_BUFFER_SIZE(its
->cbaser
))
1544 * By writing to CWRITER the guest announces new commands to be processed.
1545 * To avoid any races in the first place, we take the its_cmd lock, which
1546 * protects our ring buffer variables, so that there is only one user
1547 * per ITS handling commands at a given time.
1549 static void vgic_mmio_write_its_cwriter(struct kvm
*kvm
, struct vgic_its
*its
,
1550 gpa_t addr
, unsigned int len
,
1558 mutex_lock(&its
->cmd_lock
);
1560 reg
= update_64bit_reg(its
->cwriter
, addr
& 7, len
, val
);
1561 reg
= ITS_CMD_OFFSET(reg
);
1562 if (reg
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1563 mutex_unlock(&its
->cmd_lock
);
1568 vgic_its_process_commands(kvm
, its
);
1570 mutex_unlock(&its
->cmd_lock
);
1573 static unsigned long vgic_mmio_read_its_cwriter(struct kvm
*kvm
,
1574 struct vgic_its
*its
,
1575 gpa_t addr
, unsigned int len
)
1577 return extract_bytes(its
->cwriter
, addr
& 0x7, len
);
1580 static unsigned long vgic_mmio_read_its_creadr(struct kvm
*kvm
,
1581 struct vgic_its
*its
,
1582 gpa_t addr
, unsigned int len
)
1584 return extract_bytes(its
->creadr
, addr
& 0x7, len
);
1587 static int vgic_mmio_uaccess_write_its_creadr(struct kvm
*kvm
,
1588 struct vgic_its
*its
,
1589 gpa_t addr
, unsigned int len
,
1595 mutex_lock(&its
->cmd_lock
);
1602 cmd_offset
= ITS_CMD_OFFSET(val
);
1603 if (cmd_offset
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1608 its
->creadr
= cmd_offset
;
1610 mutex_unlock(&its
->cmd_lock
);
1614 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1615 static unsigned long vgic_mmio_read_its_baser(struct kvm
*kvm
,
1616 struct vgic_its
*its
,
1617 gpa_t addr
, unsigned int len
)
1621 switch (BASER_INDEX(addr
)) {
1623 reg
= its
->baser_device_table
;
1626 reg
= its
->baser_coll_table
;
1633 return extract_bytes(reg
, addr
& 7, len
);
1636 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1637 static void vgic_mmio_write_its_baser(struct kvm
*kvm
,
1638 struct vgic_its
*its
,
1639 gpa_t addr
, unsigned int len
,
1642 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
1643 u64 entry_size
, table_type
;
1644 u64 reg
, *regptr
, clearbits
= 0;
1646 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1650 switch (BASER_INDEX(addr
)) {
1652 regptr
= &its
->baser_device_table
;
1653 entry_size
= abi
->dte_esz
;
1654 table_type
= GITS_BASER_TYPE_DEVICE
;
1657 regptr
= &its
->baser_coll_table
;
1658 entry_size
= abi
->cte_esz
;
1659 table_type
= GITS_BASER_TYPE_COLLECTION
;
1660 clearbits
= GITS_BASER_INDIRECT
;
1666 reg
= update_64bit_reg(*regptr
, addr
& 7, len
, val
);
1667 reg
&= ~GITS_BASER_RO_MASK
;
1670 reg
|= (entry_size
- 1) << GITS_BASER_ENTRY_SIZE_SHIFT
;
1671 reg
|= table_type
<< GITS_BASER_TYPE_SHIFT
;
1672 reg
= vgic_sanitise_its_baser(reg
);
1676 if (!(reg
& GITS_BASER_VALID
)) {
1677 /* Take the its_lock to prevent a race with a save/restore */
1678 mutex_lock(&its
->its_lock
);
1679 switch (table_type
) {
1680 case GITS_BASER_TYPE_DEVICE
:
1681 vgic_its_free_device_list(kvm
, its
);
1683 case GITS_BASER_TYPE_COLLECTION
:
1684 vgic_its_free_collection_list(kvm
, its
);
1687 mutex_unlock(&its
->its_lock
);
1691 static unsigned long vgic_mmio_read_its_ctlr(struct kvm
*vcpu
,
1692 struct vgic_its
*its
,
1693 gpa_t addr
, unsigned int len
)
1697 mutex_lock(&its
->cmd_lock
);
1698 if (its
->creadr
== its
->cwriter
)
1699 reg
|= GITS_CTLR_QUIESCENT
;
1701 reg
|= GITS_CTLR_ENABLE
;
1702 mutex_unlock(&its
->cmd_lock
);
1707 static void vgic_mmio_write_its_ctlr(struct kvm
*kvm
, struct vgic_its
*its
,
1708 gpa_t addr
, unsigned int len
,
1711 mutex_lock(&its
->cmd_lock
);
1714 * It is UNPREDICTABLE to enable the ITS if any of the CBASER or
1715 * device/collection BASER are invalid
1717 if (!its
->enabled
&& (val
& GITS_CTLR_ENABLE
) &&
1718 (!(its
->baser_device_table
& GITS_BASER_VALID
) ||
1719 !(its
->baser_coll_table
& GITS_BASER_VALID
) ||
1720 !(its
->cbaser
& GITS_CBASER_VALID
)))
1723 its
->enabled
= !!(val
& GITS_CTLR_ENABLE
);
1725 vgic_its_invalidate_cache(kvm
);
1728 * Try to process any pending commands. This function bails out early
1729 * if the ITS is disabled or no commands have been queued.
1731 vgic_its_process_commands(kvm
, its
);
1734 mutex_unlock(&its
->cmd_lock
);
1737 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1739 .reg_offset = off, \
1741 .access_flags = acc, \
1746 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1748 .reg_offset = off, \
1750 .access_flags = acc, \
1753 .uaccess_its_write = uwr, \
1756 static void its_mmio_write_wi(struct kvm
*kvm
, struct vgic_its
*its
,
1757 gpa_t addr
, unsigned int len
, unsigned long val
)
1762 static struct vgic_register_region its_registers
[] = {
1763 REGISTER_ITS_DESC(GITS_CTLR
,
1764 vgic_mmio_read_its_ctlr
, vgic_mmio_write_its_ctlr
, 4,
1766 REGISTER_ITS_DESC_UACCESS(GITS_IIDR
,
1767 vgic_mmio_read_its_iidr
, its_mmio_write_wi
,
1768 vgic_mmio_uaccess_write_its_iidr
, 4,
1770 REGISTER_ITS_DESC(GITS_TYPER
,
1771 vgic_mmio_read_its_typer
, its_mmio_write_wi
, 8,
1772 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1773 REGISTER_ITS_DESC(GITS_CBASER
,
1774 vgic_mmio_read_its_cbaser
, vgic_mmio_write_its_cbaser
, 8,
1775 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1776 REGISTER_ITS_DESC(GITS_CWRITER
,
1777 vgic_mmio_read_its_cwriter
, vgic_mmio_write_its_cwriter
, 8,
1778 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1779 REGISTER_ITS_DESC_UACCESS(GITS_CREADR
,
1780 vgic_mmio_read_its_creadr
, its_mmio_write_wi
,
1781 vgic_mmio_uaccess_write_its_creadr
, 8,
1782 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1783 REGISTER_ITS_DESC(GITS_BASER
,
1784 vgic_mmio_read_its_baser
, vgic_mmio_write_its_baser
, 0x40,
1785 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1786 REGISTER_ITS_DESC(GITS_IDREGS_BASE
,
1787 vgic_mmio_read_its_idregs
, its_mmio_write_wi
, 0x30,
1791 /* This is called on setting the LPI enable bit in the redistributor. */
1792 void vgic_enable_lpis(struct kvm_vcpu
*vcpu
)
1794 if (!(vcpu
->arch
.vgic_cpu
.pendbaser
& GICR_PENDBASER_PTZ
))
1795 its_sync_lpi_pending_table(vcpu
);
1798 static int vgic_register_its_iodev(struct kvm
*kvm
, struct vgic_its
*its
,
1801 struct vgic_io_device
*iodev
= &its
->iodev
;
1804 mutex_lock(&kvm
->slots_lock
);
1805 if (!IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1810 its
->vgic_its_base
= addr
;
1811 iodev
->regions
= its_registers
;
1812 iodev
->nr_regions
= ARRAY_SIZE(its_registers
);
1813 kvm_iodevice_init(&iodev
->dev
, &kvm_io_gic_ops
);
1815 iodev
->base_addr
= its
->vgic_its_base
;
1816 iodev
->iodev_type
= IODEV_ITS
;
1818 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, iodev
->base_addr
,
1819 KVM_VGIC_V3_ITS_SIZE
, &iodev
->dev
);
1821 mutex_unlock(&kvm
->slots_lock
);
1826 /* Default is 16 cached LPIs per vcpu */
1827 #define LPI_DEFAULT_PCPU_CACHE_SIZE 16
1829 void vgic_lpi_translation_cache_init(struct kvm
*kvm
)
1831 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
1835 if (!list_empty(&dist
->lpi_translation_cache
))
1838 sz
= atomic_read(&kvm
->online_vcpus
) * LPI_DEFAULT_PCPU_CACHE_SIZE
;
1840 for (i
= 0; i
< sz
; i
++) {
1841 struct vgic_translation_cache_entry
*cte
;
1843 /* An allocation failure is not fatal */
1844 cte
= kzalloc(sizeof(*cte
), GFP_KERNEL
);
1848 INIT_LIST_HEAD(&cte
->entry
);
1849 list_add(&cte
->entry
, &dist
->lpi_translation_cache
);
1853 void vgic_lpi_translation_cache_destroy(struct kvm
*kvm
)
1855 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
1856 struct vgic_translation_cache_entry
*cte
, *tmp
;
1858 vgic_its_invalidate_cache(kvm
);
1860 list_for_each_entry_safe(cte
, tmp
,
1861 &dist
->lpi_translation_cache
, entry
) {
1862 list_del(&cte
->entry
);
1867 #define INITIAL_BASER_VALUE \
1868 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1869 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1870 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1871 GITS_BASER_PAGE_SIZE_64K)
1873 #define INITIAL_PROPBASER_VALUE \
1874 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1875 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1876 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1878 static int vgic_its_create(struct kvm_device
*dev
, u32 type
)
1880 struct vgic_its
*its
;
1882 if (type
!= KVM_DEV_TYPE_ARM_VGIC_ITS
)
1885 its
= kzalloc(sizeof(struct vgic_its
), GFP_KERNEL
);
1889 if (vgic_initialized(dev
->kvm
)) {
1890 int ret
= vgic_v4_init(dev
->kvm
);
1896 vgic_lpi_translation_cache_init(dev
->kvm
);
1899 mutex_init(&its
->its_lock
);
1900 mutex_init(&its
->cmd_lock
);
1902 its
->vgic_its_base
= VGIC_ADDR_UNDEF
;
1904 INIT_LIST_HEAD(&its
->device_list
);
1905 INIT_LIST_HEAD(&its
->collection_list
);
1907 dev
->kvm
->arch
.vgic
.msis_require_devid
= true;
1908 dev
->kvm
->arch
.vgic
.has_its
= true;
1909 its
->enabled
= false;
1912 its
->baser_device_table
= INITIAL_BASER_VALUE
|
1913 ((u64
)GITS_BASER_TYPE_DEVICE
<< GITS_BASER_TYPE_SHIFT
);
1914 its
->baser_coll_table
= INITIAL_BASER_VALUE
|
1915 ((u64
)GITS_BASER_TYPE_COLLECTION
<< GITS_BASER_TYPE_SHIFT
);
1916 dev
->kvm
->arch
.vgic
.propbaser
= INITIAL_PROPBASER_VALUE
;
1920 return vgic_its_set_abi(its
, NR_ITS_ABIS
- 1);
1923 static void vgic_its_destroy(struct kvm_device
*kvm_dev
)
1925 struct kvm
*kvm
= kvm_dev
->kvm
;
1926 struct vgic_its
*its
= kvm_dev
->private;
1928 mutex_lock(&its
->its_lock
);
1930 vgic_its_free_device_list(kvm
, its
);
1931 vgic_its_free_collection_list(kvm
, its
);
1933 mutex_unlock(&its
->its_lock
);
1935 kfree(kvm_dev
);/* alloc by kvm_ioctl_create_device, free by .destroy */
1938 static int vgic_its_has_attr_regs(struct kvm_device
*dev
,
1939 struct kvm_device_attr
*attr
)
1941 const struct vgic_register_region
*region
;
1942 gpa_t offset
= attr
->attr
;
1945 align
= (offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
) ? 0x3 : 0x7;
1950 region
= vgic_find_mmio_region(its_registers
,
1951 ARRAY_SIZE(its_registers
),
1959 static int vgic_its_attr_regs_access(struct kvm_device
*dev
,
1960 struct kvm_device_attr
*attr
,
1961 u64
*reg
, bool is_write
)
1963 const struct vgic_register_region
*region
;
1964 struct vgic_its
*its
;
1970 offset
= attr
->attr
;
1973 * Although the spec supports upper/lower 32-bit accesses to
1974 * 64-bit ITS registers, the userspace ABI requires 64-bit
1975 * accesses to all 64-bit wide registers. We therefore only
1976 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1979 if ((offset
< GITS_TYPER
) || (offset
>= GITS_PIDR4
))
1987 mutex_lock(&dev
->kvm
->lock
);
1989 if (IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
)) {
1994 region
= vgic_find_mmio_region(its_registers
,
1995 ARRAY_SIZE(its_registers
),
2002 if (!lock_all_vcpus(dev
->kvm
)) {
2007 addr
= its
->vgic_its_base
+ offset
;
2009 len
= region
->access_flags
& VGIC_ACCESS_64bit
? 8 : 4;
2012 if (region
->uaccess_its_write
)
2013 ret
= region
->uaccess_its_write(dev
->kvm
, its
, addr
,
2016 region
->its_write(dev
->kvm
, its
, addr
, len
, *reg
);
2018 *reg
= region
->its_read(dev
->kvm
, its
, addr
, len
);
2020 unlock_all_vcpus(dev
->kvm
);
2022 mutex_unlock(&dev
->kvm
->lock
);
2026 static u32
compute_next_devid_offset(struct list_head
*h
,
2027 struct its_device
*dev
)
2029 struct its_device
*next
;
2032 if (list_is_last(&dev
->dev_list
, h
))
2034 next
= list_next_entry(dev
, dev_list
);
2035 next_offset
= next
->device_id
- dev
->device_id
;
2037 return min_t(u32
, next_offset
, VITS_DTE_MAX_DEVID_OFFSET
);
2040 static u32
compute_next_eventid_offset(struct list_head
*h
, struct its_ite
*ite
)
2042 struct its_ite
*next
;
2045 if (list_is_last(&ite
->ite_list
, h
))
2047 next
= list_next_entry(ite
, ite_list
);
2048 next_offset
= next
->event_id
- ite
->event_id
;
2050 return min_t(u32
, next_offset
, VITS_ITE_MAX_EVENTID_OFFSET
);
2054 * entry_fn_t - Callback called on a table entry restore path
2056 * @id: id of the entry
2057 * @entry: pointer to the entry
2058 * @opaque: pointer to an opaque data
2060 * Return: < 0 on error, 0 if last element was identified, id offset to next
2063 typedef int (*entry_fn_t
)(struct vgic_its
*its
, u32 id
, void *entry
,
2067 * scan_its_table - Scan a contiguous table in guest RAM and applies a function
2071 * @base: base gpa of the table
2072 * @size: size of the table in bytes
2073 * @esz: entry size in bytes
2074 * @start_id: the ID of the first entry in the table
2075 * (non zero for 2d level tables)
2076 * @fn: function to apply on each entry
2078 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
2079 * (the last element may not be found on second level tables)
2081 static int scan_its_table(struct vgic_its
*its
, gpa_t base
, int size
, u32 esz
,
2082 int start_id
, entry_fn_t fn
, void *opaque
)
2084 struct kvm
*kvm
= its
->dev
->kvm
;
2085 unsigned long len
= size
;
2088 char entry
[ESZ_MAX
];
2091 memset(entry
, 0, esz
);
2097 ret
= kvm_read_guest_lock(kvm
, gpa
, entry
, esz
);
2101 next_offset
= fn(its
, id
, entry
, opaque
);
2102 if (next_offset
<= 0)
2105 byte_offset
= next_offset
* esz
;
2114 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
2116 static int vgic_its_save_ite(struct vgic_its
*its
, struct its_device
*dev
,
2117 struct its_ite
*ite
, gpa_t gpa
, int ite_esz
)
2119 struct kvm
*kvm
= its
->dev
->kvm
;
2123 next_offset
= compute_next_eventid_offset(&dev
->itt_head
, ite
);
2124 val
= ((u64
)next_offset
<< KVM_ITS_ITE_NEXT_SHIFT
) |
2125 ((u64
)ite
->irq
->intid
<< KVM_ITS_ITE_PINTID_SHIFT
) |
2126 ite
->collection
->collection_id
;
2127 val
= cpu_to_le64(val
);
2128 return kvm_write_guest_lock(kvm
, gpa
, &val
, ite_esz
);
2132 * vgic_its_restore_ite - restore an interrupt translation entry
2133 * @event_id: id used for indexing
2134 * @ptr: pointer to the ITE entry
2135 * @opaque: pointer to the its_device
2137 static int vgic_its_restore_ite(struct vgic_its
*its
, u32 event_id
,
2138 void *ptr
, void *opaque
)
2140 struct its_device
*dev
= (struct its_device
*)opaque
;
2141 struct its_collection
*collection
;
2142 struct kvm
*kvm
= its
->dev
->kvm
;
2143 struct kvm_vcpu
*vcpu
= NULL
;
2145 u64
*p
= (u64
*)ptr
;
2146 struct vgic_irq
*irq
;
2147 u32 coll_id
, lpi_id
;
2148 struct its_ite
*ite
;
2153 val
= le64_to_cpu(val
);
2155 coll_id
= val
& KVM_ITS_ITE_ICID_MASK
;
2156 lpi_id
= (val
& KVM_ITS_ITE_PINTID_MASK
) >> KVM_ITS_ITE_PINTID_SHIFT
;
2159 return 1; /* invalid entry, no choice but to scan next entry */
2161 if (lpi_id
< VGIC_MIN_LPI
)
2164 offset
= val
>> KVM_ITS_ITE_NEXT_SHIFT
;
2165 if (event_id
+ offset
>= BIT_ULL(dev
->num_eventid_bits
))
2168 collection
= find_collection(its
, coll_id
);
2172 ite
= vgic_its_alloc_ite(dev
, collection
, event_id
);
2174 return PTR_ERR(ite
);
2176 if (its_is_collection_mapped(collection
))
2177 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
2179 irq
= vgic_add_lpi(kvm
, lpi_id
, vcpu
);
2181 return PTR_ERR(irq
);
2187 static int vgic_its_ite_cmp(void *priv
, struct list_head
*a
,
2188 struct list_head
*b
)
2190 struct its_ite
*itea
= container_of(a
, struct its_ite
, ite_list
);
2191 struct its_ite
*iteb
= container_of(b
, struct its_ite
, ite_list
);
2193 if (itea
->event_id
< iteb
->event_id
)
2199 static int vgic_its_save_itt(struct vgic_its
*its
, struct its_device
*device
)
2201 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2202 gpa_t base
= device
->itt_addr
;
2203 struct its_ite
*ite
;
2205 int ite_esz
= abi
->ite_esz
;
2207 list_sort(NULL
, &device
->itt_head
, vgic_its_ite_cmp
);
2209 list_for_each_entry(ite
, &device
->itt_head
, ite_list
) {
2210 gpa_t gpa
= base
+ ite
->event_id
* ite_esz
;
2213 * If an LPI carries the HW bit, this means that this
2214 * interrupt is controlled by GICv4, and we do not
2215 * have direct access to that state. Let's simply fail
2216 * the save operation...
2221 ret
= vgic_its_save_ite(its
, device
, ite
, gpa
, ite_esz
);
2229 * vgic_its_restore_itt - restore the ITT of a device
2232 * @dev: device handle
2234 * Return 0 on success, < 0 on error
2236 static int vgic_its_restore_itt(struct vgic_its
*its
, struct its_device
*dev
)
2238 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2239 gpa_t base
= dev
->itt_addr
;
2241 int ite_esz
= abi
->ite_esz
;
2242 size_t max_size
= BIT_ULL(dev
->num_eventid_bits
) * ite_esz
;
2244 ret
= scan_its_table(its
, base
, max_size
, ite_esz
, 0,
2245 vgic_its_restore_ite
, dev
);
2247 /* scan_its_table returns +1 if all ITEs are invalid */
2255 * vgic_its_save_dte - Save a device table entry at a given GPA
2261 static int vgic_its_save_dte(struct vgic_its
*its
, struct its_device
*dev
,
2262 gpa_t ptr
, int dte_esz
)
2264 struct kvm
*kvm
= its
->dev
->kvm
;
2265 u64 val
, itt_addr_field
;
2268 itt_addr_field
= dev
->itt_addr
>> 8;
2269 next_offset
= compute_next_devid_offset(&its
->device_list
, dev
);
2270 val
= (1ULL << KVM_ITS_DTE_VALID_SHIFT
|
2271 ((u64
)next_offset
<< KVM_ITS_DTE_NEXT_SHIFT
) |
2272 (itt_addr_field
<< KVM_ITS_DTE_ITTADDR_SHIFT
) |
2273 (dev
->num_eventid_bits
- 1));
2274 val
= cpu_to_le64(val
);
2275 return kvm_write_guest_lock(kvm
, ptr
, &val
, dte_esz
);
2279 * vgic_its_restore_dte - restore a device table entry
2282 * @id: device id the DTE corresponds to
2283 * @ptr: kernel VA where the 8 byte DTE is located
2286 * Return: < 0 on error, 0 if the dte is the last one, id offset to the
2287 * next dte otherwise
2289 static int vgic_its_restore_dte(struct vgic_its
*its
, u32 id
,
2290 void *ptr
, void *opaque
)
2292 struct its_device
*dev
;
2294 u8 num_eventid_bits
;
2295 u64 entry
= *(u64
*)ptr
;
2300 entry
= le64_to_cpu(entry
);
2302 valid
= entry
>> KVM_ITS_DTE_VALID_SHIFT
;
2303 num_eventid_bits
= (entry
& KVM_ITS_DTE_SIZE_MASK
) + 1;
2304 itt_addr
= ((entry
& KVM_ITS_DTE_ITTADDR_MASK
)
2305 >> KVM_ITS_DTE_ITTADDR_SHIFT
) << 8;
2310 /* dte entry is valid */
2311 offset
= (entry
& KVM_ITS_DTE_NEXT_MASK
) >> KVM_ITS_DTE_NEXT_SHIFT
;
2313 dev
= vgic_its_alloc_device(its
, id
, itt_addr
, num_eventid_bits
);
2315 return PTR_ERR(dev
);
2317 ret
= vgic_its_restore_itt(its
, dev
);
2319 vgic_its_free_device(its
->dev
->kvm
, dev
);
2326 static int vgic_its_device_cmp(void *priv
, struct list_head
*a
,
2327 struct list_head
*b
)
2329 struct its_device
*deva
= container_of(a
, struct its_device
, dev_list
);
2330 struct its_device
*devb
= container_of(b
, struct its_device
, dev_list
);
2332 if (deva
->device_id
< devb
->device_id
)
2339 * vgic_its_save_device_tables - Save the device table and all ITT
2342 * L1/L2 handling is hidden by vgic_its_check_id() helper which directly
2343 * returns the GPA of the device entry
2345 static int vgic_its_save_device_tables(struct vgic_its
*its
)
2347 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2348 u64 baser
= its
->baser_device_table
;
2349 struct its_device
*dev
;
2350 int dte_esz
= abi
->dte_esz
;
2352 if (!(baser
& GITS_BASER_VALID
))
2355 list_sort(NULL
, &its
->device_list
, vgic_its_device_cmp
);
2357 list_for_each_entry(dev
, &its
->device_list
, dev_list
) {
2361 if (!vgic_its_check_id(its
, baser
,
2362 dev
->device_id
, &eaddr
))
2365 ret
= vgic_its_save_itt(its
, dev
);
2369 ret
= vgic_its_save_dte(its
, dev
, eaddr
, dte_esz
);
2377 * handle_l1_dte - callback used for L1 device table entries (2 stage case)
2380 * @id: index of the entry in the L1 table
2384 * L1 table entries are scanned by steps of 1 entry
2385 * Return < 0 if error, 0 if last dte was found when scanning the L2
2386 * table, +1 otherwise (meaning next L1 entry must be scanned)
2388 static int handle_l1_dte(struct vgic_its
*its
, u32 id
, void *addr
,
2391 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2392 int l2_start_id
= id
* (SZ_64K
/ abi
->dte_esz
);
2393 u64 entry
= *(u64
*)addr
;
2394 int dte_esz
= abi
->dte_esz
;
2398 entry
= le64_to_cpu(entry
);
2400 if (!(entry
& KVM_ITS_L1E_VALID_MASK
))
2403 gpa
= entry
& KVM_ITS_L1E_ADDR_MASK
;
2405 ret
= scan_its_table(its
, gpa
, SZ_64K
, dte_esz
,
2406 l2_start_id
, vgic_its_restore_dte
, NULL
);
2412 * vgic_its_restore_device_tables - Restore the device table and all ITT
2413 * from guest RAM to internal data structs
2415 static int vgic_its_restore_device_tables(struct vgic_its
*its
)
2417 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2418 u64 baser
= its
->baser_device_table
;
2420 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2423 if (!(baser
& GITS_BASER_VALID
))
2426 l1_gpa
= GITS_BASER_ADDR_48_to_52(baser
);
2428 if (baser
& GITS_BASER_INDIRECT
) {
2429 l1_esz
= GITS_LVL1_ENTRY_SIZE
;
2430 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2431 handle_l1_dte
, NULL
);
2433 l1_esz
= abi
->dte_esz
;
2434 ret
= scan_its_table(its
, l1_gpa
, l1_tbl_size
, l1_esz
, 0,
2435 vgic_its_restore_dte
, NULL
);
2438 /* scan_its_table returns +1 if all entries are invalid */
2445 static int vgic_its_save_cte(struct vgic_its
*its
,
2446 struct its_collection
*collection
,
2451 val
= (1ULL << KVM_ITS_CTE_VALID_SHIFT
|
2452 ((u64
)collection
->target_addr
<< KVM_ITS_CTE_RDBASE_SHIFT
) |
2453 collection
->collection_id
);
2454 val
= cpu_to_le64(val
);
2455 return kvm_write_guest_lock(its
->dev
->kvm
, gpa
, &val
, esz
);
2458 static int vgic_its_restore_cte(struct vgic_its
*its
, gpa_t gpa
, int esz
)
2460 struct its_collection
*collection
;
2461 struct kvm
*kvm
= its
->dev
->kvm
;
2462 u32 target_addr
, coll_id
;
2466 BUG_ON(esz
> sizeof(val
));
2467 ret
= kvm_read_guest_lock(kvm
, gpa
, &val
, esz
);
2470 val
= le64_to_cpu(val
);
2471 if (!(val
& KVM_ITS_CTE_VALID_MASK
))
2474 target_addr
= (u32
)(val
>> KVM_ITS_CTE_RDBASE_SHIFT
);
2475 coll_id
= val
& KVM_ITS_CTE_ICID_MASK
;
2477 if (target_addr
!= COLLECTION_NOT_MAPPED
&&
2478 target_addr
>= atomic_read(&kvm
->online_vcpus
))
2481 collection
= find_collection(its
, coll_id
);
2484 ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
2487 collection
->target_addr
= target_addr
;
2492 * vgic_its_save_collection_table - Save the collection table into
2495 static int vgic_its_save_collection_table(struct vgic_its
*its
)
2497 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2498 u64 baser
= its
->baser_coll_table
;
2499 gpa_t gpa
= GITS_BASER_ADDR_48_to_52(baser
);
2500 struct its_collection
*collection
;
2502 size_t max_size
, filled
= 0;
2503 int ret
, cte_esz
= abi
->cte_esz
;
2505 if (!(baser
& GITS_BASER_VALID
))
2508 max_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2510 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
2511 ret
= vgic_its_save_cte(its
, collection
, gpa
, cte_esz
);
2518 if (filled
== max_size
)
2522 * table is not fully filled, add a last dummy element
2523 * with valid bit unset
2526 BUG_ON(cte_esz
> sizeof(val
));
2527 ret
= kvm_write_guest_lock(its
->dev
->kvm
, gpa
, &val
, cte_esz
);
2532 * vgic_its_restore_collection_table - reads the collection table
2533 * in guest memory and restores the ITS internal state. Requires the
2534 * BASER registers to be restored before.
2536 static int vgic_its_restore_collection_table(struct vgic_its
*its
)
2538 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2539 u64 baser
= its
->baser_coll_table
;
2540 int cte_esz
= abi
->cte_esz
;
2541 size_t max_size
, read
= 0;
2545 if (!(baser
& GITS_BASER_VALID
))
2548 gpa
= GITS_BASER_ADDR_48_to_52(baser
);
2550 max_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
2552 while (read
< max_size
) {
2553 ret
= vgic_its_restore_cte(its
, gpa
, cte_esz
);
2567 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
2568 * according to v0 ABI
2570 static int vgic_its_save_tables_v0(struct vgic_its
*its
)
2574 ret
= vgic_its_save_device_tables(its
);
2578 return vgic_its_save_collection_table(its
);
2582 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
2583 * to internal data structs according to V0 ABI
2586 static int vgic_its_restore_tables_v0(struct vgic_its
*its
)
2590 ret
= vgic_its_restore_collection_table(its
);
2594 return vgic_its_restore_device_tables(its
);
2597 static int vgic_its_commit_v0(struct vgic_its
*its
)
2599 const struct vgic_its_abi
*abi
;
2601 abi
= vgic_its_get_abi(its
);
2602 its
->baser_coll_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2603 its
->baser_device_table
&= ~GITS_BASER_ENTRY_SIZE_MASK
;
2605 its
->baser_coll_table
|= (GIC_ENCODE_SZ(abi
->cte_esz
, 5)
2606 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2608 its
->baser_device_table
|= (GIC_ENCODE_SZ(abi
->dte_esz
, 5)
2609 << GITS_BASER_ENTRY_SIZE_SHIFT
);
2613 static void vgic_its_reset(struct kvm
*kvm
, struct vgic_its
*its
)
2615 /* We need to keep the ABI specific field values */
2616 its
->baser_coll_table
&= ~GITS_BASER_VALID
;
2617 its
->baser_device_table
&= ~GITS_BASER_VALID
;
2622 vgic_its_free_device_list(kvm
, its
);
2623 vgic_its_free_collection_list(kvm
, its
);
2626 static int vgic_its_has_attr(struct kvm_device
*dev
,
2627 struct kvm_device_attr
*attr
)
2629 switch (attr
->group
) {
2630 case KVM_DEV_ARM_VGIC_GRP_ADDR
:
2631 switch (attr
->attr
) {
2632 case KVM_VGIC_ITS_ADDR_TYPE
:
2636 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
2637 switch (attr
->attr
) {
2638 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
2640 case KVM_DEV_ARM_ITS_CTRL_RESET
:
2642 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2644 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2648 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
:
2649 return vgic_its_has_attr_regs(dev
, attr
);
2654 static int vgic_its_ctrl(struct kvm
*kvm
, struct vgic_its
*its
, u64 attr
)
2656 const struct vgic_its_abi
*abi
= vgic_its_get_abi(its
);
2659 if (attr
== KVM_DEV_ARM_VGIC_CTRL_INIT
) /* Nothing to do */
2662 mutex_lock(&kvm
->lock
);
2663 mutex_lock(&its
->its_lock
);
2665 if (!lock_all_vcpus(kvm
)) {
2666 mutex_unlock(&its
->its_lock
);
2667 mutex_unlock(&kvm
->lock
);
2672 case KVM_DEV_ARM_ITS_CTRL_RESET
:
2673 vgic_its_reset(kvm
, its
);
2675 case KVM_DEV_ARM_ITS_SAVE_TABLES
:
2676 ret
= abi
->save_tables(its
);
2678 case KVM_DEV_ARM_ITS_RESTORE_TABLES
:
2679 ret
= abi
->restore_tables(its
);
2683 unlock_all_vcpus(kvm
);
2684 mutex_unlock(&its
->its_lock
);
2685 mutex_unlock(&kvm
->lock
);
2689 static int vgic_its_set_attr(struct kvm_device
*dev
,
2690 struct kvm_device_attr
*attr
)
2692 struct vgic_its
*its
= dev
->private;
2695 switch (attr
->group
) {
2696 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2697 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2698 unsigned long type
= (unsigned long)attr
->attr
;
2701 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2704 if (copy_from_user(&addr
, uaddr
, sizeof(addr
)))
2707 ret
= vgic_check_ioaddr(dev
->kvm
, &its
->vgic_its_base
,
2712 return vgic_register_its_iodev(dev
->kvm
, its
, addr
);
2714 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
2715 return vgic_its_ctrl(dev
->kvm
, its
, attr
->attr
);
2716 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2717 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2720 if (get_user(reg
, uaddr
))
2723 return vgic_its_attr_regs_access(dev
, attr
, ®
, true);
2729 static int vgic_its_get_attr(struct kvm_device
*dev
,
2730 struct kvm_device_attr
*attr
)
2732 switch (attr
->group
) {
2733 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
2734 struct vgic_its
*its
= dev
->private;
2735 u64 addr
= its
->vgic_its_base
;
2736 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2737 unsigned long type
= (unsigned long)attr
->attr
;
2739 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
2742 if (copy_to_user(uaddr
, &addr
, sizeof(addr
)))
2746 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS
: {
2747 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
2751 ret
= vgic_its_attr_regs_access(dev
, attr
, ®
, false);
2754 return put_user(reg
, uaddr
);
2763 static struct kvm_device_ops kvm_arm_vgic_its_ops
= {
2764 .name
= "kvm-arm-vgic-its",
2765 .create
= vgic_its_create
,
2766 .destroy
= vgic_its_destroy
,
2767 .set_attr
= vgic_its_set_attr
,
2768 .get_attr
= vgic_its_get_attr
,
2769 .has_attr
= vgic_its_has_attr
,
2772 int kvm_vgic_register_its_device(void)
2774 return kvm_register_device_ops(&kvm_arm_vgic_its_ops
,
2775 KVM_DEV_TYPE_ARM_VGIC_ITS
);