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1 From 65c7d070850e109a8a75a431f5a7f6eb4c007b77 Mon Sep 17 00:00:00 2001
2 From: Nicholas Piggin <npiggin@gmail.com>
3 Date: Mon, 3 May 2021 23:02:40 +1000
4 Subject: powerpc/pseries: Get entry and uaccess flush required bits from H_GET_CPU_CHARACTERISTICS
5
6 From: Nicholas Piggin <npiggin@gmail.com>
7
8 commit 65c7d070850e109a8a75a431f5a7f6eb4c007b77 upstream.
9
10 This allows the hypervisor / firmware to describe these workarounds to
11 the guest.
12
13 Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
14 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
15 Link: https://lore.kernel.org/r/20210503130243.891868-2-npiggin@gmail.com
16 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
17 ---
18 arch/powerpc/include/asm/hvcall.h | 2 ++
19 arch/powerpc/platforms/pseries/setup.c | 6 ++++++
20 2 files changed, 8 insertions(+)
21
22 --- a/arch/powerpc/include/asm/hvcall.h
23 +++ b/arch/powerpc/include/asm/hvcall.h
24 @@ -382,6 +382,8 @@
25 #define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ull << 61) // IBM bit 2
26 #define H_CPU_BEHAV_FLUSH_COUNT_CACHE (1ull << 58) // IBM bit 5
27 #define H_CPU_BEHAV_FLUSH_LINK_STACK (1ull << 57) // IBM bit 6
28 +#define H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY (1ull << 56) // IBM bit 7
29 +#define H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS (1ull << 55) // IBM bit 8
30
31 /* Flag values used in H_REGISTER_PROC_TBL hcall */
32 #define PROC_TABLE_OP_MASK 0x18
33 --- a/arch/powerpc/platforms/pseries/setup.c
34 +++ b/arch/powerpc/platforms/pseries/setup.c
35 @@ -538,6 +538,12 @@ static void init_cpu_char_feature_flags(
36 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
37 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
38
39 + if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY)
40 + security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
41 +
42 + if (result->behaviour & H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS)
43 + security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
44 +
45 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
46 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
47 }