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   1 From foo@baz Mon Feb 26 20:55:53 CET 2018
   2 From: Dan Williams <dan.j.williams@intel.com>
   3 Date: Fri, 23 Feb 2018 14:06:21 -0800
   4 Subject: x86/entry/64: Clear extra registers beyond syscall arguments, to reduce speculation attack surface
   5 To: gregkh@linuxfoundation.org
   6 Cc: Andi Kleen <ak@linux.intel.com>, Denys Vlasenko <dvlasenk@redhat.com>, Peter Zijlstra <peterz@infradead.org>, Brian Gerst <brgerst@gmail.com>, "H. Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>, Josh Poimboeuf <jpoimboe@redhat.com>, Thomas Gleixner <tglx@linutronix.de>, Linus Torvalds <torvalds@linux-foundation.org>, Ingo Molnar <mingo@kernel.org>
   7 Message-ID: <151942358116.21775.14209781084277174517.stgit@dwillia2-desk3.amr.corp.intel.com>
   8
   9 From: Dan Williams <dan.j.williams@intel.com>
  10
  11 commit 8e1eb3fa009aa7c0b944b3c8b26b07de0efb3200 upstream.
  12
  13 At entry userspace may have (maliciously) populated the extra registers
  14 outside the syscall calling convention with arbitrary values that could
  15 be useful in a speculative execution (Spectre style) attack.
  16
  17 Clear these registers to minimize the kernel's attack surface.
  18
  19 Note, this only clears the extra registers and not the unused
  20 registers for syscalls less than 6 arguments, since those registers are
  21 likely to be clobbered well before their values could be put to use
  22 under speculation.
  23
  24 Note, Linus found that the XOR instructions can be executed with
  25 minimized cost if interleaved with the PUSH instructions, and Ingo's
  26 analysis found that R10 and R11 should be included in the register
  27 clearing beyond the typical 'extra' syscall calling convention
  28 registers.
  29
  30 Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
  31 Reported-by: Andi Kleen <ak@linux.intel.com>
  32 Signed-off-by: Dan Williams <dan.j.williams@intel.com>
  33 Cc: <stable@vger.kernel.org>
  34 Cc: Andy Lutomirski <luto@kernel.org>
  35 Cc: Borislav Petkov <bp@alien8.de>
  36 Cc: Brian Gerst <brgerst@gmail.com>
  37 Cc: Denys Vlasenko <dvlasenk@redhat.com>
  38 Cc: H. Peter Anvin <hpa@zytor.com>
  39 Cc: Josh Poimboeuf <jpoimboe@redhat.com>
  40 Cc: Peter Zijlstra <peterz@infradead.org>
  41 Cc: Thomas Gleixner <tglx@linutronix.de>
  42 Link: http://lkml.kernel.org/r/151787988577.7847.16733592218894189003.stgit@dwillia2-desk3.amr.corp.intel.com
  43 [ Made small improvements to the changelog and the code comments. ]
  44 Signed-off-by: Ingo Molnar <mingo@kernel.org>
  45 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  46 ---
  47  arch/x86/entry/entry_64.S |   13 +++++++++++++
  48  1 file changed, 13 insertions(+)
  49
  50 --- a/arch/x86/entry/entry_64.S
  51 +++ b/arch/x86/entry/entry_64.S
  52 @@ -176,13 +176,26 @@ GLOBAL(entry_SYSCALL_64_after_swapgs)
  53         pushq   %r8                             /* pt_regs->r8 */
  54         pushq   %r9                             /* pt_regs->r9 */
  55         pushq   %r10                            /* pt_regs->r10 */
  56 +       /*
  57 +        * Clear extra registers that a speculation attack might
  58 +        * otherwise want to exploit. Interleave XOR with PUSH
  59 +        * for better uop scheduling:
  60 +        */
  61 +       xorq    %r10, %r10                      /* nospec   r10 */
  62         pushq   %r11                            /* pt_regs->r11 */
  63 +       xorq    %r11, %r11                      /* nospec   r11 */
  64         pushq   %rbx                            /* pt_regs->rbx */
  65 +       xorl    %ebx, %ebx                      /* nospec   rbx */
  66         pushq   %rbp                            /* pt_regs->rbp */
  67 +       xorl    %ebp, %ebp                      /* nospec   rbp */
  68         pushq   %r12                            /* pt_regs->r12 */
  69 +       xorq    %r12, %r12                      /* nospec   r12 */
  70         pushq   %r13                            /* pt_regs->r13 */
  71 +       xorq    %r13, %r13                      /* nospec   r13 */
  72         pushq   %r14                            /* pt_regs->r14 */
  73 +       xorq    %r14, %r14                      /* nospec   r14 */
  74         pushq   %r15                            /* pt_regs->r15 */
  75 +       xorq    %r15, %r15                      /* nospec   r15 */
  76
  77         /* IRQs are off. */
  78         movq    %rsp, %rdi