git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob

   1 From 4528752f49c1f4025473d12bc5fa9181085c3f22 Mon Sep 17 00:00:00 2001
   2 From: Darrick J. Wong <djwong@us.ibm.com>
   3 Date: Wed, 2 Dec 2009 15:05:56 -0800
   4 Subject: x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking up the PCI tree
   5
   6 From: Darrick J. Wong <djwong@us.ibm.com>
   7
   8 commit 4528752f49c1f4025473d12bc5fa9181085c3f22 upstream.
   9
  10 On a multi-node x3950M2 system, there's a slight oddity in the
  11 PCI device tree for all secondary nodes:
  12
  13  30:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev e1)
  14   \-33:00.0 PCI bridge: IBM CalIOC2 PCI-E Root Port (rev 01)
  15      \-34:00.0 RAID bus controller: LSI Logic / Symbios Logic MegaRAID SAS 1078 (rev 04)
  16
  17 ...as compared to the primary node:
  18
  19  00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev e1)
  20   \-01:00.0 VGA compatible controller: ATI Technologies Inc ES1000 (rev 02)
  21  03:00.0 PCI bridge: IBM CalIOC2 PCI-E Root Port (rev 01)
  22   \-04:00.0 RAID bus controller: LSI Logic / Symbios Logic MegaRAID SAS 1078 (rev 04)
  23
  24 In both nodes, the LSI RAID controller hangs off a CalIOC2
  25 device, but on the secondary nodes, the BIOS hides the VGA
  26 device and substitutes the device tree ending with the disk
  27 controller.
  28
  29 It would seem that Calgary devices don't necessarily appear at
  30 the top of the PCI tree, which means that the current code to
  31 find the Calgary IOMMU that goes with a particular device is
  32 buggy.
  33
  34 Rather than walk all the way to the top of the PCI
  35 device tree and try to match bus number with Calgary descriptor,
  36 the code needs to examine each parent of the particular device;
  37 if it encounters a Calgary with a matching bus number, simply
  38 use that.
  39
  40 Otherwise, we BUG() when the bus number of the Calgary doesn't
  41 match the bus number of whatever's at the top of the device tree.
  42
  43 Extra note: This patch appears to work correctly for the x3950
  44 that came before the x3950 M2.
  45
  46 Signed-off-by: Darrick J. Wong <djwong@us.ibm.com>
  47 Acked-by: Muli Ben-Yehuda <muli@il.ibm.com>
  48 Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
  49 Cc: Joerg Roedel <joerg.roedel@amd.com>
  50 Cc: Yinghai Lu <yhlu.kernel@gmail.com>
  51 Cc: Jon D. Mason <jdmason@kudzu.us>
  52 Cc: Corinna Schultz <coschult@us.ibm.com>
  53 LKML-Reference: <20091202230556.GG10295@tux1.beaverton.ibm.com>
  54 Signed-off-by: Ingo Molnar <mingo@elte.hu>
  55 Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
  56
  57 ---
  58  arch/x86/kernel/pci-calgary_64.c |   12 +++++++-----
  59  1 file changed, 7 insertions(+), 5 deletions(-)
  60
  61 --- a/arch/x86/kernel/pci-calgary_64.c
  62 +++ b/arch/x86/kernel/pci-calgary_64.c
  63 @@ -377,13 +377,15 @@ static inline struct iommu_table *find_i
  64
  65         pdev = to_pci_dev(dev);
  66
  67 +       /* search up the device tree for an iommu */
  68         pbus = pdev->bus;
  69 -
  70 -       /* is the device behind a bridge? Look for the root bus */
  71 -       while (pbus->parent)
  72 +       do {
  73 +               tbl = pci_iommu(pbus);
  74 +               if (tbl && tbl->it_busno == pbus->number)
  75 +                       break;
  76 +               tbl = NULL;
  77                 pbus = pbus->parent;
  78 -
  79 -       tbl = pci_iommu(pbus);
  80 +       } while (pbus);
  81
  82         BUG_ON(tbl && (tbl->it_busno != pbus->number));
  83