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1 From foo@baz Sun May 27 16:52:54 CEST 2018
2 From: Sai Praneeth <sai.praneeth.prakhya@intel.com>
3 Date: Wed, 4 Apr 2018 12:34:19 -0700
4 Subject: x86/mm: Fix bogus warning during EFI bootup, use boot_cpu_has() instead of this_cpu_has() in build_cr3_noflush()
5
6 From: Sai Praneeth <sai.praneeth.prakhya@intel.com>
7
8 [ Upstream commit 162ee5a8ab49be40d253f90e94aef712470a3a24 ]
9
10 Linus reported the following boot warning:
11
12 WARNING: CPU: 0 PID: 0 at arch/x86/include/asm/tlbflush.h:134 load_new_mm_cr3+0x114/0x170
13 [...]
14 Call Trace:
15 switch_mm_irqs_off+0x267/0x590
16 switch_mm+0xe/0x20
17 efi_switch_mm+0x3e/0x50
18 efi_enter_virtual_mode+0x43f/0x4da
19 start_kernel+0x3bf/0x458
20 secondary_startup_64+0xa5/0xb0
21
22 ... after merging:
23
24 03781e40890c: x86/efi: Use efi_switch_mm() rather than manually twiddling with %cr3
25
26 When the platform supports PCID and if CONFIG_DEBUG_VM=y is enabled,
27 build_cr3_noflush() (called via switch_mm()) does a sanity check to see
28 if X86_FEATURE_PCID is set.
29
30 Presently, build_cr3_noflush() uses "this_cpu_has(X86_FEATURE_PCID)" to
31 perform the check but this_cpu_has() works only after SMP is initialized
32 (i.e. per cpu cpu_info's should be populated) and this happens to be very
33 late in the boot process (during rest_init()).
34
35 As efi_runtime_services() are called during (early) kernel boot time
36 and run time, modify build_cr3_noflush() to use boot_cpu_has() all the
37 time. As suggested by Dave Hansen, this should be OK because all CPU's have
38 same capabilities on x86.
39
40 With this change the warning is fixed.
41
42 ( Dave also suggested that we put a warning in this_cpu_has() if it's used
43 early in the boot process. This is still work in progress as it affects
44 MCE. )
45
46 Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
47 Signed-off-by: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
48 Cc: Andrew Morton <akpm@linux-foundation.org>
49 Cc: Andy Lutomirski <luto@kernel.org>
50 Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
51 Cc: Borislav Petkov <bp@alien8.de>
52 Cc: Dave Hansen <dave.hansen@intel.com>
53 Cc: Lee Chun-Yi <jlee@suse.com>
54 Cc: Matt Fleming <matt@codeblueprint.co.uk>
55 Cc: Michael S. Tsirkin <mst@redhat.com>
56 Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
57 Cc: Peter Zijlstra <peterz@infradead.org>
58 Cc: Ravi Shankar <ravi.v.shankar@intel.com>
59 Cc: Ricardo Neri <ricardo.neri@intel.com>
60 Cc: Thomas Gleixner <tglx@linutronix.de>
61 Cc: Tony Luck <tony.luck@intel.com>
62 Cc: linux-efi@vger.kernel.org
63 Link: http://lkml.kernel.org/r/1522870459-7432-1-git-send-email-sai.praneeth.prakhya@intel.com
64 Signed-off-by: Ingo Molnar <mingo@kernel.org>
65 Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
66 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
67 ---
68 arch/x86/include/asm/tlbflush.h | 7 ++++++-
69 1 file changed, 6 insertions(+), 1 deletion(-)
70
71 --- a/arch/x86/include/asm/tlbflush.h
72 +++ b/arch/x86/include/asm/tlbflush.h
73 @@ -131,7 +131,12 @@ static inline unsigned long build_cr3(pg
74 static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid)
75 {
76 VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE);
77 - VM_WARN_ON_ONCE(!this_cpu_has(X86_FEATURE_PCID));
78 + /*
79 + * Use boot_cpu_has() instead of this_cpu_has() as this function
80 + * might be called during early boot. This should work even after
81 + * boot because all CPU's the have same capabilities:
82 + */
83 + VM_WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_PCID));
84 return __sme_pa(pgd) | kern_pcid(asid) | CR3_NOFLUSH;
85 }
86