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1 From b13b1d2d8692b437203de7a404c6b809d2cc4d99 Mon Sep 17 00:00:00 2001
2 From: Shaohua Li <shli@kernel.org>
3 Date: Tue, 8 Apr 2014 15:58:09 +0800
4 Subject: x86/mm: In the PTE swapout page reclaim case clear the accessed bit instead of flushing the TLB
5
6 From: Shaohua Li <shli@kernel.org>
7
8 commit b13b1d2d8692b437203de7a404c6b809d2cc4d99 upstream.
9
10 We use the accessed bit to age a page at page reclaim time,
11 and currently we also flush the TLB when doing so.
12
13 But in some workloads TLB flush overhead is very heavy. In my
14 simple multithreaded app with a lot of swap to several pcie
15 SSDs, removing the tlb flush gives about 20% ~ 30% swapout
16 speedup.
17
18 Fortunately just removing the TLB flush is a valid optimization:
19 on x86 CPUs, clearing the accessed bit without a TLB flush
20 doesn't cause data corruption.
21
22 It could cause incorrect page aging and the (mistaken) reclaim of
23 hot pages, but the chance of that should be relatively low.
24
25 So as a performance optimization don't flush the TLB when
26 clearing the accessed bit, it will eventually be flushed by
27 a context switch or a VM operation anyway. [ In the rare
28 event of it not getting flushed for a long time the delay
29 shouldn't really matter because there's no real memory
30 pressure for swapout to react to. ]
31
32 Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
33 Signed-off-by: Shaohua Li <shli@fusionio.com>
34 Acked-by: Rik van Riel <riel@redhat.com>
35 Acked-by: Mel Gorman <mgorman@suse.de>
36 Acked-by: Hugh Dickins <hughd@google.com>
37 Acked-by: Johannes Weiner <hannes@cmpxchg.org>
38 Cc: linux-mm@kvack.org
39 Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
40 Link: http://lkml.kernel.org/r/20140408075809.GA1764@kernel.org
41 [ Rewrote the changelog and the code comments. ]
42 Signed-off-by: Ingo Molnar <mingo@kernel.org>
43 Signed-off-by: Mel Gorman <mgorman@suse.de>
44 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
45
46 ---
47 arch/x86/mm/pgtable.c | 21 ++++++++++++++-------
48 1 file changed, 14 insertions(+), 7 deletions(-)
49
50 --- a/arch/x86/mm/pgtable.c
51 +++ b/arch/x86/mm/pgtable.c
52 @@ -399,13 +399,20 @@ int pmdp_test_and_clear_young(struct vm_
53 int ptep_clear_flush_young(struct vm_area_struct *vma,
54 unsigned long address, pte_t *ptep)
55 {
56 - int young;
57 -
58 - young = ptep_test_and_clear_young(vma, address, ptep);
59 - if (young)
60 - flush_tlb_page(vma, address);
61 -
62 - return young;
63 + /*
64 + * On x86 CPUs, clearing the accessed bit without a TLB flush
65 + * doesn't cause data corruption. [ It could cause incorrect
66 + * page aging and the (mistaken) reclaim of hot pages, but the
67 + * chance of that should be relatively low. ]
68 + *
69 + * So as a performance optimization don't flush the TLB when
70 + * clearing the accessed bit, it will eventually be flushed by
71 + * a context switch or a VM operation anyway. [ In the rare
72 + * event of it not getting flushed for a long time the delay
73 + * shouldn't really matter because there's no real memory
74 + * pressure for swapout to react to. ]
75 + */
76 + return ptep_test_and_clear_young(vma, address, ptep);
77 }
78
79 #ifdef CONFIG_TRANSPARENT_HUGEPAGE