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1 From 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6 Mon Sep 17 00:00:00 2001
2 From: Mason Chang <mason-cw.chang@mediatek.com>
3 Date: Mon, 26 May 2025 18:26:58 +0800
4 Subject: thermal/drivers/mediatek/lvts_thermal: Add lvts commands and their sizes to driver data
5
6 From: Mason Chang <mason-cw.chang@mediatek.com>
7
8 commit 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6 upstream.
9
10 Add LVTS commands and their sizes to driver data in preparation for
11 adding different commands.
12
13 Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
14 Link: https://lore.kernel.org/r/20250526102659.30225-3-mason-cw.chang@mediatek.com
15 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
16 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
17 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 ---
19 drivers/thermal/mediatek/lvts_thermal.c | 65 +++++++++++++++++++++++++-------
20 1 file changed, 52 insertions(+), 13 deletions(-)
21
22 --- a/drivers/thermal/mediatek/lvts_thermal.c
23 +++ b/drivers/thermal/mediatek/lvts_thermal.c
24 @@ -96,17 +96,6 @@
25
26 #define LVTS_MINIMUM_THRESHOLD 20000
27
28 -static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
29 -/*
30 - * Write device mask: 0xC1030000
31 - */
32 -static const u32 default_init_cmds[] = {
33 - 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
34 - 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
35 - 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
36 - 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
37 -};
38 -
39 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
40 static int golden_temp_offset;
41
42 @@ -136,7 +125,11 @@ struct lvts_ctrl_data {
43
44 struct lvts_data {
45 const struct lvts_ctrl_data *lvts_ctrl;
46 + const u32 *conn_cmd;
47 + const u32 *init_cmd;
48 int num_lvts_ctrl;
49 + int num_conn_cmd;
50 + int num_init_cmd;
51 int temp_factor;
52 int temp_offset;
53 int gt_calib_bit_offset;
54 @@ -996,9 +989,10 @@ static int lvts_ctrl_set_enable(struct l
55
56 static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
57 {
58 + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
59 u32 id;
60
61 - lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
62 + lvts_write_config(lvts_ctrl, lvts_data->conn_cmd, lvts_data->num_conn_cmd);
63
64 /*
65 * LVTS_ID : Get ID and status of the thermal controller
66 @@ -1017,7 +1011,9 @@ static int lvts_ctrl_connect(struct devi
67
68 static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
69 {
70 - lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
71 + const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
72 +
73 + lvts_write_config(lvts_ctrl, lvts_data->init_cmd, lvts_data->num_init_cmd);
74
75 return 0;
76 }
77 @@ -1446,6 +1442,17 @@ static int lvts_resume(struct device *de
78 return 0;
79 }
80
81 +static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
82 +/*
83 + * Write device mask: 0xC1030000
84 + */
85 +static const u32 default_init_cmds[] = {
86 + 0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
87 + 0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
88 + 0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
89 + 0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
90 +};
91 +
92 /*
93 * The MT8186 calibration data is stored as packed 3-byte little-endian
94 * values using a weird layout that makes sense only when viewed as a 32-bit
95 @@ -1740,7 +1747,11 @@ static const struct lvts_ctrl_data mt819
96
97 static const struct lvts_data mt7988_lvts_ap_data = {
98 .lvts_ctrl = mt7988_lvts_ap_data_ctrl,
99 + .conn_cmd = default_conn_cmds,
100 + .init_cmd = default_init_cmds,
101 .num_lvts_ctrl = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
102 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
103 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
104 .temp_factor = LVTS_COEFF_A_MT7988,
105 .temp_offset = LVTS_COEFF_B_MT7988,
106 .gt_calib_bit_offset = 24,
107 @@ -1748,7 +1759,11 @@ static const struct lvts_data mt7988_lvt
108
109 static const struct lvts_data mt8186_lvts_data = {
110 .lvts_ctrl = mt8186_lvts_data_ctrl,
111 + .conn_cmd = default_conn_cmds,
112 + .init_cmd = default_init_cmds,
113 .num_lvts_ctrl = ARRAY_SIZE(mt8186_lvts_data_ctrl),
114 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
115 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
116 .temp_factor = LVTS_COEFF_A_MT7988,
117 .temp_offset = LVTS_COEFF_B_MT7988,
118 .gt_calib_bit_offset = 24,
119 @@ -1757,7 +1772,11 @@ static const struct lvts_data mt8186_lvt
120
121 static const struct lvts_data mt8188_lvts_mcu_data = {
122 .lvts_ctrl = mt8188_lvts_mcu_data_ctrl,
123 + .conn_cmd = default_conn_cmds,
124 + .init_cmd = default_init_cmds,
125 .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
126 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
127 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
128 .temp_factor = LVTS_COEFF_A_MT8195,
129 .temp_offset = LVTS_COEFF_B_MT8195,
130 .gt_calib_bit_offset = 20,
131 @@ -1766,7 +1785,11 @@ static const struct lvts_data mt8188_lvt
132
133 static const struct lvts_data mt8188_lvts_ap_data = {
134 .lvts_ctrl = mt8188_lvts_ap_data_ctrl,
135 + .conn_cmd = default_conn_cmds,
136 + .init_cmd = default_init_cmds,
137 .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
138 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
139 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
140 .temp_factor = LVTS_COEFF_A_MT8195,
141 .temp_offset = LVTS_COEFF_B_MT8195,
142 .gt_calib_bit_offset = 20,
143 @@ -1775,7 +1798,11 @@ static const struct lvts_data mt8188_lvt
144
145 static const struct lvts_data mt8192_lvts_mcu_data = {
146 .lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
147 + .conn_cmd = default_conn_cmds,
148 + .init_cmd = default_init_cmds,
149 .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
150 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
151 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
152 .temp_factor = LVTS_COEFF_A_MT8195,
153 .temp_offset = LVTS_COEFF_B_MT8195,
154 .gt_calib_bit_offset = 24,
155 @@ -1784,7 +1811,11 @@ static const struct lvts_data mt8192_lvt
156
157 static const struct lvts_data mt8192_lvts_ap_data = {
158 .lvts_ctrl = mt8192_lvts_ap_data_ctrl,
159 + .conn_cmd = default_conn_cmds,
160 + .init_cmd = default_init_cmds,
161 .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
162 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
163 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
164 .temp_factor = LVTS_COEFF_A_MT8195,
165 .temp_offset = LVTS_COEFF_B_MT8195,
166 .gt_calib_bit_offset = 24,
167 @@ -1793,7 +1824,11 @@ static const struct lvts_data mt8192_lvt
168
169 static const struct lvts_data mt8195_lvts_mcu_data = {
170 .lvts_ctrl = mt8195_lvts_mcu_data_ctrl,
171 + .conn_cmd = default_conn_cmds,
172 + .init_cmd = default_init_cmds,
173 .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
174 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
175 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
176 .temp_factor = LVTS_COEFF_A_MT8195,
177 .temp_offset = LVTS_COEFF_B_MT8195,
178 .gt_calib_bit_offset = 24,
179 @@ -1802,7 +1837,11 @@ static const struct lvts_data mt8195_lvt
180
181 static const struct lvts_data mt8195_lvts_ap_data = {
182 .lvts_ctrl = mt8195_lvts_ap_data_ctrl,
183 + .conn_cmd = default_conn_cmds,
184 + .init_cmd = default_init_cmds,
185 .num_lvts_ctrl = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
186 + .num_conn_cmd = ARRAY_SIZE(default_conn_cmds),
187 + .num_init_cmd = ARRAY_SIZE(default_init_cmds),
188 .temp_factor = LVTS_COEFF_A_MT8195,
189 .temp_offset = LVTS_COEFF_B_MT8195,
190 .gt_calib_bit_offset = 24,
Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/stable-queue.git