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   1 From foo@baz Tue May 10 01:48:44 PM CEST 2022
   2 From: "Marek Behún" <kabel@kernel.org>
   3 Date: Wed,  4 May 2022 18:58:45 +0200
   4 Subject: PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME on emulated bridge
   5 To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Sasha Levin <sashal@kernel.org>
   6 Cc: stable@vger.kernel.org, pali@kernel.org, "Marek Behún" <kabel@kernel.org>
   7 Message-ID: <20220504165852.30089-13-kabel@kernel.org>
   8
   9 From: Pali Rohár <pali@kernel.org>
  10
  11 commit 7122bcb33295228c882c0aa32a04b2547beba2c3 upstream.
  12
  13 To optimize advk_pci_bridge_emul_pcie_conf_write() code, touch
  14 PCIE_ISR0_REG and PCIE_ISR0_MASK_REG registers only when it is really
  15 needed, when processing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME bits.
  16
  17 Link: https://lore.kernel.org/r/20220110015018.26359-16-kabel@kernel.org
  18 Signed-off-by: Pali Rohár <pali@kernel.org>
  19 Signed-off-by: Marek Behún <kabel@kernel.org>
  20 Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  21 Signed-off-by: Marek Behún <kabel@kernel.org>
  22 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  23 ---
  24  drivers/pci/controller/pci-aardvark.c |   20 +++++++++++---------
  25  1 file changed, 11 insertions(+), 9 deletions(-)
  26
  27 --- a/drivers/pci/controller/pci-aardvark.c
  28 +++ b/drivers/pci/controller/pci-aardvark.c
  29 @@ -925,19 +925,21 @@ advk_pci_bridge_emul_pcie_conf_write(str
  30                         advk_pcie_wait_for_retrain(pcie);
  31                 break;
  32
  33 -       case PCI_EXP_RTCTL: {
  34 +       case PCI_EXP_RTCTL:
  35                 /* Only mask/unmask PME interrupt */
  36 -               u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
  37 -                       ~PCIE_MSG_PM_PME_MASK;
  38 -               if ((new & PCI_EXP_RTCTL_PMEIE) == 0)
  39 -                       val |= PCIE_MSG_PM_PME_MASK;
  40 -               advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
  41 +               if (mask & PCI_EXP_RTCTL_PMEIE) {
  42 +                       u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
  43 +                       if (new & PCI_EXP_RTCTL_PMEIE)
  44 +                               val &= ~PCIE_MSG_PM_PME_MASK;
  45 +                       else
  46 +                               val |= PCIE_MSG_PM_PME_MASK;
  47 +                       advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
  48 +               }
  49                 break;
  50 -       }
  51
  52         case PCI_EXP_RTSTA:
  53 -               new = (new & PCI_EXP_RTSTA_PME) >> 9;
  54 -               advk_writel(pcie, new, PCIE_ISR0_REG);
  55 +               if (new & PCI_EXP_RTSTA_PME)
  56 +                       advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG);
  57                 break;
  58
  59         case PCI_EXP_DEVCTL: