1 From: Lorenzo Bianconi <lorenzo@kernel.org>
2 Date: Tue, 12 Aug 2025 06:57:23 +0200
3 Subject: [PATCH] net: mediatek: wed: Introduce MT7992 WED support to MT7988
6 Introduce the second WDMA RX ring in WED driver for MT7988 SoC since the
7 Mediatek MT7992 WiFi chipset supports two separated WDMA rings.
8 Add missing MT7988 configurations to properly support WED for MT7992 in
11 Co-developed-by: Rex Lu <rex.lu@mediatek.com>
12 Signed-off-by: Rex Lu <rex.lu@mediatek.com>
13 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
14 Link: https://patch.msgid.link/20250812-mt7992-wed-support-v3-1-9ada78a819a4@kernel.org
15 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
18 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
19 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
20 @@ -59,7 +59,9 @@ struct mtk_wed_flow_block_priv {
21 static const struct mtk_wed_soc_data mt7622_data = {
24 - .wpdma_rx_ring0 = 0x770,
28 .reset_idx_tx_mask = GENMASK(3, 0),
29 .reset_idx_rx_mask = GENMASK(17, 16),
31 @@ -70,7 +72,9 @@ static const struct mtk_wed_soc_data mt7
32 static const struct mtk_wed_soc_data mt7986_data = {
35 - .wpdma_rx_ring0 = 0x770,
39 .reset_idx_tx_mask = GENMASK(1, 0),
40 .reset_idx_rx_mask = GENMASK(7, 6),
42 @@ -81,7 +85,10 @@ static const struct mtk_wed_soc_data mt7
43 static const struct mtk_wed_soc_data mt7988_data = {
46 - .wpdma_rx_ring0 = 0x7d0,
51 .reset_idx_tx_mask = GENMASK(1, 0),
52 .reset_idx_rx_mask = GENMASK(7, 6),
54 @@ -621,8 +628,8 @@ mtk_wed_amsdu_init(struct mtk_wed_device
58 - /* eagle E1 PCIE1 tx ring 22 flow control issue */
59 - if (dev->wlan.id == 0x7991)
60 + /* Kite and Eagle E1 PCIE1 tx ring 22 flow control issue */
61 + if (dev->wlan.id == 0x7991 || dev->wlan.id == 0x7992)
62 wed_clr(dev, MTK_WED_AMSDU_FIFO, MTK_WED_AMSDU_IS_PRIOR0_RING);
64 wed_set(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_AMSDU_EN);
65 @@ -1239,7 +1246,11 @@ mtk_wed_set_wpdma(struct mtk_wed_device
68 wed_w32(dev, MTK_WED_WPDMA_RX_GLO_CFG, dev->wlan.wpdma_rx_glo);
69 - wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring0, dev->wlan.wpdma_rx);
70 + wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring[0],
71 + dev->wlan.wpdma_rx[0]);
72 + if (mtk_wed_is_v3_or_greater(dev->hw))
73 + wed_w32(dev, dev->hw->soc->regmap.wpdma_rx_ring[1],
74 + dev->wlan.wpdma_rx[1]);
76 if (!dev->wlan.hw_rro)
78 @@ -2335,6 +2346,16 @@ mtk_wed_start(struct mtk_wed_device *dev
79 if (!dev->rx_wdma[i].desc)
80 mtk_wed_wdma_rx_ring_setup(dev, i, 16, false);
82 + if (dev->wlan.hw_rro) {
83 + for (i = 0; i < MTK_WED_RX_PAGE_QUEUES; i++) {
84 + u32 addr = MTK_WED_RRO_MSDU_PG_CTRL0(i) +
85 + MTK_WED_RING_OFS_COUNT;
87 + if (!wed_r32(dev, addr))
88 + wed_w32(dev, addr, 1);
93 mtk_wed_configure_irq(dev, irq_mask);
95 --- a/drivers/net/ethernet/mediatek/mtk_wed.h
96 +++ b/drivers/net/ethernet/mediatek/mtk_wed.h
97 @@ -17,7 +17,7 @@ struct mtk_wed_wo;
98 struct mtk_wed_soc_data {
101 - u32 wpdma_rx_ring0;
102 + u32 wpdma_rx_ring[MTK_WED_RX_QUEUES];
103 u32 reset_idx_tx_mask;
104 u32 reset_idx_rx_mask;
106 --- a/include/linux/soc/mediatek/mtk_wed.h
107 +++ b/include/linux/soc/mediatek/mtk_wed.h
108 @@ -147,7 +147,7 @@ struct mtk_wed_device {
113 + u32 wpdma_rx[MTK_WED_RX_QUEUES];
114 u32 wpdma_rx_rro[MTK_WED_RX_QUEUES];