git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob

   1 From 227545b9a08c68778ddd89428f99c351fc9315ac Mon Sep 17 00:00:00 2001
   2 From: Kai-Heng Feng <kai.heng.feng@canonical.com>
   3 Date: Fri, 30 Apr 2021 12:56:56 +0800
   4 Subject: drm/radeon/dpm: Disable sclk switching on Oland when two 4K 60Hz monitors are connected
   5
   6 From: Kai-Heng Feng <kai.heng.feng@canonical.com>
   7
   8 commit 227545b9a08c68778ddd89428f99c351fc9315ac upstream.
   9
  10 Screen flickers rapidly when two 4K 60Hz monitors are in use. This issue
  11 doesn't happen when one monitor is 4K 60Hz (pixelclock 594MHz) and
  12 another one is 4K 30Hz (pixelclock 297MHz).
  13
  14 The issue is gone after setting "power_dpm_force_performance_level" to
  15 "high". Following the indication, we found that the issue occurs when
  16 sclk is too low.
  17
  18 So resolve the issue by disabling sclk switching when there are two
  19 monitors requires high pixelclock (> 297MHz).
  20
  21 v2:
  22  - Only apply the fix to Oland.
  23 Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
  24 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
  25 Cc: stable@vger.kernel.org
  26 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  27 ---
  28  drivers/gpu/drm/radeon/radeon.h    |    1 +
  29  drivers/gpu/drm/radeon/radeon_pm.c |    8 ++++++++
  30  drivers/gpu/drm/radeon/si_dpm.c    |    3 +++
  31  3 files changed, 12 insertions(+)
  32
  33 --- a/drivers/gpu/drm/radeon/radeon.h
  34 +++ b/drivers/gpu/drm/radeon/radeon.h
  35 @@ -1559,6 +1559,7 @@ struct radeon_dpm {
  36         void                    *priv;
  37         u32                     new_active_crtcs;
  38         int                     new_active_crtc_count;
  39 +       int                     high_pixelclock_count;
  40         u32                     current_active_crtcs;
  41         int                     current_active_crtc_count;
  42         bool single_display;
  43 --- a/drivers/gpu/drm/radeon/radeon_pm.c
  44 +++ b/drivers/gpu/drm/radeon/radeon_pm.c
  45 @@ -1747,6 +1747,7 @@ static void radeon_pm_compute_clocks_dpm
  46         struct drm_device *ddev = rdev->ddev;
  47         struct drm_crtc *crtc;
  48         struct radeon_crtc *radeon_crtc;
  49 +       struct radeon_connector *radeon_connector;
  50
  51         if (!rdev->pm.dpm_enabled)
  52                 return;
  53 @@ -1756,6 +1757,7 @@ static void radeon_pm_compute_clocks_dpm
  54         /* update active crtc counts */
  55         rdev->pm.dpm.new_active_crtcs = 0;
  56         rdev->pm.dpm.new_active_crtc_count = 0;
  57 +       rdev->pm.dpm.high_pixelclock_count = 0;
  58         if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
  59                 list_for_each_entry(crtc,
  60                                     &ddev->mode_config.crtc_list, head) {
  61 @@ -1763,6 +1765,12 @@ static void radeon_pm_compute_clocks_dpm
  62                         if (crtc->enabled) {
  63                                 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
  64                                 rdev->pm.dpm.new_active_crtc_count++;
  65 +                               if (!radeon_crtc->connector)
  66 +                                       continue;
  67 +
  68 +                               radeon_connector = to_radeon_connector(radeon_crtc->connector);
  69 +                               if (radeon_connector->pixelclock_for_modeset > 297000)
  70 +                                       rdev->pm.dpm.high_pixelclock_count++;
  71                         }
  72                 }
  73         }
  74 --- a/drivers/gpu/drm/radeon/si_dpm.c
  75 +++ b/drivers/gpu/drm/radeon/si_dpm.c
  76 @@ -2982,6 +2982,9 @@ static void si_apply_state_adjust_rules(
  77                     (rdev->pdev->device == 0x6605)) {
  78                         max_sclk = 75000;
  79                 }
  80 +
  81 +               if (rdev->pm.dpm.high_pixelclock_count > 1)
  82 +                       disable_sclk_switching = true;
  83         }
  84
  85         if (rps->vce_active) {