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   1 ..
   2   Copyright 1988-2022 Free Software Foundation, Inc.
   3   This is part of the GCC manual.
   4   For copying conditions, see the copyright.rst file.
   5
   6 .. _mips-simd-architecture-(msa)-support:
   7
   8 MIPS SIMD Architecture (MSA) Support
   9 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  10
  11 GCC provides intrinsics to access the SIMD instructions provided by the
  12 MSA MIPS SIMD Architecture.  The interface is made available by including
  13 ``<msa.h>`` and using :option:`-mmsa -mhard-float -mfp64 -mnan=2008`.
  14 For each ``__builtin_msa_*``, there is a shortened name of the intrinsic,
  15 ``__msa_*``.
  16
  17 MSA implements 128-bit wide vector registers, operating on 8-, 16-, 32- and
  18 64-bit integer, 16- and 32-bit fixed-point, or 32- and 64-bit floating point
  19 data elements.  The following vectors typedefs are included in ``msa.h`` :
  20
  21 * ``v16i8``, a vector of sixteen signed 8-bit integers;
  22
  23 * ``v16u8``, a vector of sixteen unsigned 8-bit integers;
  24
  25 * ``v8i16``, a vector of eight signed 16-bit integers;
  26
  27 * ``v8u16``, a vector of eight unsigned 16-bit integers;
  28
  29 * ``v4i32``, a vector of four signed 32-bit integers;
  30
  31 * ``v4u32``, a vector of four unsigned 32-bit integers;
  32
  33 * ``v2i64``, a vector of two signed 64-bit integers;
  34
  35 * ``v2u64``, a vector of two unsigned 64-bit integers;
  36
  37 * ``v4f32``, a vector of four 32-bit floats;
  38
  39 * ``v2f64``, a vector of two 64-bit doubles.
  40
  41 Instructions and corresponding built-ins may have additional restrictions and/or
  42 input/output values manipulated:
  43
  44 * ``imm0_1``, an integer literal in range 0 to 1;
  45
  46 * ``imm0_3``, an integer literal in range 0 to 3;
  47
  48 * ``imm0_7``, an integer literal in range 0 to 7;
  49
  50 * ``imm0_15``, an integer literal in range 0 to 15;
  51
  52 * ``imm0_31``, an integer literal in range 0 to 31;
  53
  54 * ``imm0_63``, an integer literal in range 0 to 63;
  55
  56 * ``imm0_255``, an integer literal in range 0 to 255;
  57
  58 * ``imm_n16_15``, an integer literal in range -16 to 15;
  59
  60 * ``imm_n512_511``, an integer literal in range -512 to 511;
  61
  62 * ``imm_n1024_1022``, an integer literal in range -512 to 511 left
  63   shifted by 1 bit, i.e., -1024, -1022, ..., 1020, 1022;
  64
  65 * ``imm_n2048_2044``, an integer literal in range -512 to 511 left
  66   shifted by 2 bits, i.e., -2048, -2044, ..., 2040, 2044;
  67
  68 * ``imm_n4096_4088``, an integer literal in range -512 to 511 left
  69   shifted by 3 bits, i.e., -4096, -4088, ..., 4080, 4088;
  70
  71 * ``imm1_4``, an integer literal in range 1 to 4;
  72
  73 * ``i32, i64, u32, u64, f32, f64``, defined as follows:
  74
  75 .. code-block:: c++
  76
  77   {
  78   typedef int i32;
  79   #if __LONG_MAX__ == __LONG_LONG_MAX__
  80   typedef long i64;
  81   #else
  82   typedef long long i64;
  83   #endif
  84
  85   typedef unsigned int u32;
  86   #if __LONG_MAX__ == __LONG_LONG_MAX__
  87   typedef unsigned long u64;
  88   #else
  89   typedef unsigned long long u64;
  90   #endif
  91
  92   typedef double f64;
  93   typedef float f32;
  94   }
  95
  96 .. _mips-simd-architecture-built-in-functions:
  97
  98 MIPS SIMD Architecture Built-in Functions
  99 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 100
 101 The intrinsics provided are listed below; each is named after the
 102 machine instruction.
 103
 104 .. code-block:: c++
 105
 106   v16i8 __builtin_msa_add_a_b (v16i8, v16i8);
 107   v8i16 __builtin_msa_add_a_h (v8i16, v8i16);
 108   v4i32 __builtin_msa_add_a_w (v4i32, v4i32);
 109   v2i64 __builtin_msa_add_a_d (v2i64, v2i64);
 110
 111   v16i8 __builtin_msa_adds_a_b (v16i8, v16i8);
 112   v8i16 __builtin_msa_adds_a_h (v8i16, v8i16);
 113   v4i32 __builtin_msa_adds_a_w (v4i32, v4i32);
 114   v2i64 __builtin_msa_adds_a_d (v2i64, v2i64);
 115
 116   v16i8 __builtin_msa_adds_s_b (v16i8, v16i8);
 117   v8i16 __builtin_msa_adds_s_h (v8i16, v8i16);
 118   v4i32 __builtin_msa_adds_s_w (v4i32, v4i32);
 119   v2i64 __builtin_msa_adds_s_d (v2i64, v2i64);
 120
 121   v16u8 __builtin_msa_adds_u_b (v16u8, v16u8);
 122   v8u16 __builtin_msa_adds_u_h (v8u16, v8u16);
 123   v4u32 __builtin_msa_adds_u_w (v4u32, v4u32);
 124   v2u64 __builtin_msa_adds_u_d (v2u64, v2u64);
 125
 126   v16i8 __builtin_msa_addv_b (v16i8, v16i8);
 127   v8i16 __builtin_msa_addv_h (v8i16, v8i16);
 128   v4i32 __builtin_msa_addv_w (v4i32, v4i32);
 129   v2i64 __builtin_msa_addv_d (v2i64, v2i64);
 130
 131   v16i8 __builtin_msa_addvi_b (v16i8, imm0_31);
 132   v8i16 __builtin_msa_addvi_h (v8i16, imm0_31);
 133   v4i32 __builtin_msa_addvi_w (v4i32, imm0_31);
 134   v2i64 __builtin_msa_addvi_d (v2i64, imm0_31);
 135
 136   v16u8 __builtin_msa_and_v (v16u8, v16u8);
 137
 138   v16u8 __builtin_msa_andi_b (v16u8, imm0_255);
 139
 140   v16i8 __builtin_msa_asub_s_b (v16i8, v16i8);
 141   v8i16 __builtin_msa_asub_s_h (v8i16, v8i16);
 142   v4i32 __builtin_msa_asub_s_w (v4i32, v4i32);
 143   v2i64 __builtin_msa_asub_s_d (v2i64, v2i64);
 144
 145   v16u8 __builtin_msa_asub_u_b (v16u8, v16u8);
 146   v8u16 __builtin_msa_asub_u_h (v8u16, v8u16);
 147   v4u32 __builtin_msa_asub_u_w (v4u32, v4u32);
 148   v2u64 __builtin_msa_asub_u_d (v2u64, v2u64);
 149
 150   v16i8 __builtin_msa_ave_s_b (v16i8, v16i8);
 151   v8i16 __builtin_msa_ave_s_h (v8i16, v8i16);
 152   v4i32 __builtin_msa_ave_s_w (v4i32, v4i32);
 153   v2i64 __builtin_msa_ave_s_d (v2i64, v2i64);
 154
 155   v16u8 __builtin_msa_ave_u_b (v16u8, v16u8);
 156   v8u16 __builtin_msa_ave_u_h (v8u16, v8u16);
 157   v4u32 __builtin_msa_ave_u_w (v4u32, v4u32);
 158   v2u64 __builtin_msa_ave_u_d (v2u64, v2u64);
 159
 160   v16i8 __builtin_msa_aver_s_b (v16i8, v16i8);
 161   v8i16 __builtin_msa_aver_s_h (v8i16, v8i16);
 162   v4i32 __builtin_msa_aver_s_w (v4i32, v4i32);
 163   v2i64 __builtin_msa_aver_s_d (v2i64, v2i64);
 164
 165   v16u8 __builtin_msa_aver_u_b (v16u8, v16u8);
 166   v8u16 __builtin_msa_aver_u_h (v8u16, v8u16);
 167   v4u32 __builtin_msa_aver_u_w (v4u32, v4u32);
 168   v2u64 __builtin_msa_aver_u_d (v2u64, v2u64);
 169
 170   v16u8 __builtin_msa_bclr_b (v16u8, v16u8);
 171   v8u16 __builtin_msa_bclr_h (v8u16, v8u16);
 172   v4u32 __builtin_msa_bclr_w (v4u32, v4u32);
 173   v2u64 __builtin_msa_bclr_d (v2u64, v2u64);
 174
 175   v16u8 __builtin_msa_bclri_b (v16u8, imm0_7);
 176   v8u16 __builtin_msa_bclri_h (v8u16, imm0_15);
 177   v4u32 __builtin_msa_bclri_w (v4u32, imm0_31);
 178   v2u64 __builtin_msa_bclri_d (v2u64, imm0_63);
 179
 180   v16u8 __builtin_msa_binsl_b (v16u8, v16u8, v16u8);
 181   v8u16 __builtin_msa_binsl_h (v8u16, v8u16, v8u16);
 182   v4u32 __builtin_msa_binsl_w (v4u32, v4u32, v4u32);
 183   v2u64 __builtin_msa_binsl_d (v2u64, v2u64, v2u64);
 184
 185   v16u8 __builtin_msa_binsli_b (v16u8, v16u8, imm0_7);
 186   v8u16 __builtin_msa_binsli_h (v8u16, v8u16, imm0_15);
 187   v4u32 __builtin_msa_binsli_w (v4u32, v4u32, imm0_31);
 188   v2u64 __builtin_msa_binsli_d (v2u64, v2u64, imm0_63);
 189
 190   v16u8 __builtin_msa_binsr_b (v16u8, v16u8, v16u8);
 191   v8u16 __builtin_msa_binsr_h (v8u16, v8u16, v8u16);
 192   v4u32 __builtin_msa_binsr_w (v4u32, v4u32, v4u32);
 193   v2u64 __builtin_msa_binsr_d (v2u64, v2u64, v2u64);
 194
 195   v16u8 __builtin_msa_binsri_b (v16u8, v16u8, imm0_7);
 196   v8u16 __builtin_msa_binsri_h (v8u16, v8u16, imm0_15);
 197   v4u32 __builtin_msa_binsri_w (v4u32, v4u32, imm0_31);
 198   v2u64 __builtin_msa_binsri_d (v2u64, v2u64, imm0_63);
 199
 200   v16u8 __builtin_msa_bmnz_v (v16u8, v16u8, v16u8);
 201
 202   v16u8 __builtin_msa_bmnzi_b (v16u8, v16u8, imm0_255);
 203
 204   v16u8 __builtin_msa_bmz_v (v16u8, v16u8, v16u8);
 205
 206   v16u8 __builtin_msa_bmzi_b (v16u8, v16u8, imm0_255);
 207
 208   v16u8 __builtin_msa_bneg_b (v16u8, v16u8);
 209   v8u16 __builtin_msa_bneg_h (v8u16, v8u16);
 210   v4u32 __builtin_msa_bneg_w (v4u32, v4u32);
 211   v2u64 __builtin_msa_bneg_d (v2u64, v2u64);
 212
 213   v16u8 __builtin_msa_bnegi_b (v16u8, imm0_7);
 214   v8u16 __builtin_msa_bnegi_h (v8u16, imm0_15);
 215   v4u32 __builtin_msa_bnegi_w (v4u32, imm0_31);
 216   v2u64 __builtin_msa_bnegi_d (v2u64, imm0_63);
 217
 218   i32 __builtin_msa_bnz_b (v16u8);
 219   i32 __builtin_msa_bnz_h (v8u16);
 220   i32 __builtin_msa_bnz_w (v4u32);
 221   i32 __builtin_msa_bnz_d (v2u64);
 222
 223   i32 __builtin_msa_bnz_v (v16u8);
 224
 225   v16u8 __builtin_msa_bsel_v (v16u8, v16u8, v16u8);
 226
 227   v16u8 __builtin_msa_bseli_b (v16u8, v16u8, imm0_255);
 228
 229   v16u8 __builtin_msa_bset_b (v16u8, v16u8);
 230   v8u16 __builtin_msa_bset_h (v8u16, v8u16);
 231   v4u32 __builtin_msa_bset_w (v4u32, v4u32);
 232   v2u64 __builtin_msa_bset_d (v2u64, v2u64);
 233
 234   v16u8 __builtin_msa_bseti_b (v16u8, imm0_7);
 235   v8u16 __builtin_msa_bseti_h (v8u16, imm0_15);
 236   v4u32 __builtin_msa_bseti_w (v4u32, imm0_31);
 237   v2u64 __builtin_msa_bseti_d (v2u64, imm0_63);
 238
 239   i32 __builtin_msa_bz_b (v16u8);
 240   i32 __builtin_msa_bz_h (v8u16);
 241   i32 __builtin_msa_bz_w (v4u32);
 242   i32 __builtin_msa_bz_d (v2u64);
 243
 244   i32 __builtin_msa_bz_v (v16u8);
 245
 246   v16i8 __builtin_msa_ceq_b (v16i8, v16i8);
 247   v8i16 __builtin_msa_ceq_h (v8i16, v8i16);
 248   v4i32 __builtin_msa_ceq_w (v4i32, v4i32);
 249   v2i64 __builtin_msa_ceq_d (v2i64, v2i64);
 250
 251   v16i8 __builtin_msa_ceqi_b (v16i8, imm_n16_15);
 252   v8i16 __builtin_msa_ceqi_h (v8i16, imm_n16_15);
 253   v4i32 __builtin_msa_ceqi_w (v4i32, imm_n16_15);
 254   v2i64 __builtin_msa_ceqi_d (v2i64, imm_n16_15);
 255
 256   i32 __builtin_msa_cfcmsa (imm0_31);
 257
 258   v16i8 __builtin_msa_cle_s_b (v16i8, v16i8);
 259   v8i16 __builtin_msa_cle_s_h (v8i16, v8i16);
 260   v4i32 __builtin_msa_cle_s_w (v4i32, v4i32);
 261   v2i64 __builtin_msa_cle_s_d (v2i64, v2i64);
 262
 263   v16i8 __builtin_msa_cle_u_b (v16u8, v16u8);
 264   v8i16 __builtin_msa_cle_u_h (v8u16, v8u16);
 265   v4i32 __builtin_msa_cle_u_w (v4u32, v4u32);
 266   v2i64 __builtin_msa_cle_u_d (v2u64, v2u64);
 267
 268   v16i8 __builtin_msa_clei_s_b (v16i8, imm_n16_15);
 269   v8i16 __builtin_msa_clei_s_h (v8i16, imm_n16_15);
 270   v4i32 __builtin_msa_clei_s_w (v4i32, imm_n16_15);
 271   v2i64 __builtin_msa_clei_s_d (v2i64, imm_n16_15);
 272
 273   v16i8 __builtin_msa_clei_u_b (v16u8, imm0_31);
 274   v8i16 __builtin_msa_clei_u_h (v8u16, imm0_31);
 275   v4i32 __builtin_msa_clei_u_w (v4u32, imm0_31);
 276   v2i64 __builtin_msa_clei_u_d (v2u64, imm0_31);
 277
 278   v16i8 __builtin_msa_clt_s_b (v16i8, v16i8);
 279   v8i16 __builtin_msa_clt_s_h (v8i16, v8i16);
 280   v4i32 __builtin_msa_clt_s_w (v4i32, v4i32);
 281   v2i64 __builtin_msa_clt_s_d (v2i64, v2i64);
 282
 283   v16i8 __builtin_msa_clt_u_b (v16u8, v16u8);
 284   v8i16 __builtin_msa_clt_u_h (v8u16, v8u16);
 285   v4i32 __builtin_msa_clt_u_w (v4u32, v4u32);
 286   v2i64 __builtin_msa_clt_u_d (v2u64, v2u64);
 287
 288   v16i8 __builtin_msa_clti_s_b (v16i8, imm_n16_15);
 289   v8i16 __builtin_msa_clti_s_h (v8i16, imm_n16_15);
 290   v4i32 __builtin_msa_clti_s_w (v4i32, imm_n16_15);
 291   v2i64 __builtin_msa_clti_s_d (v2i64, imm_n16_15);
 292
 293   v16i8 __builtin_msa_clti_u_b (v16u8, imm0_31);
 294   v8i16 __builtin_msa_clti_u_h (v8u16, imm0_31);
 295   v4i32 __builtin_msa_clti_u_w (v4u32, imm0_31);
 296   v2i64 __builtin_msa_clti_u_d (v2u64, imm0_31);
 297
 298   i32 __builtin_msa_copy_s_b (v16i8, imm0_15);
 299   i32 __builtin_msa_copy_s_h (v8i16, imm0_7);
 300   i32 __builtin_msa_copy_s_w (v4i32, imm0_3);
 301   i64 __builtin_msa_copy_s_d (v2i64, imm0_1);
 302
 303   u32 __builtin_msa_copy_u_b (v16i8, imm0_15);
 304   u32 __builtin_msa_copy_u_h (v8i16, imm0_7);
 305   u32 __builtin_msa_copy_u_w (v4i32, imm0_3);
 306   u64 __builtin_msa_copy_u_d (v2i64, imm0_1);
 307
 308   void __builtin_msa_ctcmsa (imm0_31, i32);
 309
 310   v16i8 __builtin_msa_div_s_b (v16i8, v16i8);
 311   v8i16 __builtin_msa_div_s_h (v8i16, v8i16);
 312   v4i32 __builtin_msa_div_s_w (v4i32, v4i32);
 313   v2i64 __builtin_msa_div_s_d (v2i64, v2i64);
 314
 315   v16u8 __builtin_msa_div_u_b (v16u8, v16u8);
 316   v8u16 __builtin_msa_div_u_h (v8u16, v8u16);
 317   v4u32 __builtin_msa_div_u_w (v4u32, v4u32);
 318   v2u64 __builtin_msa_div_u_d (v2u64, v2u64);
 319
 320   v8i16 __builtin_msa_dotp_s_h (v16i8, v16i8);
 321   v4i32 __builtin_msa_dotp_s_w (v8i16, v8i16);
 322   v2i64 __builtin_msa_dotp_s_d (v4i32, v4i32);
 323
 324   v8u16 __builtin_msa_dotp_u_h (v16u8, v16u8);
 325   v4u32 __builtin_msa_dotp_u_w (v8u16, v8u16);
 326   v2u64 __builtin_msa_dotp_u_d (v4u32, v4u32);
 327
 328   v8i16 __builtin_msa_dpadd_s_h (v8i16, v16i8, v16i8);
 329   v4i32 __builtin_msa_dpadd_s_w (v4i32, v8i16, v8i16);
 330   v2i64 __builtin_msa_dpadd_s_d (v2i64, v4i32, v4i32);
 331
 332   v8u16 __builtin_msa_dpadd_u_h (v8u16, v16u8, v16u8);
 333   v4u32 __builtin_msa_dpadd_u_w (v4u32, v8u16, v8u16);
 334   v2u64 __builtin_msa_dpadd_u_d (v2u64, v4u32, v4u32);
 335
 336   v8i16 __builtin_msa_dpsub_s_h (v8i16, v16i8, v16i8);
 337   v4i32 __builtin_msa_dpsub_s_w (v4i32, v8i16, v8i16);
 338   v2i64 __builtin_msa_dpsub_s_d (v2i64, v4i32, v4i32);
 339
 340   v8i16 __builtin_msa_dpsub_u_h (v8i16, v16u8, v16u8);
 341   v4i32 __builtin_msa_dpsub_u_w (v4i32, v8u16, v8u16);
 342   v2i64 __builtin_msa_dpsub_u_d (v2i64, v4u32, v4u32);
 343
 344   v4f32 __builtin_msa_fadd_w (v4f32, v4f32);
 345   v2f64 __builtin_msa_fadd_d (v2f64, v2f64);
 346
 347   v4i32 __builtin_msa_fcaf_w (v4f32, v4f32);
 348   v2i64 __builtin_msa_fcaf_d (v2f64, v2f64);
 349
 350   v4i32 __builtin_msa_fceq_w (v4f32, v4f32);
 351   v2i64 __builtin_msa_fceq_d (v2f64, v2f64);
 352
 353   v4i32 __builtin_msa_fclass_w (v4f32);
 354   v2i64 __builtin_msa_fclass_d (v2f64);
 355
 356   v4i32 __builtin_msa_fcle_w (v4f32, v4f32);
 357   v2i64 __builtin_msa_fcle_d (v2f64, v2f64);
 358
 359   v4i32 __builtin_msa_fclt_w (v4f32, v4f32);
 360   v2i64 __builtin_msa_fclt_d (v2f64, v2f64);
 361
 362   v4i32 __builtin_msa_fcne_w (v4f32, v4f32);
 363   v2i64 __builtin_msa_fcne_d (v2f64, v2f64);
 364
 365   v4i32 __builtin_msa_fcor_w (v4f32, v4f32);
 366   v2i64 __builtin_msa_fcor_d (v2f64, v2f64);
 367
 368   v4i32 __builtin_msa_fcueq_w (v4f32, v4f32);
 369   v2i64 __builtin_msa_fcueq_d (v2f64, v2f64);
 370
 371   v4i32 __builtin_msa_fcule_w (v4f32, v4f32);
 372   v2i64 __builtin_msa_fcule_d (v2f64, v2f64);
 373
 374   v4i32 __builtin_msa_fcult_w (v4f32, v4f32);
 375   v2i64 __builtin_msa_fcult_d (v2f64, v2f64);
 376
 377   v4i32 __builtin_msa_fcun_w (v4f32, v4f32);
 378   v2i64 __builtin_msa_fcun_d (v2f64, v2f64);
 379
 380   v4i32 __builtin_msa_fcune_w (v4f32, v4f32);
 381   v2i64 __builtin_msa_fcune_d (v2f64, v2f64);
 382
 383   v4f32 __builtin_msa_fdiv_w (v4f32, v4f32);
 384   v2f64 __builtin_msa_fdiv_d (v2f64, v2f64);
 385
 386   v8i16 __builtin_msa_fexdo_h (v4f32, v4f32);
 387   v4f32 __builtin_msa_fexdo_w (v2f64, v2f64);
 388
 389   v4f32 __builtin_msa_fexp2_w (v4f32, v4i32);
 390   v2f64 __builtin_msa_fexp2_d (v2f64, v2i64);
 391
 392   v4f32 __builtin_msa_fexupl_w (v8i16);
 393   v2f64 __builtin_msa_fexupl_d (v4f32);
 394
 395   v4f32 __builtin_msa_fexupr_w (v8i16);
 396   v2f64 __builtin_msa_fexupr_d (v4f32);
 397
 398   v4f32 __builtin_msa_ffint_s_w (v4i32);
 399   v2f64 __builtin_msa_ffint_s_d (v2i64);
 400
 401   v4f32 __builtin_msa_ffint_u_w (v4u32);
 402   v2f64 __builtin_msa_ffint_u_d (v2u64);
 403
 404   v4f32 __builtin_msa_ffql_w (v8i16);
 405   v2f64 __builtin_msa_ffql_d (v4i32);
 406
 407   v4f32 __builtin_msa_ffqr_w (v8i16);
 408   v2f64 __builtin_msa_ffqr_d (v4i32);
 409
 410   v16i8 __builtin_msa_fill_b (i32);
 411   v8i16 __builtin_msa_fill_h (i32);
 412   v4i32 __builtin_msa_fill_w (i32);
 413   v2i64 __builtin_msa_fill_d (i64);
 414
 415   v4f32 __builtin_msa_flog2_w (v4f32);
 416   v2f64 __builtin_msa_flog2_d (v2f64);
 417
 418   v4f32 __builtin_msa_fmadd_w (v4f32, v4f32, v4f32);
 419   v2f64 __builtin_msa_fmadd_d (v2f64, v2f64, v2f64);
 420
 421   v4f32 __builtin_msa_fmax_w (v4f32, v4f32);
 422   v2f64 __builtin_msa_fmax_d (v2f64, v2f64);
 423
 424   v4f32 __builtin_msa_fmax_a_w (v4f32, v4f32);
 425   v2f64 __builtin_msa_fmax_a_d (v2f64, v2f64);
 426
 427   v4f32 __builtin_msa_fmin_w (v4f32, v4f32);
 428   v2f64 __builtin_msa_fmin_d (v2f64, v2f64);
 429
 430   v4f32 __builtin_msa_fmin_a_w (v4f32, v4f32);
 431   v2f64 __builtin_msa_fmin_a_d (v2f64, v2f64);
 432
 433   v4f32 __builtin_msa_fmsub_w (v4f32, v4f32, v4f32);
 434   v2f64 __builtin_msa_fmsub_d (v2f64, v2f64, v2f64);
 435
 436   v4f32 __builtin_msa_fmul_w (v4f32, v4f32);
 437   v2f64 __builtin_msa_fmul_d (v2f64, v2f64);
 438
 439   v4f32 __builtin_msa_frint_w (v4f32);
 440   v2f64 __builtin_msa_frint_d (v2f64);
 441
 442   v4f32 __builtin_msa_frcp_w (v4f32);
 443   v2f64 __builtin_msa_frcp_d (v2f64);
 444
 445   v4f32 __builtin_msa_frsqrt_w (v4f32);
 446   v2f64 __builtin_msa_frsqrt_d (v2f64);
 447
 448   v4i32 __builtin_msa_fsaf_w (v4f32, v4f32);
 449   v2i64 __builtin_msa_fsaf_d (v2f64, v2f64);
 450
 451   v4i32 __builtin_msa_fseq_w (v4f32, v4f32);
 452   v2i64 __builtin_msa_fseq_d (v2f64, v2f64);
 453
 454   v4i32 __builtin_msa_fsle_w (v4f32, v4f32);
 455   v2i64 __builtin_msa_fsle_d (v2f64, v2f64);
 456
 457   v4i32 __builtin_msa_fslt_w (v4f32, v4f32);
 458   v2i64 __builtin_msa_fslt_d (v2f64, v2f64);
 459
 460   v4i32 __builtin_msa_fsne_w (v4f32, v4f32);
 461   v2i64 __builtin_msa_fsne_d (v2f64, v2f64);
 462
 463   v4i32 __builtin_msa_fsor_w (v4f32, v4f32);
 464   v2i64 __builtin_msa_fsor_d (v2f64, v2f64);
 465
 466   v4f32 __builtin_msa_fsqrt_w (v4f32);
 467   v2f64 __builtin_msa_fsqrt_d (v2f64);
 468
 469   v4f32 __builtin_msa_fsub_w (v4f32, v4f32);
 470   v2f64 __builtin_msa_fsub_d (v2f64, v2f64);
 471
 472   v4i32 __builtin_msa_fsueq_w (v4f32, v4f32);
 473   v2i64 __builtin_msa_fsueq_d (v2f64, v2f64);
 474
 475   v4i32 __builtin_msa_fsule_w (v4f32, v4f32);
 476   v2i64 __builtin_msa_fsule_d (v2f64, v2f64);
 477
 478   v4i32 __builtin_msa_fsult_w (v4f32, v4f32);
 479   v2i64 __builtin_msa_fsult_d (v2f64, v2f64);
 480
 481   v4i32 __builtin_msa_fsun_w (v4f32, v4f32);
 482   v2i64 __builtin_msa_fsun_d (v2f64, v2f64);
 483
 484   v4i32 __builtin_msa_fsune_w (v4f32, v4f32);
 485   v2i64 __builtin_msa_fsune_d (v2f64, v2f64);
 486
 487   v4i32 __builtin_msa_ftint_s_w (v4f32);
 488   v2i64 __builtin_msa_ftint_s_d (v2f64);
 489
 490   v4u32 __builtin_msa_ftint_u_w (v4f32);
 491   v2u64 __builtin_msa_ftint_u_d (v2f64);
 492
 493   v8i16 __builtin_msa_ftq_h (v4f32, v4f32);
 494   v4i32 __builtin_msa_ftq_w (v2f64, v2f64);
 495
 496   v4i32 __builtin_msa_ftrunc_s_w (v4f32);
 497   v2i64 __builtin_msa_ftrunc_s_d (v2f64);
 498
 499   v4u32 __builtin_msa_ftrunc_u_w (v4f32);
 500   v2u64 __builtin_msa_ftrunc_u_d (v2f64);
 501
 502   v8i16 __builtin_msa_hadd_s_h (v16i8, v16i8);
 503   v4i32 __builtin_msa_hadd_s_w (v8i16, v8i16);
 504   v2i64 __builtin_msa_hadd_s_d (v4i32, v4i32);
 505
 506   v8u16 __builtin_msa_hadd_u_h (v16u8, v16u8);
 507   v4u32 __builtin_msa_hadd_u_w (v8u16, v8u16);
 508   v2u64 __builtin_msa_hadd_u_d (v4u32, v4u32);
 509
 510   v8i16 __builtin_msa_hsub_s_h (v16i8, v16i8);
 511   v4i32 __builtin_msa_hsub_s_w (v8i16, v8i16);
 512   v2i64 __builtin_msa_hsub_s_d (v4i32, v4i32);
 513
 514   v8i16 __builtin_msa_hsub_u_h (v16u8, v16u8);
 515   v4i32 __builtin_msa_hsub_u_w (v8u16, v8u16);
 516   v2i64 __builtin_msa_hsub_u_d (v4u32, v4u32);
 517
 518   v16i8 __builtin_msa_ilvev_b (v16i8, v16i8);
 519   v8i16 __builtin_msa_ilvev_h (v8i16, v8i16);
 520   v4i32 __builtin_msa_ilvev_w (v4i32, v4i32);
 521   v2i64 __builtin_msa_ilvev_d (v2i64, v2i64);
 522
 523   v16i8 __builtin_msa_ilvl_b (v16i8, v16i8);
 524   v8i16 __builtin_msa_ilvl_h (v8i16, v8i16);
 525   v4i32 __builtin_msa_ilvl_w (v4i32, v4i32);
 526   v2i64 __builtin_msa_ilvl_d (v2i64, v2i64);
 527
 528   v16i8 __builtin_msa_ilvod_b (v16i8, v16i8);
 529   v8i16 __builtin_msa_ilvod_h (v8i16, v8i16);
 530   v4i32 __builtin_msa_ilvod_w (v4i32, v4i32);
 531   v2i64 __builtin_msa_ilvod_d (v2i64, v2i64);
 532
 533   v16i8 __builtin_msa_ilvr_b (v16i8, v16i8);
 534   v8i16 __builtin_msa_ilvr_h (v8i16, v8i16);
 535   v4i32 __builtin_msa_ilvr_w (v4i32, v4i32);
 536   v2i64 __builtin_msa_ilvr_d (v2i64, v2i64);
 537
 538   v16i8 __builtin_msa_insert_b (v16i8, imm0_15, i32);
 539   v8i16 __builtin_msa_insert_h (v8i16, imm0_7, i32);
 540   v4i32 __builtin_msa_insert_w (v4i32, imm0_3, i32);
 541   v2i64 __builtin_msa_insert_d (v2i64, imm0_1, i64);
 542
 543   v16i8 __builtin_msa_insve_b (v16i8, imm0_15, v16i8);
 544   v8i16 __builtin_msa_insve_h (v8i16, imm0_7, v8i16);
 545   v4i32 __builtin_msa_insve_w (v4i32, imm0_3, v4i32);
 546   v2i64 __builtin_msa_insve_d (v2i64, imm0_1, v2i64);
 547
 548   v16i8 __builtin_msa_ld_b (const void *, imm_n512_511);
 549   v8i16 __builtin_msa_ld_h (const void *, imm_n1024_1022);
 550   v4i32 __builtin_msa_ld_w (const void *, imm_n2048_2044);
 551   v2i64 __builtin_msa_ld_d (const void *, imm_n4096_4088);
 552
 553   v16i8 __builtin_msa_ldi_b (imm_n512_511);
 554   v8i16 __builtin_msa_ldi_h (imm_n512_511);
 555   v4i32 __builtin_msa_ldi_w (imm_n512_511);
 556   v2i64 __builtin_msa_ldi_d (imm_n512_511);
 557
 558   v8i16 __builtin_msa_madd_q_h (v8i16, v8i16, v8i16);
 559   v4i32 __builtin_msa_madd_q_w (v4i32, v4i32, v4i32);
 560
 561   v8i16 __builtin_msa_maddr_q_h (v8i16, v8i16, v8i16);
 562   v4i32 __builtin_msa_maddr_q_w (v4i32, v4i32, v4i32);
 563
 564   v16i8 __builtin_msa_maddv_b (v16i8, v16i8, v16i8);
 565   v8i16 __builtin_msa_maddv_h (v8i16, v8i16, v8i16);
 566   v4i32 __builtin_msa_maddv_w (v4i32, v4i32, v4i32);
 567   v2i64 __builtin_msa_maddv_d (v2i64, v2i64, v2i64);
 568
 569   v16i8 __builtin_msa_max_a_b (v16i8, v16i8);
 570   v8i16 __builtin_msa_max_a_h (v8i16, v8i16);
 571   v4i32 __builtin_msa_max_a_w (v4i32, v4i32);
 572   v2i64 __builtin_msa_max_a_d (v2i64, v2i64);
 573
 574   v16i8 __builtin_msa_max_s_b (v16i8, v16i8);
 575   v8i16 __builtin_msa_max_s_h (v8i16, v8i16);
 576   v4i32 __builtin_msa_max_s_w (v4i32, v4i32);
 577   v2i64 __builtin_msa_max_s_d (v2i64, v2i64);
 578
 579   v16u8 __builtin_msa_max_u_b (v16u8, v16u8);
 580   v8u16 __builtin_msa_max_u_h (v8u16, v8u16);
 581   v4u32 __builtin_msa_max_u_w (v4u32, v4u32);
 582   v2u64 __builtin_msa_max_u_d (v2u64, v2u64);
 583
 584   v16i8 __builtin_msa_maxi_s_b (v16i8, imm_n16_15);
 585   v8i16 __builtin_msa_maxi_s_h (v8i16, imm_n16_15);
 586   v4i32 __builtin_msa_maxi_s_w (v4i32, imm_n16_15);
 587   v2i64 __builtin_msa_maxi_s_d (v2i64, imm_n16_15);
 588
 589   v16u8 __builtin_msa_maxi_u_b (v16u8, imm0_31);
 590   v8u16 __builtin_msa_maxi_u_h (v8u16, imm0_31);
 591   v4u32 __builtin_msa_maxi_u_w (v4u32, imm0_31);
 592   v2u64 __builtin_msa_maxi_u_d (v2u64, imm0_31);
 593
 594   v16i8 __builtin_msa_min_a_b (v16i8, v16i8);
 595   v8i16 __builtin_msa_min_a_h (v8i16, v8i16);
 596   v4i32 __builtin_msa_min_a_w (v4i32, v4i32);
 597   v2i64 __builtin_msa_min_a_d (v2i64, v2i64);
 598
 599   v16i8 __builtin_msa_min_s_b (v16i8, v16i8);
 600   v8i16 __builtin_msa_min_s_h (v8i16, v8i16);
 601   v4i32 __builtin_msa_min_s_w (v4i32, v4i32);
 602   v2i64 __builtin_msa_min_s_d (v2i64, v2i64);
 603
 604   v16u8 __builtin_msa_min_u_b (v16u8, v16u8);
 605   v8u16 __builtin_msa_min_u_h (v8u16, v8u16);
 606   v4u32 __builtin_msa_min_u_w (v4u32, v4u32);
 607   v2u64 __builtin_msa_min_u_d (v2u64, v2u64);
 608
 609   v16i8 __builtin_msa_mini_s_b (v16i8, imm_n16_15);
 610   v8i16 __builtin_msa_mini_s_h (v8i16, imm_n16_15);
 611   v4i32 __builtin_msa_mini_s_w (v4i32, imm_n16_15);
 612   v2i64 __builtin_msa_mini_s_d (v2i64, imm_n16_15);
 613
 614   v16u8 __builtin_msa_mini_u_b (v16u8, imm0_31);
 615   v8u16 __builtin_msa_mini_u_h (v8u16, imm0_31);
 616   v4u32 __builtin_msa_mini_u_w (v4u32, imm0_31);
 617   v2u64 __builtin_msa_mini_u_d (v2u64, imm0_31);
 618
 619   v16i8 __builtin_msa_mod_s_b (v16i8, v16i8);
 620   v8i16 __builtin_msa_mod_s_h (v8i16, v8i16);
 621   v4i32 __builtin_msa_mod_s_w (v4i32, v4i32);
 622   v2i64 __builtin_msa_mod_s_d (v2i64, v2i64);
 623
 624   v16u8 __builtin_msa_mod_u_b (v16u8, v16u8);
 625   v8u16 __builtin_msa_mod_u_h (v8u16, v8u16);
 626   v4u32 __builtin_msa_mod_u_w (v4u32, v4u32);
 627   v2u64 __builtin_msa_mod_u_d (v2u64, v2u64);
 628
 629   v16i8 __builtin_msa_move_v (v16i8);
 630
 631   v8i16 __builtin_msa_msub_q_h (v8i16, v8i16, v8i16);
 632   v4i32 __builtin_msa_msub_q_w (v4i32, v4i32, v4i32);
 633
 634   v8i16 __builtin_msa_msubr_q_h (v8i16, v8i16, v8i16);
 635   v4i32 __builtin_msa_msubr_q_w (v4i32, v4i32, v4i32);
 636
 637   v16i8 __builtin_msa_msubv_b (v16i8, v16i8, v16i8);
 638   v8i16 __builtin_msa_msubv_h (v8i16, v8i16, v8i16);
 639   v4i32 __builtin_msa_msubv_w (v4i32, v4i32, v4i32);
 640   v2i64 __builtin_msa_msubv_d (v2i64, v2i64, v2i64);
 641
 642   v8i16 __builtin_msa_mul_q_h (v8i16, v8i16);
 643   v4i32 __builtin_msa_mul_q_w (v4i32, v4i32);
 644
 645   v8i16 __builtin_msa_mulr_q_h (v8i16, v8i16);
 646   v4i32 __builtin_msa_mulr_q_w (v4i32, v4i32);
 647
 648   v16i8 __builtin_msa_mulv_b (v16i8, v16i8);
 649   v8i16 __builtin_msa_mulv_h (v8i16, v8i16);
 650   v4i32 __builtin_msa_mulv_w (v4i32, v4i32);
 651   v2i64 __builtin_msa_mulv_d (v2i64, v2i64);
 652
 653   v16i8 __builtin_msa_nloc_b (v16i8);
 654   v8i16 __builtin_msa_nloc_h (v8i16);
 655   v4i32 __builtin_msa_nloc_w (v4i32);
 656   v2i64 __builtin_msa_nloc_d (v2i64);
 657
 658   v16i8 __builtin_msa_nlzc_b (v16i8);
 659   v8i16 __builtin_msa_nlzc_h (v8i16);
 660   v4i32 __builtin_msa_nlzc_w (v4i32);
 661   v2i64 __builtin_msa_nlzc_d (v2i64);
 662
 663   v16u8 __builtin_msa_nor_v (v16u8, v16u8);
 664
 665   v16u8 __builtin_msa_nori_b (v16u8, imm0_255);
 666
 667   v16u8 __builtin_msa_or_v (v16u8, v16u8);
 668
 669   v16u8 __builtin_msa_ori_b (v16u8, imm0_255);
 670
 671   v16i8 __builtin_msa_pckev_b (v16i8, v16i8);
 672   v8i16 __builtin_msa_pckev_h (v8i16, v8i16);
 673   v4i32 __builtin_msa_pckev_w (v4i32, v4i32);
 674   v2i64 __builtin_msa_pckev_d (v2i64, v2i64);
 675
 676   v16i8 __builtin_msa_pckod_b (v16i8, v16i8);
 677   v8i16 __builtin_msa_pckod_h (v8i16, v8i16);
 678   v4i32 __builtin_msa_pckod_w (v4i32, v4i32);
 679   v2i64 __builtin_msa_pckod_d (v2i64, v2i64);
 680
 681   v16i8 __builtin_msa_pcnt_b (v16i8);
 682   v8i16 __builtin_msa_pcnt_h (v8i16);
 683   v4i32 __builtin_msa_pcnt_w (v4i32);
 684   v2i64 __builtin_msa_pcnt_d (v2i64);
 685
 686   v16i8 __builtin_msa_sat_s_b (v16i8, imm0_7);
 687   v8i16 __builtin_msa_sat_s_h (v8i16, imm0_15);
 688   v4i32 __builtin_msa_sat_s_w (v4i32, imm0_31);
 689   v2i64 __builtin_msa_sat_s_d (v2i64, imm0_63);
 690
 691   v16u8 __builtin_msa_sat_u_b (v16u8, imm0_7);
 692   v8u16 __builtin_msa_sat_u_h (v8u16, imm0_15);
 693   v4u32 __builtin_msa_sat_u_w (v4u32, imm0_31);
 694   v2u64 __builtin_msa_sat_u_d (v2u64, imm0_63);
 695
 696   v16i8 __builtin_msa_shf_b (v16i8, imm0_255);
 697   v8i16 __builtin_msa_shf_h (v8i16, imm0_255);
 698   v4i32 __builtin_msa_shf_w (v4i32, imm0_255);
 699
 700   v16i8 __builtin_msa_sld_b (v16i8, v16i8, i32);
 701   v8i16 __builtin_msa_sld_h (v8i16, v8i16, i32);
 702   v4i32 __builtin_msa_sld_w (v4i32, v4i32, i32);
 703   v2i64 __builtin_msa_sld_d (v2i64, v2i64, i32);
 704
 705   v16i8 __builtin_msa_sldi_b (v16i8, v16i8, imm0_15);
 706   v8i16 __builtin_msa_sldi_h (v8i16, v8i16, imm0_7);
 707   v4i32 __builtin_msa_sldi_w (v4i32, v4i32, imm0_3);
 708   v2i64 __builtin_msa_sldi_d (v2i64, v2i64, imm0_1);
 709
 710   v16i8 __builtin_msa_sll_b (v16i8, v16i8);
 711   v8i16 __builtin_msa_sll_h (v8i16, v8i16);
 712   v4i32 __builtin_msa_sll_w (v4i32, v4i32);
 713   v2i64 __builtin_msa_sll_d (v2i64, v2i64);
 714
 715   v16i8 __builtin_msa_slli_b (v16i8, imm0_7);
 716   v8i16 __builtin_msa_slli_h (v8i16, imm0_15);
 717   v4i32 __builtin_msa_slli_w (v4i32, imm0_31);
 718   v2i64 __builtin_msa_slli_d (v2i64, imm0_63);
 719
 720   v16i8 __builtin_msa_splat_b (v16i8, i32);
 721   v8i16 __builtin_msa_splat_h (v8i16, i32);
 722   v4i32 __builtin_msa_splat_w (v4i32, i32);
 723   v2i64 __builtin_msa_splat_d (v2i64, i32);
 724
 725   v16i8 __builtin_msa_splati_b (v16i8, imm0_15);
 726   v8i16 __builtin_msa_splati_h (v8i16, imm0_7);
 727   v4i32 __builtin_msa_splati_w (v4i32, imm0_3);
 728   v2i64 __builtin_msa_splati_d (v2i64, imm0_1);
 729
 730   v16i8 __builtin_msa_sra_b (v16i8, v16i8);
 731   v8i16 __builtin_msa_sra_h (v8i16, v8i16);
 732   v4i32 __builtin_msa_sra_w (v4i32, v4i32);
 733   v2i64 __builtin_msa_sra_d (v2i64, v2i64);
 734
 735   v16i8 __builtin_msa_srai_b (v16i8, imm0_7);
 736   v8i16 __builtin_msa_srai_h (v8i16, imm0_15);
 737   v4i32 __builtin_msa_srai_w (v4i32, imm0_31);
 738   v2i64 __builtin_msa_srai_d (v2i64, imm0_63);
 739
 740   v16i8 __builtin_msa_srar_b (v16i8, v16i8);
 741   v8i16 __builtin_msa_srar_h (v8i16, v8i16);
 742   v4i32 __builtin_msa_srar_w (v4i32, v4i32);
 743   v2i64 __builtin_msa_srar_d (v2i64, v2i64);
 744
 745   v16i8 __builtin_msa_srari_b (v16i8, imm0_7);
 746   v8i16 __builtin_msa_srari_h (v8i16, imm0_15);
 747   v4i32 __builtin_msa_srari_w (v4i32, imm0_31);
 748   v2i64 __builtin_msa_srari_d (v2i64, imm0_63);
 749
 750   v16i8 __builtin_msa_srl_b (v16i8, v16i8);
 751   v8i16 __builtin_msa_srl_h (v8i16, v8i16);
 752   v4i32 __builtin_msa_srl_w (v4i32, v4i32);
 753   v2i64 __builtin_msa_srl_d (v2i64, v2i64);
 754
 755   v16i8 __builtin_msa_srli_b (v16i8, imm0_7);
 756   v8i16 __builtin_msa_srli_h (v8i16, imm0_15);
 757   v4i32 __builtin_msa_srli_w (v4i32, imm0_31);
 758   v2i64 __builtin_msa_srli_d (v2i64, imm0_63);
 759
 760   v16i8 __builtin_msa_srlr_b (v16i8, v16i8);
 761   v8i16 __builtin_msa_srlr_h (v8i16, v8i16);
 762   v4i32 __builtin_msa_srlr_w (v4i32, v4i32);
 763   v2i64 __builtin_msa_srlr_d (v2i64, v2i64);
 764
 765   v16i8 __builtin_msa_srlri_b (v16i8, imm0_7);
 766   v8i16 __builtin_msa_srlri_h (v8i16, imm0_15);
 767   v4i32 __builtin_msa_srlri_w (v4i32, imm0_31);
 768   v2i64 __builtin_msa_srlri_d (v2i64, imm0_63);
 769
 770   void __builtin_msa_st_b (v16i8, void *, imm_n512_511);
 771   void __builtin_msa_st_h (v8i16, void *, imm_n1024_1022);
 772   void __builtin_msa_st_w (v4i32, void *, imm_n2048_2044);
 773   void __builtin_msa_st_d (v2i64, void *, imm_n4096_4088);
 774
 775   v16i8 __builtin_msa_subs_s_b (v16i8, v16i8);
 776   v8i16 __builtin_msa_subs_s_h (v8i16, v8i16);
 777   v4i32 __builtin_msa_subs_s_w (v4i32, v4i32);
 778   v2i64 __builtin_msa_subs_s_d (v2i64, v2i64);
 779
 780   v16u8 __builtin_msa_subs_u_b (v16u8, v16u8);
 781   v8u16 __builtin_msa_subs_u_h (v8u16, v8u16);
 782   v4u32 __builtin_msa_subs_u_w (v4u32, v4u32);
 783   v2u64 __builtin_msa_subs_u_d (v2u64, v2u64);
 784
 785   v16u8 __builtin_msa_subsus_u_b (v16u8, v16i8);
 786   v8u16 __builtin_msa_subsus_u_h (v8u16, v8i16);
 787   v4u32 __builtin_msa_subsus_u_w (v4u32, v4i32);
 788   v2u64 __builtin_msa_subsus_u_d (v2u64, v2i64);
 789
 790   v16i8 __builtin_msa_subsuu_s_b (v16u8, v16u8);
 791   v8i16 __builtin_msa_subsuu_s_h (v8u16, v8u16);
 792   v4i32 __builtin_msa_subsuu_s_w (v4u32, v4u32);
 793   v2i64 __builtin_msa_subsuu_s_d (v2u64, v2u64);
 794
 795   v16i8 __builtin_msa_subv_b (v16i8, v16i8);
 796   v8i16 __builtin_msa_subv_h (v8i16, v8i16);
 797   v4i32 __builtin_msa_subv_w (v4i32, v4i32);
 798   v2i64 __builtin_msa_subv_d (v2i64, v2i64);
 799
 800   v16i8 __builtin_msa_subvi_b (v16i8, imm0_31);
 801   v8i16 __builtin_msa_subvi_h (v8i16, imm0_31);
 802   v4i32 __builtin_msa_subvi_w (v4i32, imm0_31);
 803   v2i64 __builtin_msa_subvi_d (v2i64, imm0_31);
 804
 805   v16i8 __builtin_msa_vshf_b (v16i8, v16i8, v16i8);
 806   v8i16 __builtin_msa_vshf_h (v8i16, v8i16, v8i16);
 807   v4i32 __builtin_msa_vshf_w (v4i32, v4i32, v4i32);
 808   v2i64 __builtin_msa_vshf_d (v2i64, v2i64, v2i64);
 809
 810   v16u8 __builtin_msa_xor_v (v16u8, v16u8);
 811
 812   v16u8 __builtin_msa_xori_b (v16u8, imm0_255);