git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob

   1 From 9425914f3de6febbd6250395f56c8279676d9c3c Mon Sep 17 00:00:00 2001
   2 From: Sherry Sun <sherry.sun@nxp.com>
   3 Date: Thu, 23 Mar 2023 13:44:15 +0800
   4 Subject: tty: serial: fsl_lpuart: avoid checking for transfer complete when UARTCTRL_SBK is asserted in lpuart32_tx_empty
   5
   6 From: Sherry Sun <sherry.sun@nxp.com>
   7
   8 commit 9425914f3de6febbd6250395f56c8279676d9c3c upstream.
   9
  10 According to LPUART RM, Transmission Complete Flag becomes 0 if queuing
  11 a break character by writing 1 to CTRL[SBK], so here need to avoid
  12 checking for transmission complete when UARTCTRL_SBK is asserted,
  13 otherwise the lpuart32_tx_empty may never get TIOCSER_TEMT.
  14
  15 Commit 2411fd94ceaa("tty: serial: fsl_lpuart: skip waiting for
  16 transmission complete when UARTCTRL_SBK is asserted") only fix it in
  17 lpuart32_set_termios(), here also fix it in lpuart32_tx_empty().
  18
  19 Fixes: 380c966c093e ("tty: serial: fsl_lpuart: add 32-bit register interface support")
  20 Cc: stable <stable@kernel.org>
  21 Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
  22 Link: https://lore.kernel.org/r/20230323054415.20363-1-sherry.sun@nxp.com
  23 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  24 ---
  25  drivers/tty/serial/fsl_lpuart.c |    8 +++++++-
  26  1 file changed, 7 insertions(+), 1 deletion(-)
  27
  28 --- a/drivers/tty/serial/fsl_lpuart.c
  29 +++ b/drivers/tty/serial/fsl_lpuart.c
  30 @@ -832,11 +832,17 @@ static unsigned int lpuart32_tx_empty(st
  31                         struct lpuart_port, port);
  32         unsigned long stat = lpuart32_read(port, UARTSTAT);
  33         unsigned long sfifo = lpuart32_read(port, UARTFIFO);
  34 +       unsigned long ctrl = lpuart32_read(port, UARTCTRL);
  35
  36         if (sport->dma_tx_in_progress)
  37                 return 0;
  38
  39 -       if (stat & UARTSTAT_TC && sfifo & UARTFIFO_TXEMPT)
  40 +       /*
  41 +        * LPUART Transmission Complete Flag may never be set while queuing a break
  42 +        * character, so avoid checking for transmission complete when UARTCTRL_SBK
  43 +        * is asserted.
  44 +        */
  45 +       if ((stat & UARTSTAT_TC && sfifo & UARTFIFO_TXEMPT) || ctrl & UARTCTRL_SBK)
  46                 return TIOCSER_TEMT;
  47
  48         return 0;