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1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2019 MediaTek Inc. */
3
4 #ifndef __MT7615_H
5 #define __MT7615_H
6
7 #include <linux/completion.h>
8 #include <linux/interrupt.h>
9 #include <linux/ktime.h>
10 #include <linux/regmap.h>
11 #include "../mt76.h"
12 #include "regs.h"
13
14 #define MT7615_MAX_INTERFACES 4
15 #define MT7615_MAX_WMM_SETS 4
16 #define MT7663_WTBL_SIZE 32
17 #define MT7615_WTBL_SIZE 128
18 #define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22 #define MT7615_PM_TIMEOUT (HZ / 12)
23 #define MT7615_WATCHDOG_TIME (HZ / 10)
24 #define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
25 #define MT7615_RESET_TIMEOUT (30 * HZ)
26 #define MT7615_RATE_RETRY 2
27
28 #define MT7615_TX_RING_SIZE 1024
29 #define MT7615_TX_MGMT_RING_SIZE 128
30 #define MT7615_TX_MCU_RING_SIZE 128
31 #define MT7615_TX_FWDL_RING_SIZE 128
32
33 #define MT7615_RX_RING_SIZE 1024
34 #define MT7615_RX_MCU_RING_SIZE 512
35
36 #define MT7615_DRV_OWN_RETRY_COUNT 10
37
38 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
39 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
40 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
41
42 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
43 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
44
45 #define MT7615_FIRMWARE_V1 1
46 #define MT7615_FIRMWARE_V2 2
47 #define MT7615_FIRMWARE_V3 3
48
49 #define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
50 #define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
51 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
52 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
53
54 #define MT7615_EEPROM_SIZE 1024
55 #define MT7615_TOKEN_SIZE 4096
56
57 #define MT_FRAC_SCALE 12
58 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
59
60 #define MT_CHFREQ_VALID BIT(7)
61 #define MT_CHFREQ_DBDC_IDX BIT(6)
62 #define MT_CHFREQ_SEQ GENMASK(5, 0)
63
64 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */
65 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
66 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
67
68 #define MT7615_SCAN_IE_LEN 600
69 #define MT7615_MAX_SCHED_SCAN_INTERVAL 10
70 #define MT7615_MAX_SCHED_SCAN_SSID 10
71 #define MT7615_MAX_SCAN_MATCH 16
72
73 struct mt7615_vif;
74 struct mt7615_sta;
75 struct mt7615_dfs_pulse;
76 struct mt7615_dfs_pattern;
77 enum mt7615_cipher_type;
78
79 enum mt7615_hw_txq_id {
80 MT7615_TXQ_MAIN,
81 MT7615_TXQ_EXT,
82 MT7615_TXQ_MCU,
83 MT7615_TXQ_FWDL,
84 };
85
86 enum mt7622_hw_txq_id {
87 MT7622_TXQ_AC0,
88 MT7622_TXQ_AC1,
89 MT7622_TXQ_AC2,
90 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
91 MT7622_TXQ_AC3,
92 MT7622_TXQ_MGMT,
93 MT7622_TXQ_MCU = 15,
94 };
95
96 struct mt7615_rate_set {
97 struct ieee80211_tx_rate probe_rate;
98 struct ieee80211_tx_rate rates[4];
99 };
100
101 struct mt7615_rate_desc {
102 bool rateset;
103 u16 probe_val;
104 u16 val[4];
105 u8 bw_idx;
106 u8 bw;
107 };
108
109 enum mt7615_wtbl_desc_type {
110 MT7615_WTBL_RATE_DESC,
111 MT7615_WTBL_KEY_DESC
112 };
113
114 struct mt7615_key_desc {
115 enum set_key_cmd cmd;
116 u32 cipher;
117 s8 keyidx;
118 u8 keylen;
119 u8 *key;
120 };
121
122 struct mt7615_wtbl_desc {
123 struct list_head node;
124
125 enum mt7615_wtbl_desc_type type;
126 struct mt7615_sta *sta;
127
128 union {
129 struct mt7615_rate_desc rate;
130 struct mt7615_key_desc key;
131 };
132 };
133
134 struct mt7615_sta {
135 struct mt76_wcid wcid; /* must be first */
136
137 struct mt7615_vif *vif;
138
139 struct list_head poll_list;
140 u32 airtime_ac[8];
141
142 struct ieee80211_tx_rate rates[4];
143
144 struct mt7615_rate_set rateset[2];
145 u32 rate_set_tsf;
146
147 u8 rate_count;
148 u8 n_rates;
149
150 u8 rate_probe;
151 };
152
153 struct mt7615_vif {
154 u8 idx;
155 u8 omac_idx;
156 u8 band_idx;
157 u8 wmm_idx;
158 u8 scan_seq_num;
159
160 struct mt7615_sta sta;
161 };
162
163 struct mib_stats {
164 u16 ack_fail_cnt;
165 u16 fcs_err_cnt;
166 u16 rts_cnt;
167 u16 rts_retries_cnt;
168 u16 ba_miss_cnt;
169 unsigned long aggr_per;
170 };
171
172 struct mt7615_phy {
173 struct mt76_phy *mt76;
174 struct mt7615_dev *dev;
175
176 struct ieee80211_vif *monitor_vif;
177
178 u8 n_beacon_vif;
179
180 u32 rxfilter;
181 u32 omac_mask;
182
183 u16 noise;
184
185 bool scs_en;
186
187 unsigned long last_cca_adj;
188 int false_cca_ofdm, false_cca_cck;
189 s8 ofdm_sensitivity;
190 s8 cck_sensitivity;
191
192 u16 chainmask;
193
194 s16 coverage_class;
195 u8 slottime;
196
197 u8 chfreq;
198 u8 rdd_state;
199 int dfs_state;
200
201 __le32 rx_ampdu_ts;
202 u32 ampdu_ref;
203
204 struct mib_stats mib;
205
206 struct delayed_work mac_work;
207 u8 mac_work_count;
208
209 struct sk_buff_head scan_event_list;
210 struct delayed_work scan_work;
211
212 struct work_struct roc_work;
213 struct timer_list roc_timer;
214 wait_queue_head_t roc_wait;
215 bool roc_grant;
216 };
217
218 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
219 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
220 #define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__)
221 #define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__)
222 #define mt7615_mcu_add_bss_info(phy, ...) (phy->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
223 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
224 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
225 #define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
226 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
227 struct mt7615_mcu_ops {
228 int (*add_tx_ba)(struct mt7615_dev *dev,
229 struct ieee80211_ampdu_params *params,
230 bool enable);
231 int (*add_rx_ba)(struct mt7615_dev *dev,
232 struct ieee80211_ampdu_params *params,
233 bool enable);
234 int (*sta_add)(struct mt7615_dev *dev,
235 struct ieee80211_vif *vif,
236 struct ieee80211_sta *sta, bool enable);
237 int (*add_dev_info)(struct mt7615_dev *dev,
238 struct ieee80211_vif *vif, bool enable);
239 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
240 struct ieee80211_sta *sta, bool enable);
241 int (*add_beacon_offload)(struct mt7615_dev *dev,
242 struct ieee80211_hw *hw,
243 struct ieee80211_vif *vif, bool enable);
244 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
245 int (*set_drv_ctrl)(struct mt7615_dev *dev);
246 int (*set_fw_ctrl)(struct mt7615_dev *dev);
247 };
248
249 struct mt7615_dev {
250 union { /* must be first */
251 struct mt76_dev mt76;
252 struct mt76_phy mphy;
253 };
254
255 const struct mt76_bus_ops *bus_ops;
256 struct tasklet_struct irq_tasklet;
257
258 struct mt7615_phy phy;
259 u32 omac_mask;
260
261 u16 chainmask;
262
263 struct ieee80211_ops *ops;
264 const struct mt7615_mcu_ops *mcu_ops;
265 struct regmap *infracfg;
266 const u32 *reg_map;
267
268 struct work_struct mcu_work;
269
270 struct work_struct reset_work;
271 wait_queue_head_t reset_wait;
272 u32 reset_state;
273
274 struct list_head sta_poll_list;
275 spinlock_t sta_poll_lock;
276
277 struct {
278 u8 n_pulses;
279 u32 period;
280 u16 width;
281 s16 power;
282 } radar_pattern;
283 u32 hw_pattern;
284
285 bool fw_debug;
286 bool flash_eeprom;
287 bool dbdc_support;
288
289 spinlock_t token_lock;
290 struct idr token;
291
292 u8 fw_ver;
293
294 struct work_struct wtbl_work;
295 struct list_head wd_head;
296
297 u32 debugfs_rf_wf;
298 u32 debugfs_rf_reg;
299
300 u32 muar_mask;
301
302 #ifdef CONFIG_NL80211_TESTMODE
303 struct {
304 u32 *reg_backup;
305
306 s16 last_freq_offset;
307 u8 last_rcpi[4];
308 s8 last_ib_rssi;
309 s8 last_wb_rssi;
310 } test;
311 #endif
312
313 struct {
314 bool enable;
315
316 spinlock_t txq_lock;
317 struct {
318 struct mt7615_sta *msta;
319 struct sk_buff *skb;
320 } tx_q[IEEE80211_NUM_ACS];
321
322 struct work_struct wake_work;
323 struct completion wake_cmpl;
324
325 struct delayed_work ps_work;
326 unsigned long last_activity;
327 unsigned long idle_timeout;
328 } pm;
329 };
330
331 enum tx_pkt_queue_idx {
332 MT_LMAC_AC00,
333 MT_LMAC_AC01,
334 MT_LMAC_AC02,
335 MT_LMAC_AC03,
336 MT_LMAC_ALTX0 = 0x10,
337 MT_LMAC_BMC0,
338 MT_LMAC_BCN0,
339 MT_LMAC_PSMP0,
340 MT_LMAC_ALTX1,
341 MT_LMAC_BMC1,
342 MT_LMAC_BCN1,
343 MT_LMAC_PSMP1,
344 };
345
346 enum {
347 HW_BSSID_0 = 0x0,
348 HW_BSSID_1,
349 HW_BSSID_2,
350 HW_BSSID_3,
351 HW_BSSID_MAX,
352 EXT_BSSID_START = 0x10,
353 EXT_BSSID_1,
354 EXT_BSSID_2,
355 EXT_BSSID_3,
356 EXT_BSSID_4,
357 EXT_BSSID_5,
358 EXT_BSSID_6,
359 EXT_BSSID_7,
360 EXT_BSSID_8,
361 EXT_BSSID_9,
362 EXT_BSSID_10,
363 EXT_BSSID_11,
364 EXT_BSSID_12,
365 EXT_BSSID_13,
366 EXT_BSSID_14,
367 EXT_BSSID_15,
368 EXT_BSSID_END
369 };
370
371 enum {
372 MT_RX_SEL0,
373 MT_RX_SEL1,
374 };
375
376 enum mt7615_rdd_cmd {
377 RDD_STOP,
378 RDD_START,
379 RDD_DET_MODE,
380 RDD_DET_STOP,
381 RDD_CAC_START,
382 RDD_CAC_END,
383 RDD_NORMAL_START,
384 RDD_DISABLE_DFS_CAL,
385 RDD_PULSE_DBG,
386 RDD_READ_PULSE,
387 RDD_RESUME_BF,
388 };
389
390 static inline struct mt7615_phy *
391 mt7615_hw_phy(struct ieee80211_hw *hw)
392 {
393 struct mt76_phy *phy = hw->priv;
394
395 return phy->priv;
396 }
397
398 static inline struct mt7615_dev *
399 mt7615_hw_dev(struct ieee80211_hw *hw)
400 {
401 struct mt76_phy *phy = hw->priv;
402
403 return container_of(phy->dev, struct mt7615_dev, mt76);
404 }
405
406 static inline struct mt7615_phy *
407 mt7615_ext_phy(struct mt7615_dev *dev)
408 {
409 struct mt76_phy *phy = dev->mt76.phy2;
410
411 if (!phy)
412 return NULL;
413
414 return phy->priv;
415 }
416
417 extern struct ieee80211_rate mt7615_rates[12];
418 extern const struct ieee80211_ops mt7615_ops;
419 extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
420 extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
421 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
422 extern struct pci_driver mt7615_pci_driver;
423 extern struct platform_driver mt7622_wmac_driver;
424 extern const struct mt76_testmode_ops mt7615_testmode_ops;
425
426 #ifdef CONFIG_MT7622_WMAC
427 int mt7622_wmac_init(struct mt7615_dev *dev);
428 #else
429 static inline int mt7622_wmac_init(struct mt7615_dev *dev)
430 {
431 return 0;
432 }
433 #endif
434
435 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
436 int irq, const u32 *map);
437 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
438
439 void mt7615_check_offload_capability(struct mt7615_dev *dev);
440 void mt7615_init_device(struct mt7615_dev *dev);
441 int mt7615_register_device(struct mt7615_dev *dev);
442 void mt7615_unregister_device(struct mt7615_dev *dev);
443 int mt7615_register_ext_phy(struct mt7615_dev *dev);
444 void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
445 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
446 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
447 struct ieee80211_channel *chan,
448 u8 chain_idx);
449 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
450 enum nl80211_band band);
451 int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
452 int mt7615_dma_init(struct mt7615_dev *dev);
453 void mt7615_dma_cleanup(struct mt7615_dev *dev);
454 int mt7615_mcu_init(struct mt7615_dev *dev);
455 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
456 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
457 struct ieee80211_tx_rate *probe_rate,
458 struct ieee80211_tx_rate *rates);
459 void mt7615_pm_wake_work(struct work_struct *work);
460 int mt7615_pm_wake(struct mt7615_dev *dev);
461 void mt7615_pm_power_save_sched(struct mt7615_dev *dev);
462 void mt7615_pm_power_save_work(struct work_struct *work);
463 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
464 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
465 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
466 const struct ieee80211_tx_queue_params *params);
467 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
468 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
469 enum mt7615_rdd_cmd cmd, u8 index,
470 u8 rx_sel, u8 val);
471 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
472 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
473
474 static inline bool is_mt7622(struct mt76_dev *dev)
475 {
476 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
477 return false;
478
479 return mt76_chip(dev) == 0x7622;
480 }
481
482 static inline bool is_mt7615(struct mt76_dev *dev)
483 {
484 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
485 }
486
487 static inline bool is_mt7663(struct mt76_dev *dev)
488 {
489 return mt76_chip(dev) == 0x7663;
490 }
491
492 static inline bool is_mt7611(struct mt76_dev *dev)
493 {
494 return mt76_chip(dev) == 0x7611;
495 }
496
497 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
498 {
499 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
500
501 tasklet_schedule(&dev->irq_tasklet);
502 }
503
504 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
505 {
506 return dev->fw_ver > MT7615_FIRMWARE_V2;
507 }
508
509 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
510 {
511 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
512 return MT7663_WTBL_SIZE;
513 else
514 return MT7615_WTBL_SIZE;
515 }
516
517 static inline void mt7615_mutex_acquire(struct mt7615_dev *dev)
518 __acquires(&dev->mt76.mutex)
519 {
520 mutex_lock(&dev->mt76.mutex);
521 mt7615_pm_wake(dev);
522 }
523
524 static inline void mt7615_mutex_release(struct mt7615_dev *dev)
525 __releases(&dev->mt76.mutex)
526 {
527 mt7615_pm_power_save_sched(dev);
528 mutex_unlock(&dev->mt76.mutex);
529 }
530
531 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
532 {
533 static const u8 lmac_queue_map[] = {
534 [IEEE80211_AC_BK] = MT_LMAC_AC00,
535 [IEEE80211_AC_BE] = MT_LMAC_AC01,
536 [IEEE80211_AC_VI] = MT_LMAC_AC02,
537 [IEEE80211_AC_VO] = MT_LMAC_AC03,
538 };
539
540 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
541 return MT_LMAC_AC01; /* BE */
542
543 return lmac_queue_map[ac];
544 }
545
546 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
547 {
548 return MT_INT_TX_DONE(dev->mt76.q_tx[MT_TXQ_MCU]->hw_idx);
549 }
550
551 void mt7615_dma_reset(struct mt7615_dev *dev);
552 void mt7615_scan_work(struct work_struct *work);
553 void mt7615_roc_work(struct work_struct *work);
554 void mt7615_roc_timer(struct timer_list *timer);
555 void mt7615_init_txpower(struct mt7615_dev *dev,
556 struct ieee80211_supported_band *sband);
557 void mt7615_phy_init(struct mt7615_dev *dev);
558 void mt7615_mac_init(struct mt7615_dev *dev);
559 int mt7615_set_channel(struct mt7615_phy *phy);
560
561 int mt7615_mcu_restart(struct mt76_dev *dev);
562 void mt7615_update_channel(struct mt76_dev *mdev);
563 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
564 void mt7615_mac_reset_counters(struct mt7615_dev *dev);
565 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
566 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
567 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
568 void mt7615_mac_sta_poll(struct mt7615_dev *dev);
569 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
570 struct sk_buff *skb, struct mt76_wcid *wcid,
571 struct ieee80211_sta *sta, int pid,
572 struct ieee80211_key_conf *key, bool beacon);
573 void mt7615_mac_set_timing(struct mt7615_phy *phy);
574 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
575 struct ieee80211_key_conf *key,
576 enum set_key_cmd cmd);
577 int mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev,
578 struct mt76_wcid *wcid,
579 enum mt7615_cipher_type cipher,
580 int keyidx, enum set_key_cmd cmd);
581 void mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev,
582 struct mt76_wcid *wcid,
583 enum mt7615_cipher_type cipher,
584 enum set_key_cmd cmd);
585 int mt7615_mac_wtbl_update_key(struct mt7615_dev *dev,
586 struct mt76_wcid *wcid,
587 u8 *key, u8 keylen,
588 enum mt7615_cipher_type cipher,
589 enum set_key_cmd cmd);
590 void mt7615_mac_reset_work(struct work_struct *work);
591 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
592
593 int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
594 struct sk_buff *skb, int seq);
595 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
596 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
597 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
598 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
599 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable);
600 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
601 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
602 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
603 void mt7615_mcu_exit(struct mt7615_dev *dev);
604 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
605 int cmd, int *wait_seq);
606 int mt7615_mcu_set_channel_domain(struct mt7615_phy *phy);
607 int mt7615_mcu_hw_scan(struct mt7615_phy *phy, struct ieee80211_vif *vif,
608 struct ieee80211_scan_request *scan_req);
609 int mt7615_mcu_cancel_hw_scan(struct mt7615_phy *phy,
610 struct ieee80211_vif *vif);
611 int mt7615_mcu_sched_scan_req(struct mt7615_phy *phy,
612 struct ieee80211_vif *vif,
613 struct cfg80211_sched_scan_request *sreq);
614 int mt7615_mcu_sched_scan_enable(struct mt7615_phy *phy,
615 struct ieee80211_vif *vif,
616 bool enable);
617
618 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
619 enum mt76_txq_id qid, struct mt76_wcid *wcid,
620 struct ieee80211_sta *sta,
621 struct mt76_tx_info *tx_info);
622
623 void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
624
625 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
626 struct sk_buff *skb);
627 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
628 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
629 struct ieee80211_sta *sta);
630 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
631 struct ieee80211_sta *sta);
632 void mt7615_mac_work(struct work_struct *work);
633 void mt7615_txp_skb_unmap(struct mt76_dev *dev,
634 struct mt76_txwi_cache *txwi);
635 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
636 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
637 const struct mt7615_dfs_pulse *pulse);
638 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
639 const struct mt7615_dfs_pattern *pattern);
640 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
641 u32 val);
642 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
643 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
644 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
645 int mt7615_mcu_set_vif_ps(struct mt7615_dev *dev, struct ieee80211_vif *vif);
646 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
647
648 int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
649 struct ieee80211_vif *vif);
650 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
651 struct ieee80211_channel *chan, int duration);
652
653 int mt7615_init_debugfs(struct mt7615_dev *dev);
654 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
655
656 int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
657 struct ieee80211_vif *vif,
658 bool enable);
659 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
660 bool enable);
661 int mt7615_mcu_set_hif_suspend(struct mt7615_dev *dev, bool suspend);
662 void mt7615_mcu_set_suspend_iter(void *priv, u8 *mac,
663 struct ieee80211_vif *vif);
664 int mt7615_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
665 struct ieee80211_vif *vif,
666 struct cfg80211_gtk_rekey_data *key);
667 int mt7615_mcu_update_arp_filter(struct ieee80211_hw *hw,
668 struct ieee80211_vif *vif,
669 struct ieee80211_bss_conf *info);
670 int __mt7663_load_firmware(struct mt7615_dev *dev);
671 u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
672 void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
673
674 /* usb */
675 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
676 enum mt76_txq_id qid, struct mt76_wcid *wcid,
677 struct ieee80211_sta *sta,
678 struct mt76_tx_info *tx_info);
679 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
680 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
681 struct mt76_queue_entry *e);
682 void mt7663_usb_sdio_wtbl_work(struct work_struct *work);
683 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
684 int mt7663u_mcu_init(struct mt7615_dev *dev);
685
686 /* sdio */
687 u32 mt7663s_read_pcr(struct mt7615_dev *dev);
688 int mt7663s_mcu_init(struct mt7615_dev *dev);
689 void mt7663s_txrx_worker(struct mt76_worker *w);
690 void mt7663s_rx_work(struct work_struct *work);
691 void mt7663s_sdio_irq(struct sdio_func *func);
692
693 #endif