git.ipfire.org Git - thirdparty/openwrt.git/blob

   1 From af87d38c442c75a40c7d0a7d8c31557e2e6ccf98 Mon Sep 17 00:00:00 2001
   2 From: Christian Marangi <ansuelsmth@gmail.com>
   3 Date: Sun, 25 May 2025 20:22:40 +0200
   4 Subject: [PATCH 1/2] pinctrl: airoha: fix wrong PHY LED mux value for LED1
   5  GPIO46
   6
   7 In all the MUX value for LED1 GPIO46 there is a Copy-Paste error where
   8 the MUX value is set to LED0_MODE_MASK instead of LED1_MODE_MASK.
   9
  10 This wasn't notice as there were no board that made use of the
  11 secondary PHY LED but looking at the internal Documentation the actual
  12 value should be LED1_MODE_MASK similar to the other GPIO entry.
  13
  14 Fix the wrong value to apply the correct MUX configuration.
  15
  16 Cc: stable@vger.kernel.org
  17 Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
  18 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  19 ---
  20  drivers/pinctrl/mediatek/pinctrl-airoha.c | 16 ++++++++--------
  21  1 file changed, 8 insertions(+), 8 deletions(-)
  22
  23 --- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
  24 +++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
  25 @@ -1746,8 +1746,8 @@ static const struct airoha_pinctrl_func_
  26                 .regmap[0] = {
  27                         AIROHA_FUNC_MUX,
  28                         REG_GPIO_2ND_I2C_MODE,
  29 -                       GPIO_LAN3_LED0_MODE_MASK,
  30 -                       GPIO_LAN3_LED0_MODE_MASK
  31 +                       GPIO_LAN3_LED1_MODE_MASK,
  32 +                       GPIO_LAN3_LED1_MODE_MASK
  33                 },
  34                 .regmap[1] = {
  35                         AIROHA_FUNC_MUX,
  36 @@ -1810,8 +1810,8 @@ static const struct airoha_pinctrl_func_
  37                 .regmap[0] = {
  38                         AIROHA_FUNC_MUX,
  39                         REG_GPIO_2ND_I2C_MODE,
  40 -                       GPIO_LAN3_LED0_MODE_MASK,
  41 -                       GPIO_LAN3_LED0_MODE_MASK
  42 +                       GPIO_LAN3_LED1_MODE_MASK,
  43 +                       GPIO_LAN3_LED1_MODE_MASK
  44                 },
  45                 .regmap[1] = {
  46                         AIROHA_FUNC_MUX,
  47 @@ -1874,8 +1874,8 @@ static const struct airoha_pinctrl_func_
  48                 .regmap[0] = {
  49                         AIROHA_FUNC_MUX,
  50                         REG_GPIO_2ND_I2C_MODE,
  51 -                       GPIO_LAN3_LED0_MODE_MASK,
  52 -                       GPIO_LAN3_LED0_MODE_MASK
  53 +                       GPIO_LAN3_LED1_MODE_MASK,
  54 +                       GPIO_LAN3_LED1_MODE_MASK
  55                 },
  56                 .regmap[1] = {
  57                         AIROHA_FUNC_MUX,
  58 @@ -1938,8 +1938,8 @@ static const struct airoha_pinctrl_func_
  59                 .regmap[0] = {
  60                         AIROHA_FUNC_MUX,
  61                         REG_GPIO_2ND_I2C_MODE,
  62 -                       GPIO_LAN3_LED0_MODE_MASK,
  63 -                       GPIO_LAN3_LED0_MODE_MASK
  64 +                       GPIO_LAN3_LED1_MODE_MASK,
  65 +                       GPIO_LAN3_LED1_MODE_MASK
  66                 },
  67                 .regmap[1] = {
  68                         AIROHA_FUNC_MUX,