#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
"ubiboot=echo Booting from ubi ...; " \
"run ubiargs addmtd addmisc set_fit_default;" \
"bootm ${fit_addr_r}\0" \
"ubiboot=echo Booting from ubi ...; " \
"run ubiargs addmtd addmisc set_fit_default;" \
"bootm ${fit_addr_r}\0" \
"rescueargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/ram rw\0 " \
"rescueboot=echo Booting rescue system from NOR ...; " \
"rescueargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/ram rw\0 " \
"rescueboot=echo Booting rescue system from NOR ...; " \
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)