arch: powerpc: update the IFC IP input clock

[people/ms/u-boot.git] / README

diff --git a/README b/README
index a95348a876b4a53609ca5e384df5cc49abc61ac2..9fda38109de737c51b25cbefca338bda8a7a6604 100644 (file)
--- a/README
+++ b/README
@@ -504,6 +504,9 @@ The following options need to be configured:
                CONFIG_SYS_FSL_IFC_LE
                Defines the IFC controller register space as Little Endian
 
+               CONFIG_SYS_FSL_IFC_CLK_DIV
+               Defines divider of platform clock(clock input to IFC controller).
+
                CONFIG_SYS_FSL_PBL_PBI
                It enables addition of RCW (Power on reset configuration) in built image.
                Please refer doc/README.pblimage for more details