]> git.ipfire.org Git - people/ms/linux.git/blobdiff - arch/arm/boot/dts/qcom-ipq4019.dtsi
Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
[people/ms/linux.git] / arch / arm / boot / dts / qcom-ipq4019.dtsi
index c0cd2d330950ea4c7392372e618bfb4b76b1be55..c5da723f7674b817ffc0c2e15e983dd6cd46825c 100644 (file)
                        status = "disabled";
                };
 
-               blsp_dma: dma@7884000 {
+               blsp_dma: dma-controller@7884000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x07884000 0x23000>;
                        interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
                        clock-names = "core", "iface";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       dmas = <&blsp_dma 5>, <&blsp_dma 4>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 4>, <&blsp_dma 5>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
                        clock-names = "core", "iface";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       dmas = <&blsp_dma 7>, <&blsp_dma 6>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 6>, <&blsp_dma 7>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
                        compatible = "qcom,i2c-qup-v2.2.1";
                        reg = <0x78b7000 0x600>;
                        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&gcc GCC_BLSP1_AHB_CLK>,
-                                <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
-                       clock-names = "iface", "core";
+                       clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       dmas = <&blsp_dma 9>, <&blsp_dma 8>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 8>, <&blsp_dma 9>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
                        compatible = "qcom,i2c-qup-v2.2.1";
                        reg = <0x78b8000 0x600>;
                        interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&gcc GCC_BLSP1_AHB_CLK>,
-                                <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
-                       clock-names = "iface", "core";
+                       clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       dmas = <&blsp_dma 11>, <&blsp_dma 10>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 10>, <&blsp_dma 11>;
+                       dma-names = "tx", "rx";
                        status = "disabled";
                };
 
-               cryptobam: dma@8e04000 {
+               cryptobam: dma-controller@8e04000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x08e04000 0x20000>;
                        interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
-                       dmas = <&blsp_dma 1>, <&blsp_dma 0>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 0>, <&blsp_dma 1>;
+                       dma-names = "tx", "rx";
                };
 
                blsp1_uart2: serial@78b0000 {
                        clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
-                       dmas = <&blsp_dma 3>, <&blsp_dma 2>;
-                       dma-names = "rx", "tx";
+                       dmas = <&blsp_dma 2>, <&blsp_dma 3>;
+                       dma-names = "tx", "rx";
                };
 
                watchdog: watchdog@b017000 {
                        status = "disabled";
                };
 
-               qpic_bam: dma@7984000 {
+               qpic_bam: dma-controller@7984000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x7984000 0x1a000>;
                        interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;