arm: do not compile relocate_code() for SPL builds

[people/ms/u-boot.git] / arch / arm / cpu / arm_intcm / start.S

diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index c189849fa844775b4cfa9234291aca9ff39f53b6..c483b532c39def8e418d0a3f66d6bae1125fbe4b 100644 (file)
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -85,7 +85,11 @@ _fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-       .word   CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
+       .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -99,7 +103,7 @@ _bss_start_ofs:
 
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -147,39 +151,33 @@ reset:
 
 /*------------------------------------------------------------------------------*/
 
+#ifndef CONFIG_SPL_BUILD
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
-#ifndef CONFIG_SPL_BUILD
        /*
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -213,12 +211,13 @@ fixnext:
        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
        cmp     r2, r3
        blo     fixloop
-#endif
 
 relocate_done:
 
        bx      lr
 
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
@@ -226,6 +225,8 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
+#endif
+
        .globl  c_runtime_cpu_setup
 c_runtime_cpu_setup: