ARM: DRA7: Change configuration to prevent DDR reset control from EMIF

[people/ms/u-boot.git] / arch / arm / cpu / armv7 / omap5 / hw_data.c

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index f1a59a3ca918e9bc7f90f8cb6983bf73af899100..3a723cace71abf353ae20038b9672c3b6c64b27d 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -602,8 +602,8 @@ const struct ctrl_ioregs ioregs_dra7xx_es1 = {
        .ctrl_ddrio_0 = 0x00094A40,
        .ctrl_ddrio_1 = 0x04A52000,
        .ctrl_ddrio_2 = 0x84210000,
-       .ctrl_emif_sdram_config_ext = 0x0001C127,
-       .ctrl_emif_sdram_config_ext_final = 0x0001C127,
+       .ctrl_emif_sdram_config_ext = 0x0001C1A7,
+       .ctrl_emif_sdram_config_ext_final = 0x0001C1A7,
        .ctrl_ddr_ctrl_ext_0 = 0xA2000000,
 };
 
@@ -614,8 +614,8 @@ const struct ctrl_ioregs ioregs_dra72x_es1 = {
        .ctrl_ddrio_0 = 0x00094A40,
        .ctrl_ddrio_1 = 0x04A52000,
        .ctrl_ddrio_2 = 0x84210000,
-       .ctrl_emif_sdram_config_ext = 0x0001C127,
-       .ctrl_emif_sdram_config_ext_final = 0x0001C127,
+       .ctrl_emif_sdram_config_ext = 0x0001C1A7,
+       .ctrl_emif_sdram_config_ext_final = 0x0001C1A7,
        .ctrl_ddr_ctrl_ext_0 = 0xA2000000,
 };