arm: zynq: Add board support for cc108

[people/ms/u-boot.git] / arch / arm / dts / rk3328.dtsi

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index f18cfc26279c1571dd03eb76c042df76618a82a4..0bab1e33ccd1310a6dfbe859e7aaa05da6b25017 100644 (file)
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -25,6 +25,9 @@
                i2c1 = &i2c1;
                i2c2 = &i2c2;
                i2c3 = &i2c3;
+               mmc0 = &emmc;
+               mmc1 = &sdmmc;
+               mmc2 = &sdmmc_ext;
        };
 
        cpus {
@@ -184,6 +187,7 @@
        };
 
        grf: syscon@ff100000 {
+               u-boot,dm-pre-reloc;
                compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
                reg = <0x0 0xff100000 0x0 0x1000>;
                #address-cells = <1>;
@@ -350,6 +354,12 @@
                status = "disabled";
        };
 
+       dmc: dmc@ff400000 {
+               u-boot,dm-pre-reloc;
+               compatible = "rockchip,rk3328-dmc", "syscon";
+               reg = <0x0 0xff400000 0x0 0x1000>;
+       };
+
        cru: clock-controller@ff440000 {
                compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
                reg = <0x0 0xff440000 0x0 0x1000>;
@@ -415,7 +425,7 @@
        sdmmc: rksdmmc@ff500000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff500000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;
@@ -426,7 +436,7 @@
        sdio: dwmmc@ff510000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff510000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                         <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -438,7 +448,7 @@
        emmc: rksdmmc@ff520000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff520000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;
@@ -460,10 +470,20 @@
                status = "disabled";
        };
 
+       usb20_otg: usb@ff580000 {
+               compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
+                            "snps,dwc2";
+               reg = <0x0 0xff580000 0x0 0x40000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               hnp-srp-disable;
+               dr_mode = "otg";
+               status = "disabled";
+       };
+
        sdmmc_ext: rksdmmc@ff5f0000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff5f0000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;