/* CM_L3INIT_USBPHY_CLKCTRL */
#define USBPHY_CLKCTRL_OPTFCLKEN_PHY_48M_MASK 8
+/* CM_L3INIT_USB_HOST_HS_CLKCTRL */
+#define OPTFCLKEN_FUNC48M_CLK (1 << 15)
+#define OPTFCLKEN_HSIC480M_P2_CLK (1 << 14)
+#define OPTFCLKEN_HSIC480M_P1_CLK (1 << 13)
+#define OPTFCLKEN_HSIC60M_P2_CLK (1 << 12)
+#define OPTFCLKEN_HSIC60M_P1_CLK (1 << 11)
+#define OPTFCLKEN_UTMI_P3_CLK (1 << 10)
+#define OPTFCLKEN_UTMI_P2_CLK (1 << 9)
+#define OPTFCLKEN_UTMI_P1_CLK (1 << 8)
+#define OPTFCLKEN_HSIC480M_P3_CLK (1 << 7)
+#define OPTFCLKEN_HSIC60M_P3_CLK (1 << 6)
+
+/* CM_L3INIT_USB_TLL_HS_CLKCTRL */
+#define OPTFCLKEN_USB_CH0_CLK_ENABLE (1 << 8)
+#define OPTFCLKEN_USB_CH1_CLK_ENABLE (1 << 9)
+#define OPTFCLKEN_USB_CH2_CLK_ENABLE (1 << 10)
+
/* CM_MPU_MPU_CLKCTRL */
#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24
#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24)