ROCKCHIP_SYSCON_PMUGRF,
ROCKCHIP_SYSCON_PMUSGRF,
ROCKCHIP_SYSCON_CIC,
+ ROCKCHIP_SYSCON_MSCH,
};
/* Standard Rockchip clock numbers */
return clk_id - 1;
}
+struct sysreset_reg {
+ unsigned int glb_srst_fst_value;
+ unsigned int glb_srst_snd_value;
+};
+
/**
* clk_get_divisor() - Calculate the required clock divisior
*