ARM: DRA7: Add is_dra72x cpu check definition

[people/ms/u-boot.git] / arch / arm / include / asm / omap_common.h

diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 5e2f027ba4de678aa6bddd0632a775f58afd8ae4..50f178bd58b7dc01bcf44b3111ca21fe030d544b 100644 (file)
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -143,6 +143,8 @@ struct prcm_regs {
        u32 cm_div_m2_dpll_unipro;
        u32 cm_ssc_deltamstep_dpll_unipro;
        u32 cm_ssc_modfreqdiv_dpll_unipro;
+       u32 cm_coreaon_usb_phy1_core_clkctrl;
+       u32 cm_coreaon_usb_phy2_core_clkctrl;
 
        /* cm2.core */
        u32 cm_coreaon_bandgap_clkctrl;
@@ -224,8 +226,11 @@ struct prcm_regs {
        u32 cm_l3init_hsusbotg_clkctrl;
        u32 cm_l3init_hsusbtll_clkctrl;
        u32 cm_l3init_p1500_clkctrl;
+       u32 cm_l3init_sata_clkctrl;
        u32 cm_l3init_fsusb_clkctrl;
        u32 cm_l3init_ocp2scp1_clkctrl;
+       u32 cm_l3init_ocp2scp3_clkctrl;
+       u32 cm_l3init_usb_otg_ss1_clkctrl;
 
        u32 prm_irqstatus_mpu_2;
 
@@ -266,6 +271,7 @@ struct prcm_regs {
        u32 cm_l4per_mmcsd4_clkctrl;
        u32 cm_l4per_msprohg_clkctrl;
        u32 cm_l4per_slimbus2_clkctrl;
+       u32 cm_l4per_qspi_clkctrl;
        u32 cm_l4per_uart1_clkctrl;
        u32 cm_l4per_uart2_clkctrl;
        u32 cm_l4per_uart3_clkctrl;
@@ -310,12 +316,6 @@ struct prcm_regs {
        u32 prm_vc_val_bypass;
        u32 prm_vc_cfg_i2c_mode;
        u32 prm_vc_cfg_i2c_clk;
-       u32 prm_sldo_core_setup;
-       u32 prm_sldo_core_ctrl;
-       u32 prm_sldo_mpu_setup;
-       u32 prm_sldo_mpu_ctrl;
-       u32 prm_sldo_mm_setup;
-       u32 prm_sldo_mm_ctrl;
        u32 prm_abbldo_mpu_setup;
        u32 prm_abbldo_mpu_ctrl;
 
@@ -353,6 +353,7 @@ struct omap_sys_ctrl_regs {
        u32 control_core_mac_id_1_lo;
        u32 control_core_mac_id_1_hi;
        u32 control_std_fuse_opp_vdd_mpu_2;
+       u32 control_phy_power_usb;
        u32 control_core_mmr_lock1;
        u32 control_core_mmr_lock2;
        u32 control_core_mmr_lock3;
@@ -361,11 +362,16 @@ struct omap_sys_ctrl_regs {
        u32 control_core_control_io1;
        u32 control_core_control_io2;
        u32 control_id_code;
+       u32 control_std_fuse_die_id_0;
+       u32 control_std_fuse_die_id_1;
+       u32 control_std_fuse_die_id_2;
+       u32 control_std_fuse_die_id_3;
        u32 control_std_fuse_opp_bgap;
        u32 control_ldosram_iva_voltage_ctrl;
        u32 control_ldosram_mpu_voltage_ctrl;
        u32 control_ldosram_core_voltage_ctrl;
        u32 control_usbotghs_ctrl;
+       u32 control_phy_power_sata;
        u32 control_padconf_core_base;
        u32 control_paconf_global;
        u32 control_paconf_mode;
@@ -538,6 +544,7 @@ extern struct prcm_regs const omap5_es2_prcm;
 extern struct prcm_regs const omap4_prcm;
 extern struct prcm_regs const dra7xx_prcm;
 extern struct dplls const **dplls_data;
+extern struct dplls dra7xx_dplls;
 extern struct vcores_data const **omap_vcores;
 extern const u32 sys_clk_array[8];
 extern struct omap_sys_ctrl_regs const **ctrl;
@@ -545,6 +552,8 @@ extern struct omap_sys_ctrl_regs const omap4_ctrl;
 extern struct omap_sys_ctrl_regs const omap5_ctrl;
 extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
 
+extern struct pmic_data tps659038;
+
 void hw_data_init(void);
 
 const struct dpll_params *get_mpu_dpll_params(struct dplls const *);
@@ -565,7 +574,6 @@ u32 omap_ddr_clk(void);
 u32 get_sys_clk_index(void);
 void enable_basic_clocks(void);
 void enable_basic_uboot_clocks(void);
-void enable_non_essential_clocks(void);
 void scale_vcores(struct vcores_data const *);
 u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
@@ -573,11 +581,10 @@ void abb_setup(u32 fuse, u32 ldovbb, u32 setup, u32 control,
               u32 txdone, u32 txdone_mask, u32 opp);
 s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb);
 
-/* HW Init Context */
-#define OMAP_INIT_CONTEXT_SPL                  0
-#define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR       1
-#define OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL      2
-#define OMAP_INIT_CONTEXT_UBOOT_AFTER_CH       3
+void usb_fake_mac_from_die_id(u32 *id);
+void usb_set_serial_num_from_die_id(u32 *id);
+
+void omap_smc1(u32 service, u32 val);
 
 /* ABB */
 #define OMAP_ABB_NOMINAL_OPP           0
@@ -598,6 +605,14 @@ static inline u32 omap_revision(void)
        return *omap_si_rev;
 }
 
+#define OMAP44xx       0x44000000
+
+static inline u8 is_omap44xx(void)
+{
+       extern u32 *const omap_si_rev;
+       return (*omap_si_rev & 0xFF000000) == OMAP44xx;
+};
+
 #define OMAP54xx       0x54000000
 
 static inline u8 is_omap54xx(void)
@@ -605,6 +620,21 @@ static inline u8 is_omap54xx(void)
        extern u32 *const omap_si_rev;
        return ((*omap_si_rev & 0xFF000000) == OMAP54xx);
 }
+
+#define DRA7XX         0x07000000
+#define DRA72X         0x07200000
+
+static inline u8 is_dra7xx(void)
+{
+       extern u32 *const omap_si_rev;
+       return ((*omap_si_rev & 0xFF000000) == DRA7XX);
+}
+
+static inline u8 is_dra72x(void)
+{
+       extern u32 *const omap_si_rev;
+       return (*omap_si_rev & 0xFFF00000) == DRA72X;
+}
 #endif
 
 /*
@@ -633,6 +663,8 @@ static inline u8 is_omap54xx(void)
 
 /* DRA7XX */
 #define DRA752_ES1_0   0x07520100
+#define DRA752_ES1_1   0x07520110
+#define DRA722_ES1_0   0x07220100
 
 /*
  * SRAM scratch space entries