Merge tag 'soc-arm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

[thirdparty/linux.git] / arch / arm / kernel / perf_event_v6.c

diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 0cbf46233d6b16ebb449196ff261fb504364ae0d..d9fd538415918fcb8f4cd9159216008162cd9b46 100644 (file)
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -205,10 +205,8 @@ static inline void armv6pmu_write_counter(struct perf_event *event, u64 value)
 
 static void armv6pmu_enable_event(struct perf_event *event)
 {
-       unsigned long val, mask, evt, flags;
-       struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
+       unsigned long val, mask, evt;
        struct hw_perf_event *hwc = &event->hw;
-       struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
        int idx = hwc->idx;
 
        if (ARMV6_CYCLE_COUNTER == idx) {
@@ -231,12 +229,10 @@ static void armv6pmu_enable_event(struct perf_event *event)
         * Mask out the current event and set the counter to count the event
         * that we're interested in.
         */
-       raw_spin_lock_irqsave(&events->pmu_lock, flags);
        val = armv6_pmcr_read();
        val &= ~mask;
        val |= evt;
        armv6_pmcr_write(val);
-       raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
 
 static irqreturn_t
@@ -299,26 +295,20 @@ armv6pmu_handle_irq(struct arm_pmu *cpu_pmu)
 
 static void armv6pmu_start(struct arm_pmu *cpu_pmu)
 {
-       unsigned long flags, val;
-       struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+       unsigned long val;
 
-       raw_spin_lock_irqsave(&events->pmu_lock, flags);
        val = armv6_pmcr_read();
        val |= ARMV6_PMCR_ENABLE;
        armv6_pmcr_write(val);
-       raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
 
 static void armv6pmu_stop(struct arm_pmu *cpu_pmu)
 {
-       unsigned long flags, val;
-       struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+       unsigned long val;
 
-       raw_spin_lock_irqsave(&events->pmu_lock, flags);
        val = armv6_pmcr_read();
        val &= ~ARMV6_PMCR_ENABLE;
        armv6_pmcr_write(val);
-       raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
 
 static int
@@ -356,10 +346,8 @@ static void armv6pmu_clear_event_idx(struct pmu_hw_events *cpuc,
 
 static void armv6pmu_disable_event(struct perf_event *event)
 {
-       unsigned long val, mask, evt, flags;
-       struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
+       unsigned long val, mask, evt;
        struct hw_perf_event *hwc = &event->hw;
-       struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
        int idx = hwc->idx;
 
        if (ARMV6_CYCLE_COUNTER == idx) {
@@ -381,12 +369,10 @@ static void armv6pmu_disable_event(struct perf_event *event)
         * of ETM bus signal assertion cycles. The external reporting should
         * be disabled and so this should never increment.
         */
-       raw_spin_lock_irqsave(&events->pmu_lock, flags);
        val = armv6_pmcr_read();
        val &= ~mask;
        val |= evt;
        armv6_pmcr_write(val);
-       raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
 }
 
 static int armv6_map_event(struct perf_event *event)