]> git.ipfire.org Git - thirdparty/u-boot.git/blobdiff - arch/arm/mach-rockchip/rk322x-board.c
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
[thirdparty/u-boot.git] / arch / arm / mach-rockchip / rk322x-board.c
index f040c1b74639c4d81a4d5fb5a441a529e241be3f..e7a1e54874d6d01641c730d477e1b03f01283fb8 100644 (file)
@@ -10,8 +10,8 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/boot_mode.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/periph.h>
 #include <asm/arch-rockchip/grf_rk322x.h>
+#include <asm/arch-rockchip/periph.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -32,34 +32,7 @@ int board_init(void)
 #include <asm/arch-rockchip/grf_rk322x.h>
        /* Enable early UART2 channel 1 on the RK322x */
 #define GRF_BASE       0x11000000
-       struct rk322x_grf * const grf = (void *)GRF_BASE;
-       enum {
-               GPIO1B2_SHIFT           = 4,
-               GPIO1B2_MASK            = 3 << GPIO1B2_SHIFT,
-               GPIO1B2_GPIO            = 0,
-               GPIO1B2_UART21_SIN,
-
-               GPIO1B1_SHIFT           = 2,
-               GPIO1B1_MASK            = 3 << GPIO1B1_SHIFT,
-               GPIO1B1_GPIO            = 0,
-               GPIO1B1_UART1_SOUT,
-               GPIO1B1_UART21_SOUT,
-       };
-       enum {
-               CON_IOMUX_UART2SEL_SHIFT= 8,
-               CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT,
-               CON_IOMUX_UART2SEL_2    = 0,
-               CON_IOMUX_UART2SEL_21,
-       };
-
-       rk_clrsetreg(&grf->gpio1b_iomux,
-                    GPIO1B1_MASK | GPIO1B2_MASK,
-                    GPIO1B2_UART21_SIN << GPIO1B2_SHIFT |
-                    GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT);
-       /* Set channel C as UART2 input */
-       rk_clrsetreg(&grf->con_iomux,
-                    CON_IOMUX_UART2SEL_MASK,
-                    CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT);
+       static struct rk322x_grf * const grf = (void *)GRF_BASE;
 
        /*
        * The integrated macphy is enabled by default, disable it
@@ -85,7 +58,7 @@ int dram_init_banksize(void)
        return 0;
 }
 
-#ifndef CONFIG_SYS_DCACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 void enable_caches(void)
 {
        /* Enable D-cache. I-cache is already enabled in start.S */