arm64: dts: imx8m: Add ddr controller nodes

[thirdparty/kernel/stable.git] / arch / arm64 / boot / dts / freescale / imx8mq.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 55a3d1c4bdf04cfc8df24adc230d23a0702c0180..d1fcf9887f8b88419e965d6a6f13c35d28f3fbb7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -235,12 +235,26 @@
                        thermal-sensors = <&tmu 1>;
 
                        trips {
+                               gpu_alert: gpu-alert {
+                                       temperature = <80000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
                                gpu-crit {
                                        temperature = <90000>;
                                        hysteresis = <2000>;
                                        type = "critical";
                                };
                        };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&gpu_alert>;
+                                       cooling-device =
+                                               <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
                };
 
                vpu-thermal {
@@ -854,8 +868,6 @@
                                         <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
                                         <&clk IMX8MQ_CLK_USDHC1_ROOT>;
                                clock-names = "ipg", "ahb", "per";
-                               assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
-                               assigned-clock-rates = <400000000>;
                                fsl,tuning-start-tap = <20>;
                                fsl,tuning-step = <2>;
                                bus-width = <4>;
@@ -949,6 +961,7 @@
                                 <&clk IMX8MQ_CLK_GPU_AXI>,
                                 <&clk IMX8MQ_CLK_GPU_AHB>;
                        clock-names = "core", "shader", "bus", "reg";
+                       #cooling-cells = <2>;
                        assigned-clocks = <&clk IMX8MQ_CLK_GPU_CORE_SRC>,
                                          <&clk IMX8MQ_CLK_GPU_SHADER_SRC>,
                                          <&clk IMX8MQ_CLK_GPU_AXI>,
@@ -1100,6 +1113,16 @@
                        interrupt-parent = <&gic>;
                };
 
+               ddrc: memory-controller@3d400000 {
+                       compatible = "fsl,imx8mq-ddrc", "fsl,imx8m-ddrc";
+                       reg = <0x3d400000 0x400000>;
+                       clock-names = "core", "pll", "alt", "apb";
+                       clocks = <&clk IMX8MQ_CLK_DRAM_CORE>,
+                                <&clk IMX8MQ_DRAM_PLL_OUT>,
+                                <&clk IMX8MQ_CLK_DRAM_ALT>,
+                                <&clk IMX8MQ_CLK_DRAM_APB>;
+               };
+
                ddr-pmu@3d800000 {
                        compatible = "fsl,imx8mq-ddr-pmu", "fsl,imx8m-ddr-pmu";
                        reg = <0x3d800000 0x400000>;