MIPS: initial infrastructure for Microchip PIC32 architecture

[people/ms/u-boot.git] / arch / mips / Kconfig

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7f7e258a801eaa9e4bff89a23df60e7ae3a26793..f852a1f1bbca2ab55ac220b11ae263e60f6abca1 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -23,11 +23,13 @@ config TARGET_QEMU_MIPS
 
 config TARGET_MALTA
        bool "Support malta"
+       select DYNAMIC_IO_PORT_BASE
        select SUPPORTS_BIG_ENDIAN
        select SUPPORTS_LITTLE_ENDIAN
        select SUPPORTS_CPU_MIPS32_R1
        select SUPPORTS_CPU_MIPS32_R2
        select SWAP_IO_SPACE
+       select MIPS_L1_CACHE_SHIFT_6
 
 config TARGET_VCT
        bool "Support vct"
@@ -43,6 +45,7 @@ config TARGET_DBAU1X00
        select SUPPORTS_CPU_MIPS32_R1
        select SUPPORTS_CPU_MIPS32_R2
        select SYS_MIPS_CACHE_INIT_RAM_LOAD
+       select MIPS_TUNE_4KC
 
 config TARGET_PB1X00
        bool "Support pb1x00"
@@ -50,7 +53,12 @@ config TARGET_PB1X00
        select SUPPORTS_CPU_MIPS32_R1
        select SUPPORTS_CPU_MIPS32_R2
        select SYS_MIPS_CACHE_INIT_RAM_LOAD
+       select MIPS_TUNE_4KC
 
+config MACH_PIC32
+       bool "Support Microchip PIC32"
+       select OF_CONTROL
+       select DM
 
 endchoice
 
@@ -59,6 +67,7 @@ source "board/imgtec/malta/Kconfig"
 source "board/micronas/vct/Kconfig"
 source "board/pb1x00/Kconfig"
 source "board/qemu-mips/Kconfig"
+source "arch/mips/mach-pic32/Kconfig"
 
 if MIPS
 
@@ -174,6 +183,15 @@ config CPU_MIPS64
        bool
        default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
 
+config MIPS_TUNE_4KC
+       bool
+
+config MIPS_TUNE_14KC
+       bool
+
+config MIPS_TUNE_24KC
+       bool
+
 config 32BIT
        bool
 
@@ -186,6 +204,29 @@ config SWAP_IO_SPACE
 config SYS_MIPS_CACHE_INIT_RAM_LOAD
        bool
 
+config MIPS_L1_CACHE_SHIFT_4
+       bool
+
+config MIPS_L1_CACHE_SHIFT_5
+       bool
+
+config MIPS_L1_CACHE_SHIFT_6
+       bool
+
+config MIPS_L1_CACHE_SHIFT_7
+       bool
+
+config MIPS_L1_CACHE_SHIFT
+       int
+       default "7" if MIPS_L1_CACHE_SHIFT_7
+       default "6" if MIPS_L1_CACHE_SHIFT_6
+       default "5" if MIPS_L1_CACHE_SHIFT_5
+       default "4" if MIPS_L1_CACHE_SHIFT_4
+       default "5"
+
+config DYNAMIC_IO_PORT_BASE
+       bool
+
 endif
 
 endmenu